PROGRAMMABLE FREQUENCY GENERATOR QS5925 FEATURES progra

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QS5925 PROGRAMMABLE FREQUENCY GENERATOR
PROGRAMMABLE FREQUENCY GENERATOR
QS5925
FEATURES
programmable frequency outputs Optional crystal input, internal capacitors Balanced Drive Outputs ±12mA disable mode frequency testing Tri-state output enable (OE) PHY/MAC networking applications Industrial 85°C operation Input frequencies 100MHz Output frequencies 160MHz tolerant inputs output skew/jitter External feedback, internal loop filter 3.6V supply voltage Available 16-pin QSOP package
DESCRIPTION
QS5925 high-performance, skew, jitter phase-locked loop (PLL) clock driver. provides precise phase frequency alignment clock outputs externally applied clock input internal crystal oscillator. QS5925 been specially designed interface with Gigabit Ethernet Fast Ethernet applications providing 125MHz clock from 25MHz input. also programmed provide output frequencies ranging from 3.125MHz 160MHz with input frequencies ranging from 3.125MHz 100MHz. QS5925 includes internal filter that provides excellent jitter characteristics eliminates need external components. When using optional crystal input, must connected pin. on-chip crystal oscillator includes feedback resistor crystal capacitors (nominal load capacitance 15pF), requires fundamental mode crystal with maximum equivalent series resistance
FUNCTIONAL BLOCK DIAGRAM
SELEC CLKIN DETECTO FILTER
FREQ DIVIDER
XTAL PTIO YSTAL
1999 Integrated Device Technology, Inc.
MARCH 2000
DSC-5776/-
QS5925 PROGRAMMABLE FREQUENCY GENERATOR
CONFIGURATION
CLKIN
QSOP VIEW
ABSOLUTE MAXIMUM RATINGS
85°C TSTG Symbol VTERM Description Supply Voltage Ground Output Voltage VOUT Input Voltage Maximum Power Dissipation Storage Temperature
Unit
Max. +0.5 +150
16-7
NOTE: Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS cause permanent damage device. This stress rating only functional operation device these other conditions above those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect reliability.
DESCRIPTION
Names CLKIN Description Input clock Crystal oscillator input Crystal oscillator output feedback input which connected output pin. locks onto edge signal. Mode/Frequency select inputs (three-level) Clock outputs Programmable divide-by-N clock output Tri-state output enable. When asserted HIGH, clock outputs high impedance. Power supply output buffers Ground supply output buffers Power supply Ground supply
VDDN GNDN VDDQ GNDQ
NOTE: best accuracy, parallel resonant crystal specified load capacitance 15pF.
FUNCTION TABLE
Output Used Feedback Allowable Range (MHz)(1) Minimum 25/N Maximum 160/N Output Frequency Relationships CLK/N
NOTE: Operation specified frequency range guarantees that will operate optimal range 25MHz 160MHz. Operation with outside specified frequency ranges result invalid out-of-lock outputs.
QS5925 PROGRAMMABLE FREQUENCY GENERATOR
DIVIDE SELECTION TABLE
5(3) Divide-by-N Value FACTORY TEST(2) TEST(4) Mode
NOTES: HIGH MEDIUM Factory test mode: operation specified. Ethernet mode (use 25MHz input frequency feedback). Test mode frequency testing. this mode, bypasses (VCO powered down). Frequency must 1MHz dynamic circuits frequency dividers.
OPERATING CONDITIONS
Symbol Parameter Power Supply Voltage Operating Temperature Output Load Capacitance Input Capacitance, CLKIN, 1MHz, 25°C Unit
ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Industrial: -40°C +85°C, 3.3V 0.3V
Symbol VIHH VILL VIMM IIHH IILL IIMM Input Current Output HIGH Voltage Output Voltage Input Current Input Voltage Input HIGH Current Input Voltage Parameter Input HIGH Voltage Test Conditions CLKIN, CLKIN, VDD; CLKIN, VDD; CLKIN, VDD/2; -12mA -100µA 12mA 100µA Min. VDD/2 Typ. 0.07 0.15 Max. VDD/2 0.55 Unit
NOTE: These inputs normally wired Vcc, GND, unconnected. inputs switched real time, function timing outputs glitch, require additional lock time before datasheet limits achieved.
QS5925 PROGRAMMABLE FREQUENCY GENERATOR
POWER SUPPLY CHARACTERISTICS
Symbol IDDQ Parameter Quiescent Supply Current Test Conditions Max. outputs unloaded Max., 3.6V MID; FOUT 60MHz outputs unloaded Min. Typ. Unit
Supply Current Input Dynamic Supply Current
NOTE: conditions shown Min. Max., appropriate values specified under Electrical Characteristics.
ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Industrial: -40°C +85°C, 3.3V 0.3V
Symbol dT_INPUT tR_INPUT tF_INPUT fOSC fOUT Parameter Rise Time Fall Time Duty Cycle CLKIN Propagation Delay Skew (output output) Cycle Cycle Jitter CLKIN Duty Cycle CLKIN Rise Time CLKIN Fall Time Oscillator Frequency Output Frequency Input Frequency 0.8V 0.8V VDD/2 VDD/2 VDD/2; VDD/2; 125MHz output (Qx) 1.5V 0.8V 0.8V used feedback used feedback
NOTE: This parameter guaranteed design tested.
Test Conditions
Min. 25/N
Typ. 0.95
Max. 160/N
Unit
QS5925 PROGRAMMABLE FREQUENCY GENERATOR
TEST LOADS WAVEFORMS
FIGURE
OUTPUT
Input Test Waveform
15pF
Test Load
Output Waveform QS5925 QS5925 general-purpose phase-locked loop (PLL) that used zero delay buffer clock multiplier. generates three outputs frequency output frequency divided where determined Mode/Frequency Select input pins will adjust frequency (within limits Function Table) ensure that input frequency equals frequency whichever output connected QS5925 accept types input signal. first reference clock generated another device board which needs reproduced with minimal delay between incoming clock output. second external crystal. When used first mode, crystal input (X1) should tied ground crystal output should left unconnected. Figure depicts applications: connecting phase detector QS5925 will adjust output frequency incoming clock such fashion that inputs CLKIN) will have nearly zero phase frequency difference. addition, copy clock divided from increments one. divide will depend selection (see Divide Selection Table page pins three level inputs that allow total seven different modes division. They connected HIGH, left unconnected provide level internal resistor network will bias signal level 0.5VDD). Another QS5925 connect (see Figure
CLKIN S5925
CLKIN S5925
Figure
Figure
QS5925 PROGRAMMABLE FREQUENCY GENERATOR
Connected this fashion, QS5925 only becomes zero delay buffer, also clock multiplier. With proper selection Q0-Q2 outputs will generate two, three, eight times input clock frequency. When used this mode, must make sure that input output frequency specifications violated (refer Function Table).
There some applications where higher fan-out required. These kinds applications could addressed using QS5925 conjunction with clock buffer such QS53805 Figure shows higher fan-out with different clock rates generated.
LKIN S5925
PIES S53805 PIES
Figure connecting QS53805 outputs input QS5925, propagation delay from CLKIN output QS53805 will nearly zero. second drive input QS5925 external crystal. When connecting external crystal pins must
CLKIN
shorted CLKIN (pin shown Figure best accuracy, parallel resonant crystal with crystal load capacitance rating 15pF should used. reduce parasitic between external crystal QS5925 recommended connect crystal close possible pins.
QS5925
XTAL
Figure questions often asked what accuracy clock generators? applications where clock synthesizers used, terms frequency accuracy frequency error used interchangeably. Here, frequency accuracy error) based factors. input frequency other multiplication factor. Clock multipliers synthesizers) governed equation: integer, output frequency error accuracy) merely function accurate input instance, QS5925 could accept forms input, from crystal oscillator (see Figure other from crystal (see Figure using 20MHz clock with multiplication factor (with accuracy parts million), easily have three copies 100MHz clock with ±30PPM accuracy. Frequency accuracy defined following equation:
Output Frequency (M)* Input Frequency where feedback divide reference divide. ratio integer, then output frequency will exact multiple input. other hand, ratio were whole number, output clock would exact multiple input. case QS5925, since reference divide ("N") "1", equation strong function feedback divide ("M"). addition, since feedback
Accuracy (Measured Freq. Nominal Freq.) Nominal Frequency where measured frequency average frequency over certain number cycles (typically 10,000) nominal frequency desired frequency.
QS5925 PROGRAMMABLE FREQUENCY GENERATOR
ORDERING INFORMATION
IDTQS XXXX Device Type Package Process
Blank
Industrial (-40°C +85°C)
Quarter Size Outline Package (150 mil.) (SO16-7)
5925
Programmable Frequency Generator
CORPORATE HEADQUARTERS 2975 Stender Santa Clara, 95054
SALES: 800-345-7015 408-727-6116 fax: 408-492-8674 www.idt.com*
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