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SDRAM Unbuffered Module 168pin Unbuffered Module based 128Mb E-di


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64MB, 128MB, 256MB Unbuffered DIMM
SDRAM Unbuffered Module
168pin Unbuffered Module based 128Mb E-die (x8, x16) 62/72-bit ECC/ECC
Revision May. 2003
Rev. May. 2003
64MB, 128MB, 256MB Unbuffered DIMM
Revision History
Revision (Nov., 2002) First release Revision (May, 2003) Merged Spec.
Rev. May. 2003
64MB, 128MB, 256MB Unbuffered DIMM
168Pin Unbuffered DIMM based 128Mb E-die (x4,
Ordering Information
Part Number M366S0924ETS-C7A M366S1723ETS-C7A M366S1723ETU-C7A M374S1723ETS-C7A M374S1723ETU-C7A M366S3323ETS-C7A M366S3323ETU-C7A M374S3323ETS-C7A M374S3323ETU-C7A Density 64MB 128MB 128MB 128MB 128MB 256MB 256MB 256MB 256MB Organization Component Composition 8Mx16(K4S281632E) 16Mx8(K4S280832E) 16Mx8(K4S280832E) 16Mx8(K4S280832E) 16Mx8(K4S280832E) 16Mx8(K4S280832E)*16EA 16Mx8(K4S280832E)*16EA 16Mx8(K4S280832E)*18EA 16Mx8(K4S280832E)*18EA
Interface LVTTL LVTTL LVTTL LVTTL LVTTL LVTTL LVTTL LVTTL LVTTL
Operating Frequencies
Speed @CL3 CL-tRCD-tRP 133MHz(7.5ns) 3-3-3
Feature
Burst mode operation Auto self refresh capability (4096 Cycles/64ms) LVTTL compatible inputs outputs Single 3.3V 0.3V power supply cycle with address programs Latency (Access from column address) Burst length Full page) Data scramble (Sequential Interleave) inputs sampled positive going edge system clock Serial presence detect with EEPROM single double sided
Rev. May. 2003
64MB, 128MB, 256MB Unbuffered DIMM
CONFIGURATIONS (Front side/back side)
Front DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 ***CB0 ***CB1 DQM0 Front DQM1 A10/AP ****CLK0 DQM2 DQM3 ***CB2 ***CB3 DQ16 DQ17 Front DQ18 DQ19 DQ20 *VREF ****CKE1 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 ****CLK2 **SDA **SCL Back DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 ***CB4 ***CB5 DQM4 Back DQM5 ****CLK1 *A12 ****CKE0 *CS3 DQM6 DQM7 *A13 ***CB6 ***CB7 DQ48 DQ49
Back DQ50 DQ51 DQ52 *VREF REGE DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 ****CLK3 **SA0 **SA1 **SA2
Description
Name DQ63 CLK0 CKE0, CKE1 Select bank Data input/output Check (Data-in/data-out) Clock input Clock enable input Chip select input address strobe Colume address strobe Write enable Function Address input (Multiplexed) *VREF REGE Name DQM0 Power supply (3.3V) Ground Power supply reference Register enable Serial data Serial clock Address EEPROM Dont connection Function
These pins used this module. These pins should system which does support SPD. These pins used only Module. **** About these pins, Refer Block Diagram.
SAMSUNG ELECTRONICS CO., Ltd. reserves right change products specifications without notice.
Rev. May. 2003
64MB, 128MB, 256MB Unbuffered DIMM
CONFIGURATION DESCRIPTION
Name System clock Chip select Input Function Active positive going edge sample inputs.
Disables enables device operation masking enabling inputs except CLK, Masks system clock freeze operation from next clock cycle. should enabled least cycle prior command. Disable input buffers power down standby. should enabled 1CLK+tss prior valid command. Row/column addresses multiplexed same pins. address RA11, Column address CA9, CA11 Selects bank activated during address latch time. Selects bank read/write during column address latch time. Latches addresses positive going edge with low. Enables access precharge. Latches column addresses positive going edge with low. Enables column access. Enables write operation precharge. Latches data starting from CAS, active. Makes data output Hi-Z, tSHZ after clock masks output. Blocks data input when active. (Byte masking) device operates transparent mode when REGE low. When REGE high, device operates registered mode. registered mode, Address control inputs latched held high logic level. inputs stored latch/flip-flop rising edge CLK. REGE tied through Resistor PCB. REGE module floating, this module will operated registered mode. Data inputs/outputs multiplexed same pins. Check bits ECC. Power ground input buffers core logic.
Clock enable
DQM0
Address Bank select address address strobe Column address strobe Write enable Data input/output mask
REGE
Register enable
VDD/VSS
Data input/output Check Power supply/ground
Rev. May. 2003
64MB, 128MB, 256MB Unbuffered DIMM
64MB, 8Mx64 Module (M366S0924ETS) (Populated bank SDRAM Module) FUNCTIONAL BLOCK DIAGRAM
DQM0 DQM1 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQM2 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQM3 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 LDQM UDQM DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 LDQM UDQM DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQM6 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQM7 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 LDQM UDQM DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQM4 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQM5 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 LDQM UDQM DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
Serial
CKE0
SDRAM SDRAM SDRAM SDRAM SDRAM
CLK0/2 15pF
U0/U2 U1/U3
Every DQpin SDRAM CLK1/3 0.1uF Capacitors each SDRAM SDRAMs 10pF
Rev. May. 2003
64MB, 128MB, 256MB Unbuffered DIMM
DQM0
128MB, 16Mx64 Module (M366S1723ETS(U)) (Populated bank SDRAM Module) FUNCTIONAL BLOCK DIAGRAM
DQM4 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQM5 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47
DQM1 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQM2 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQM3 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
DQM6 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQM7 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
Serial
CKE0
SDRAM SDRAM SDRAM SDRAM SDRAM CLK0/1
3.3pF*1
U0/U9 U5/U14 U2/U10 U1/U15 U6/U11
Every DQpin
0.1uF 0.22 Cap. SDRAMs each
loads, CLK2 CLK3 only. CLK2/3 10pF
Rev. May. 2003
64MB, 128MB, 256MB Unbuffered DIMM
128MB, 16Mx72 Module (M374S1723ETS(U)) (Populated bank SDRAM Module) FUNCTIONAL BLOCK DIAGRAM
DQM0
DQM4
DQM1 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQM5
DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQM6
DQM2
DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQM7
DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQM3 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
Serial
CKE0
SDRAM SDRAM SDRAM SDRAM SDRAM Every DQpin SDRAM CLK1/3 0.1uF 0.22 Cap. SDRAMs each SDRAM 3.3pF*1 CLK0/2
U0/U3 U5/U7 U1/U4
U6/U8
loads, CLK2 only. 10pF
Rev. May. 2003
64MB, 128MB, 256MB Unbuffered DIMM
256MB, 32Mx64 Module (M366S3323ETS(U)) (Populated bank SDRAM Module) FUNCTIONAL BLOCK DIAGRAM
DQM0 DQM1 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQM2 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQM3 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 CKE0 0.1uF Capacitors each SDRAM SDRAMs 3.3pF Every DQpin SDRAM CLK0/1/2/3 DQM4 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQM5 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47
DQM6 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQM7
Serial
DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
SDRAM SDRAM SDRAM SDRAM SDRAM CKE1 SDRAM
U0/U1/U2/U3 U4/U5/U6/U7 U8/U9/U10/U11 U12/U13/U14/U15
Rev. May. 2003
64MB, 128MB, 256MB Unbuffered DIMM
256MB, 32Mx72 Module (M374S3323ETS(U)) (Populated bank SDRAM Module) FUNCTIONAL BLOCK DIAGRAM
DQM0 DQM1 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
DQM4
DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQM5
DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47
DQM2 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQM3 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
DQM6 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQM7 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
Serial
CKE0
SDRAM SDRAM SDRAM SDRAM CKE1 SDRAM
SDRAM CLK0/1/2/3
3.3pF*1
U1/U3/U0/U4 U6/U7/U5/U8 U10/U12/U9/U13 U15/U16/U14/U17 U2/U11
Every DQpin
0.1uF Capacitors each
SDRAMs loads, CLK2 CLK3 only.
Rev. May. 2003
64MB, 128MB, 256MB Unbuffered DIMM
ABSOLUTE MAXIMUM RATINGS
Parameter Voltage relative Voltage supply relative Storage temperature Power dissipation Short circuit current Symbol VIN, VOUT VDD, VDDQ TSTG Value -1.0 -1.0 +150 component
Unit
Note Permanent device damage occur "ABSOLUTE MAXIMUM RATINGS" exceeded. Functional operation should restricted recommended operating condition. Exposure higher than recommended voltage extended periods time could affect device reliability.
OPERATING CONDITIONS CHARACTERISTICS
Recommended operating conditions (Voltage referenced 70°C) Parameter Supply voltage Input high voltage Input voltage Output high voltage Output voltage Input leakage current Symbol -0.3 VDDQ+0.3 Unit -2mA Note
Notes (max) 5.6V AC.The overshoot voltage duration 3ns. (min) -2.0V undershoot voltage duration 3ns. input VDDQ. Input leakage currents include Hi-Z output leakage bi-directional buffers with Tri-State outputs.
CAPACITANCE
(VDD 3.3V, 23°C, 1MHz, VREF 1.4V Symbol CIN1 CIN2 CIN3 CIN4 CIN5 CIN6 COUT Symbol CADD CCKE CCLK CDQM COUT1 COUT2 M366S0924ETS M374S1723ETS(U) M366S1723ETS(U) M366S3323ETS(U) M374S3323ETS(U) Unit Unit
Parameter Input capacitance A11) Input capacitance (RAS, CAS, Input capacitance (CKE) Input capacitance (CLK) Input capacitance (CS) Input capacitance (DQM0 DQM7) Data input/output capacitance (DQ0 DQ63) Input capacitance A11) Input capacitance (RAS, CAS, Input capacitance (CKE) Input capacitance (CLK) Input capacitance (CS) Input capacitance (DQM0 DQM7) Data input/output capacitance (DQ0 DQ63) Data input/output capacitance (CB0 CB7)
Rev. May. 2003
64MB, 128MB, 256MB Unbuffered DIMM
CHARACTERISTICS M366S0924ETS 64MB Module)
(Recommended operating condition unless otherwise noted, 70°C) Parameter Operating current (One bank active) Precharge standby current power-down mode Precharge standby current power-down mode Active standby current power-down mode Active standby current power-down mode (One bank active) Operating current (Burst mode) Refresh current Self refresh current Symbol ICC1 ICC2P ICC2PS ICC2N ICC2NS ICC3P ICC3PS ICC3N ICC3NS Test Condition Burst length tRC(min) VIL(max), 10ns VIL(max), VIH(min), VIH(min), 10ns Input signals changed time during 20ns VIH(min), VIL(max), Input signals stable VIL(max), 10ns VIL(max), VIH(min), VIH(min), 10ns Input signals changed time during 20ns VIH(min), VIL(max), Input signals stable Page burst 4Banks activated tCCD 2CLKs tRC(min) 0.2V Version
Unit
Note
ICC4 ICC5 ICC6
M366S1723ETS(U) (16M 128MB Module)
(Recommended operating condition unless otherwise noted, 70°C) Parameter Operating current (One bank active) Precharge standby current power-down mode Precharge standby current power-down mode Active standby current power-down mode Active standby current power-down mode (One bank active) Operating current (Burst mode) Refresh current Self refresh current Symbol ICC1 ICC2P ICC2PS ICC2N ICC2NS ICC3P ICC3PS ICC3N ICC3NS Test Condition Burst length tRC(min) VIL(max), 10ns VIL(max), VIH(min), VIH(min), 10ns Input signals changed time during 20ns VIH(min), VIL(max), Input signals stable VIL(max), 10ns VIL(max), VIH(min), VIH(min), 10ns Input signals changed time during 20ns VIH(min), VIL(max), Input signals stable Page burst 4Banks activated tCCD 2CLKs tRC(min) 0.2V Version Unit Note
ICC4 ICC5 ICC6
1600
Notes Measured with outputs open. Refresh period 64ms. Unless otherwise noted, input swing level CMOS(VIH/VIL=VDDQ/VSSQ)
Rev. May. 2003
64MB, 128MB, 256MB Unbuffered DIMM
CHARACTERISTICS M374S1723ETS(U) (16M 128MB Module)
(Recommended operating condition unless otherwise noted, 70°C) Parameter Operating current (One bank active) Precharge standby current power-down mode Precharge standby current power-down mode Active standby current power-down mode Active standby current power-down mode (One bank active) Operating current (Burst mode) Refresh current Self refresh current Symbol ICC1 ICC2P ICC2PS ICC2N ICC2NS ICC3P ICC3PS ICC3N ICC3NS Test Condition Burst length tRC(min) VIL(max), 10ns VIL(max), VIH(min), VIH(min), 10ns Input signals changed time during 20ns VIH(min), VIL(max), Input signals stable VIL(max), 10ns VIL(max), VIH(min), VIH(min), 10ns Input signals changed time during 20ns VIH(min), VIL(max), Input signals stable Page burst 4Banks activated tCCD 2CLKs tRC(min) 0.2V Version
Unit
Note
ICC4 ICC5 ICC6
1800
M366S3323ETS(U) (32M 256MB Module)
(Recommended operating condition unless otherwise noted, 70°C) Parameter Operating current (One bank active) Precharge standby current power-down mode Precharge standby current power-down mode Active standby current power-down mode Active standby current power-down mode (One bank active) Operating current (Burst mode) Refresh current Self refresh current Symbol ICC1 ICC2P ICC2PS ICC2N ICC2NS ICC3P ICC3PS ICC3N ICC3NS Test Condition Burst length tRC(min) VIL(max), 10ns VIL(max), VIH(min), VIH(min), 10ns Input signals changed time during 20ns VIH(min), VIL(max), Input signals stable VIL(max), 10ns VIL(max), VIH(min), VIH(min), 10ns Input signals changed time during 20ns VIH(min), VIL(max), Input signals stable Page burst 4Banks activated tCCD 2CLKs tRC(min) 0.2V Version Unit Note
ICC4 ICC5 ICC6
1120 1840 12.8
Notes Measured with outputs open. Refresh period 64ms. Unless otherwise noted, input swing level CMOS(VIH/VIL=VDDQ/VSSQ)
Rev. May. 2003
64MB, 128MB, 256MB Unbuffered DIMM
CHARACTERISTICS M374S3323ETS(U) (32M 256MB Module)
(Recommended operating condition unless otherwise noted, 70°C) Parameter Operating current (One bank active) Precharge standby current power-down mode Precharge standby current power-down mode Active standby current power-down mode Active standby current power-down mode (One bank active) Operating current (Burst mode) Refresh current Self refresh current Symbol ICC1 ICC2P ICC2PS ICC2N ICC2NS ICC3P ICC3PS ICC3N ICC3NS Test Condition Burst length tRC(min) VIL(max), 10ns VIL(max), VIH(min), VIH(min), 10ns Input signals changed time during 20ns VIH(min), VIL(max), Input signals stable VIL(max), 10ns VIL(max), VIH(min), VIH(min), 10ns Input signals changed time during 20ns VIH(min), VIL(max), Input signals stable Page burst 4Banks activated tCCD 2CLKs tRC(min) 0.2V Version 1080
Unit
Note
ICC4 ICC5 ICC6
1260 2070 14.4
Notes Measured with outputs open. Refresh period 64ms. Unless otherwise noted, input swing level CMOS(VIH/VIL=VDDQ/VSSQ)
Rev. May. 2003
64MB, 128MB, 256MB Unbuffered DIMM
OPERATING TEST CONDITIONS (VDD 3.3V 0.3V, 70°C)
Parameter input levels (Vih/Vil) Input timing measurement reference level Input rise fall time Output timing measurement reference level Output load condition Value 2.4/0.4 tr/tf Fig.
Unit
3.3V
1.4V
1200 Output 50pF (DC) 2.4V, -2mA (DC) 0.4V, Output
50pF
(Fig. output load circuit
(Fig. output load circuit
OPERATING PARAMETER
operating conditions unless otherwise noted) Parameter active active delay delay precharge time active time cycle time Last data precharge Last data Active delay Last data col. address delay Last data burst stop Col. address col. address delay Number valid output data Symbol tRRD(min) tRCD(min) tRP(min) tRAS(min) tRAS(max) tRC(min) tRDL(min) tDAL(min) tCDL(min) tBDL(min) tCCD(min) latency=3 latency=2 Version Unit Note
Notes minimum number clock cycles determined dividing minimum time required with clock cycle time then rounding next higher integer. Minimum delay required complete write. parts allow every cycle column address change. case precharge interrupt, auto precharge read burst stop.
Rev. May. 2003
64MB, 128MB, 256MB Unbuffered DIMM
CHARACTERISTICS operating conditions unless otherwise noted) REFER INDIVIDUAL COMPONENET, WHOLE MODULE.
Parameter cycle time valid output delay Output data hold time latency=3 latency=2 latency=3 latency=2 latency=3 latency=2 tSLZ tSHZ tSAC Symbol 1000 Unit
Note
high pulse width pulse width Input setup time Input hold time output Low-Z output Hi-Z latency=3 latency=2
Notes Parameters depend programmed latency. clock rising time longer than 1ns, (tr/2-0.5)ns should added parameter. Assumed input rise fall time 1ns. longer than 1ns, transient time compensation should considered, i.e., [(tr tf)/2-1]ns should added parameter.
Rev. May. 2003
64MB, 128MB, 256MB Unbuffered DIMM
SIMPLIFIED TRUTH TABLE
Command Register Mode register Auto refresh Refresh Entry Self refresh Exit
CKEn-1 CKEn
(V=Valid, X=Dont care, H=Logic high, L=Logic low)
BA0,1 A10/AP Note
code
address
Column address
Bank active addr. Read column address Write column address Burst stop Precharge Bank selection banks Clock suspend active power down Entry Exit Entry Precharge power down mode Exit operation command Auto precharge disable Auto precharge enable Auto precharge disable Auto precharge enable
Column address
Notes Code Operand code Program keys. MRS) issued only banks precharge state. command issued after clock cycles MRS. Auto refresh functions same refresh DRAM. automatical precharge without precharge command meant "Auto". Auto/self refresh issued only banks precharge state. Bank select addresses. both "Low" read, write, active precharge, bank selected. "High" "Low" read, write, active precharge, bank selected. "Low" "High" read, write, active precharge, bank selected. both "High" read, write, active precharge, bank selected. A10/AP "High" precharge, ignored banks selected. During burst read write with auto precharge, read/write command issued. Another bank read/write command issued after burst. active associated bank issued after burst. Burst stop command valid every burst length. sampled positive going edge masks data-in very (Write latency makes Hi-Z state data-out cycles after. (Read latency
Rev. May. 2003
64MB, 128MB, 256MB Unbuffered DIMM
PACKAGE DIMENSIONS 8Mx64 (M366S0924ETS)
Units Inches (Millimeters)
5.250 (133.350) 0.118 (3.000) 5.014 (127.350)
0.079 2.000) 0.157 0.004 (4.000 0.100)
1.000 (25.40)
0.118 (3.000)
.118DIA +0.004/-0.000 (3.000DIA +0.100/-0.000) 0.350 (8.890)
0.250 (6.350) .450 (11.430) 1.450 (36.830) 4.550 (115.57)
0.250 (6.350) 2.150 (54.61)
0.0984 ±0.008 (2.500 ±0.2)
0.700 (17.780)
0.100 (2.54 Max) (5.08 Min) 0.200
0.050 0.0039 (1.270 0.10) 0.0984 ±0.008
(2.500 ±0.2)
0.250 (6.350)
0.250 (6.350)
0.039 0.002 (1.000 0.050) 0.008 ±0.006 (0.200 ±0.150) 0.050 (1.270)
0.123 0.005 (3.125 0.125) 0.079 0.004 (2.000 0.100)
0.123 0.005 (3.125 0.125) 0.079 0.004 (2.000 0.100)
Detail
Detail
Detail
Tolerances .005(.13) unless otherwise specified used device 8Mx16 SDRAM, TSOPII SDRAM Part K4S281632E
Rev. May. 2003
64MB, 128MB, 256MB Unbuffered DIMM
PACKAGE DIMENSIONS 16Mx64 (M366S1723ETS)
Units Inches (Millimeters)
5.250 (133.350) 0.118 (3.000) 5.014 (127.350)
0.089 (2.26) 0.079 2.000) 0.157 0.004 (4.000 0.100)
1.375 (34.925)
0.118 (3.000)
.118DIA +0.004/-0.000 (3.000DIA +0.100/-0.000) 0.350 (8.890)
0.250 (6.350) .450 (11.430) 1.450 (36.830) 4.550 (115.57)
0.250 (6.350) 2.150 (54.61)
0.0984 ±0.008 (2.500 ±0.2)
0.700 (17.780)
0.100 (2.54 Max) (4.19 Min) 0.165
0.050 0.0039 (1.270 0.10) 0.0984 ±0.008
(2.500 ±0.2)
0.250 (6.350)
0.250 (6.350)
0.039 0.002 (1.000 0.050) 0.008 ±0.006 (0.200 ±0.150) 0.050 (1.270)
0.123 0.005 (3.125 0.125) 0.079 0.004 (2.000 0.100)
0.123 0.005 (3.125 0.125) 0.079 0.004 (2.000 0.100)
Detail
Detail
Detail
Tolerances .005(.13) unless otherwise specified used device 16Mx8 SDRAM, TSOPII SDRAM Part K4S280832E
Rev. May. 2003
64MB, 128MB, 256MB Unbuffered DIMM
PACKAGE DIMENSIONS :16Mx64 (M366S1723ETU)
Units Inches (Millimeters)
5.250 (133.350) 0.118 (3.000) 0.374 (9.505) 0.096 (2.44) 0.125 (3.18) 5.014 (127.350)
0.089 (2.26)
0.050+0.04 1.27+0.1/-0.0) 0.079 2.000) 0.157 0.004 (4.000 0.100)
1.125 (28.575)
0.118 (3.000)
.118DIA +0.004/-0.000 (3.000DIA +0.100/-0.000) 0.350 (8.890)
0.250 (6.350) .450 (11.430) 1.450 (36.830) 4.550 (115.57)
0.250 (6.350) 2.150 (54.61)
0.0984 ±0.008 (2.500 ±0.2)
0.700 (17.780)
0.100 (2.54 Max) (4.19 Min) 0.165
0.050 0.0039 (1.270 0.10) 0.0984 ±0.008
(2.500 ±0.2)
0.250 (6.350)
0.250 (6.350)
0.039 0.002 (1.000 0.050) 0.008 ±0.006 (0.200 ±0.150) 0.050 (1.270)
0.123 0.005 (3.125 0.125) 0.079 0.004 (2.000 0.100)
0.123 0.005 (3.125 0.125) 0.079 0.004 (2.000 0.100)
Detail
Detail
Detail
Tolerances .005(.13) unless otherwise specified used device 16Mx8 SDRAM, TSOPII SDRAM Part K4S280832E
Rev. May. 2003
64MB, 128MB, 256MB Unbuffered DIMM
PACKAGE DIMENSIONS 16Mx72 (M374S1723ETS)
Units Inches (Millimeters)
5.250 (133.350) 0.118 (3.000) 5.014 (127.350)
0.089 (2.26) 0.079 2.000) 0.157 0.004 (4.000 0.100)
1.375 (34.925)
0.118 (3.000)
0.250 (6.350) .450 (11.430) 1.450 (36.830) 4.550 (115.57)
0.250 (6.350) 2.150 (54.61)
0.350 (8.890)
0.0984 ±0.008 (2.500 ±0.2)
.118DIA +0.004/-0.000 (3.000DIA +0.100/-0.000)
0.700 (17.780)
0.100 (2.54 Max) (4.19 Min) 0.165
0.050 0.0039 (1.270 0.10)
0.0984 ±0.008
0.250 (6.350)
0.250 (6.350)
(2.500 ±0.2)
0.039 0.002 (1.000 0.050) 0.008 ±0.006 (0.200 ±0.150) 0.050 (1.270)
0.123 .005 (3.125 .125) 0.079 .004 (2.000 .100)
0.123 .005 (3.125 .125) 0.079 .004 (2.000 .100)
Detail
Detail
Detail
Tolerances .005(.13) unless otherwise specified used device 16Mx8 SDRAM, TSOPII SDRAM Part K4S280832E
Rev. May. 2003
64MB, 128MB, 256MB Unbuffered DIMM
PACKAGE DIMENSIONS 16Mx72 (M374S1723ETU)
Units Inches (Millimeters)
5.250 (133.350) 0.118 (3.000) 0.374 (9.505) 0.096 (2.44) 0.125 (3.18) 5.014 (127.350)
0.089 (2.26)
0.050+0.04 1.27+0.1/-0.0) 0.079 2.000) 0.157 0.004 (4.000 0.100)
1.125 (28.575)
0.118 (3.000)
.118DIA +0.004/-0.000 (3.000DIA +0.100/-0.000) 0.350 (8.890)
0.250 (6.350) .450 (11.430) 1.450 (36.830) 4.550 (115.57)
0.250 (6.350) 2.150 (54.61)
0.0984 ±0.008 (2.500 ±0.2)
0.700 (17.780)
0.100 (2.54 Max) (4.19 Min) 0.165
0.050 0.0039 (1.270 0.10) 0.0984 ±0.008
0.250 (6.350)
0.250 (6.350)
(2.500 ±0.2)
0.039 0.002 (1.000 0.050) 0.008 ±0.006 (0.200 ±0.150) 0.050 (1.270)
0.123 .005 (3.125 .125) 0.079 .004 (2.000 .100)
0.123 .005 (3.125 .125) 0.079 .004 (2.000 .100)
Detail
Detail
Detail
Tolerances .005(.13) unless otherwise specified used device 16Mx8 SDRAM, TSOPII SDRAM Part K4S280832E
Rev. May. 2003
64MB, 128MB, 256MB Unbuffered DIMM
PACKAGE DIMENSIONS 32Mx64 (M366S3323ETS)
Units Inches (Millimeters)
5.250 (133.350) 0.118 (3.000) 5.014 (127.350)
0.079 2.000) 0.157 0.004 (4.000 0.100)
1.375 (34.925)
0.118 (3.000)
.118DIA +0.004/-0.000 (3.000DIA +0.100/-0.000) 0.350 (8.890)
0.250 (6.350) .450 (11.430) 1.450 (36.830) 4.550 (115.57)
0.250 (6.350) 2.150 (54.61)
0.0984 ±0.008 (2.500 ±0.2)
0.700 (17.780)
0.150 (3.81 Max) (4.19 Min) 0.165
0.050 0.0039 (1.270 0.10) 0.0984 ±0.008
(2.500 ±0.2)
0.250 (6.350)
0.250 (6.350)
0.039 0.002 (1.000 0.050) 0.008 0.006 (0.200 0.150) 0.050 (1.270)
0.123 0.005 (3.125 0.125) 0.079 0.004 (2.000 0.100)
0.123 0.005 (3.125 0.125) 0.079 0.004 (2.000 0.100)
Detail
Detail
Detail
Tolerances .005(.13) unless otherwise specified used device 16Mx8 SDRAM, TSOPII SDRAM Part K4S280832E
Rev. May. 2003
64MB, 128MB, 256MB Unbuffered DIMM
PACKAGE DIMENSIONS 32Mx64 (M366S3323ETU)
Units Inches (Millimeters)
5.250 (133.350) 0.118 (3.000) 5.014 (127.350)
0.079 2.000) 0.157 0.004 (4.000 0.100)
1.125 (28.575)
0.118 (3.000)
.118DIA +0.004/-0.000 (3.000DIA +0.100/-0.000) 0.350 (8.890)
0.250 (6.350) .450 (11.430) 1.450 (36.830) 4.550 (115.57)
0.250 (6.350) 2.150 (54.61)
0.0984 ±0.008 (2.500 ±0.2)
0.700 (17.780)
0.150 (3.81 Max) (4.19 Min) 0.165
0.050 0.0039 (1.270 0.10) 0.0984 ±0.008
(2.500 ±0.2)
0.250 (6.350)
0.250 (6.350)
0.039 0.002 (1.000 0.050) 0.008 0.006 (0.200 0.150) 0.050 (1.270)
0.123 0.005 (3.125 0.125) 0.079 0.004 (2.000 0.100)
0.123 0.005 (3.125 0.125) 0.079 0.004 (2.000 0.100)
Detail
Detail
Detail
Tolerances .005(.13) unless otherwise specified used device 16Mx8 SDRAM, TSOPII SDRAM Part K4S280832E
Rev. May. 2003
64MB, 128MB, 256MB Unbuffered DIMM
PACKAGE DIMENSIONS 32Mx72 (M374S3323ETS)
Units Inches (Millimeters)
5.250 (133.350) 0.118 (3.000) 5.014 (127.350)
0.079 2.000) 0.157 0.004 (4.000 0.100)
1.375 (34.925)
0.118 (3.000)
.118DIA +0.004/-0.000 (3.000DIA +0.100/-0.000) 0.350 (8.890)
0.250 (6.350) .450 (11.430) 1.450 (36.830) 4.550 (115.57)
0.250 (6.350) 2.150 (54.61)
0.0984 ±0.008 (2.500 ±0.2)
0.700 (17.780)
0.150 (3.81 Max) (4.19 Min) 0.165
0.050 0.0039 (1.270 0.10) 0.0984 ±0.008
(2.500 ±0.2)
0.250 (6.350)
0.250 (6.350)
0.039 0.002 (1.000 0.050) 0.008 ±0.006 (0.200 ±0.150) 0.050 (1.270)
0.123 0.005 (3.125 0.125) 0.079 0.004 (2.000 0.100)
0.123 0.005 (3.125 0.125) 0.079 0.004 (2.000 0.100)
Detail
Detail
Detail
Tolerances 0.005(.13) unless otherwise specified used device 16Mx8 SDRAM, TSOPII SDRAM Part K4S280832E
Rev. May. 2003
64MB, 128MB, 256MB Unbuffered DIMM
PACKAGE DIMENSIONS 32Mx72 (M374S3323ETU)
Units Inches (Millimeters)
5.250 (133.350) 0.118 (3.000) 5.014 (127.350)
0.079 2.000) 0.157 0.004 (4.000 0.100)
1.125 (28.575)
0.118 (3.000)
.118DIA +0.004/-0.000 (3.000DIA +0.100/-0.000) 0.350 (8.890)
0.250 (6.350) .450 (11.430) 1.450 (36.830) 4.550 (115.57)
0.250 (6.350) 2.150 (54.61)
0.0984 ±0.008 (2.500 ±0.2)
0.700 (17.780)
0.150 (3.81 Max) (4.19 Min) 0.165
0.050 0.0039 (1.270 0.10) 0.0984 ±0.008
(2.500 ±0.2)
0.250 (6.350)
0.250 (6.350)
0.039 0.002 (1.000 0.050) 0.008 ±0.006 (0.200 ±0.150) 0.050 (1.270)
0.123 0.005 (3.125 0.125) 0.079 0.004 (2.000 0.100)
0.123 0.005 (3.125 0.125) 0.079 0.004 (2.000 0.100)
Detail
Detail
Detail
Tolerances 0.005(.13) unless otherwise specified used device 16Mx8 SDRAM, TSOPII SDRAM Part K4S280832E
Rev. May. 2003

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