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Microprocessor-Compatible 16-BIT DIGITAL-TO-ANALOG CONVERTERS TWO
Top Searches for this datasheetDAC707 DAC708 DAC709 Microprocessor-Compatible 16-BIT DIGITAL-TO-ANALOG CONVERTERS TWO-CHIP CONSTRUCTION HIGH-SPEED 16-BIT PARALLEL, 8-BIT (BYTE) PARALLEL, SERIAL INPUT MODES DOUBLE-BUFFERED INPUT REGISTER CONFIGURATION VOUT IOUT MODELS HIGH ACCURACY: Linearity Error ±0.003% Differential Linearity Error ±0.006% MONOTONIC BITS) OVER SPECIFIED TEMPERATURE RANGE HERMETICALLY SEALED COST PLASTIC VERSIONS AVAILABLE (DAC707JP/KP) DESCRIPTION DAC708 DAC709 16-bit converters designed interface 8-bit microprocessor bus. 16bit data loaded successive 8-bit bytes into parallel 8-bit latches before being transferred into latch. DAC708 DAC709 current voltage output models respectively 24-pin hermetic DIPs. Input coding Binary Two's Complement (bipolar) Unipolar Straight Binary (unipolar, when external logic inverter used invert MSB). addition, DAC708/709 loaded serially (MSB first). DAC707 designed interface 16-bit bus. 8-Bit (DAC708, 709) 16-Bit (DAC707) Serial Data Byte Latch High Byte Latch Latch Reference Circuit 16-Bit Converter Bipolar Offset Data written into 16-bit latch subsequently latch. DAC707 bipolar voltage output input coding Binary Two's Complement (BTC). models have Write Clear control lines well input latch enable lines. addition, DAC708 DAC709 have Chip Select control lines. bipolar mode, Clear input sets latch give zero voltage current output. They 14-bit accurate complete with reference, DAC707, DAC709, voltage output amplifier. models available with optional burn-in screening. Summing Junction (708, 709) Range (708, 709) Serial (DAC708, 709) VOUT Latch Enables/ Mode Select CLEAR WRITE CHIP SELECT Control Logic DAC707 DAC709 Only DAC707/708/709 Block Diagram International Airport Industrial Park Mailing Address: 11400, Tucson, 85734 Street Address: 6730 Tucson Blvd., Tucson, 85706 Tel: (520) 746-1111 Twx: 910-952-1111 Internet: http://www.burr-brown.com/ FAXLine: (800) 548-6133 (US/Canada Only) Cable: BBRCORP Telex: 066-6491 FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132 PDS-557H SBAS145 SPECIFICATIONS ELECTRICAL +25°C, ±15V, +5V, after 10-minute warm-up, unless otherwise noted. DAC707/708/709KH, DAC707KP DAC707/708/ 709BH, UNITS DAC707JP PRODUCT INPUT DIGITAL INPUT Resolution Bipolar Input Code (all models) Unipolar Input Code(1) (DAC708/709 only) Logic Levels(2): +2.7V) +0.4V) TRANSFER CHARACTERISTICS ACCURACY(3) Linearity Error Differential Linearity Error(5) Bipolar Zero(5, Gain Error(7) Zero Error(7) Monotonicity Over Spec Temp Range Power Supply Sensitivity: +VCC, -VCC DRIFT (Over Spec Temp Range(3)) Total Error Over Temp Range(8) Total Full Scale Drift Gain Drift Zero Drift: Unipolar (DAC708/709 only) Bipolar (all models) Differential Linearity Over Temp(5) Linearity Error Over Temp(5) SETTLING TIME ±0.003% FSR)(9) Voltage Output Models Full Scale Step load) 1LSB Step Worst Case Code(10) Slew Rate Current Output Models Full Scale Step (2mA): Load Load OUTPUT VOLTAGE OUTPUT MODELS Output Voltage Range DAC709: Unipolar (USB Code) Bipolar (BTC Code) DAC707 Bipolar (BTC Code) Output Current Output Impedance Short Circuit Common Duration CURRENT OUTPUT MODELS Output Current Range (±30% typ) DAC708: Unipolar (USB Code) Bipolar (BTC Code) Unipolar Output Impedance (±30% typ) Bipolar Output Impedance (±30% typ) Compliance Voltage ±0.003 ±0.0045 ±0.07 ±0.05 ±0.0015 ±0.0001 ±0.08 ±0.006 ±0.001 ±0.006 ±0.012 ±0.30 ±0.1 Binary Two's Complement +2.0 -1.0 +5.5 +0.8 Unipolar Straight Binary Bits ±0.0015 ±0.003 ±0.003 ±2.5 ±0.003 ±0.006 ±0.006 ±0.15 ±0.15 +0.009, -0.006 ±0.006 ±0.0015 ±0.05 ±1.5 ±0.003 ±0.10 ±0.003 ±0.10 FSR(4) Bits FSR/%VCC FSR/%VDD FSR/°C ppm/°C FSR/°C FSR/°C ±0.012 ±0.012 V/µs 0.15 Indefinite 2.45 ±2.5 information provided herein believed reliable; however, BURR-BROWN assumes responsibility inaccuracies omissions. BURR-BROWN assumes responsibility this information, such information shall entirely user's risk. Prices specifications subject change without notice. patent rights licenses circuits described herein implied granted third party. BURR-BROWN does authorize warrant BURR-BROWN product life support devices and/or systems. DAC707/708/709 ELECTRICAL (CONT) +25°C, ±15V, +5V, after 10-minute warm-up, unless otherwise noted. DAC707/708/709KH, DAC707KP DAC707/708/ 709BH, UNITS DAC707JP PRODUCT POWER SUPPLY REQUIREMENTS Voltage (all models): +VCC -VCC Current Load, +15V Supplies) Current Output Models: +VCC -VCC Voltage Output Models: +VCC -VCC Power Dissipation (±15V supplies) Current Output Models Voltage Output Models TEMPERATURE RANGE Specification: Grades Grades Grades Storage: Ceramic Plastic +13.5 -13.5 +4.5 +16.5 -16.5 +5.5 +150 +125 +150 +100 *Specification same models column left. NOTES: must inverted externally prior DAC708/709 input. Digital inputs TTL, LSTTL, 54/74C, 54/74HC 54/74HTC compatible over specified temperature range. DAC708 (current-output models) specified tested with external output operational amplifier connected using internal feedback resistor tests. means Full Scale Range. example, ±10V output, 20V. ±0.0015% Full Scale Range equal 16-bit resolution, ±0.003% Full Scale Range equal 15-bit resolution. ±0.006% Full Scale Range equal 14-bit resolution. Error input code 0000H. (For unipolar connection DAC708/709, must inverted externally prior input.) Adjustable zero with external trim potentiometer. Adjusting gain potentiometer rotates transfer function around bipolar zero point. With gain zero errors adjusted zero +25°C. Maximum represents limit. 100% tested this parameter. (10) bipolar worst-case code change FFFFH 0000H 0000H FFFFH. unipolar (DAC708/709 only) 7FFFH 8000H 8000H 7FFFH. PACKAGE INFORMATION PRODUCT DAC707JP DAC707KP DAC707BH DAC707KH DAC707SH DAC708BH DAC708KH DAC708SH DAC709BH DAC709KH DAC709SH PACKAGE 28-Pin Plastic Wide 28-Pin Plastic Wide 28LD Side Brazed Hermetic 28LD Side Brazed Hermetic 28LD Side Brazed Hermetic 24LD Side Brazed Hermetic 24LD Side Brazed Hermetic 24LD Side Brazed Hermetic 24LD Side Brazed Hermetic 24LD Side Brazed Hermetic 24LD Side Brazed Hermetic PACKAGE DRAWING NUMBER(1) ABSOLUTE MAXIMUM RATINGS COMMON +15V +VCC COMMON +18V -VCC COMMON -18V Digital Data Inputs COMMON -0.5V, +0.5 Current input ±10mA Reference COMMON Indefinite Short COMMON VOUT (DAC707, DAC709) Indefinite Short COMMON External Voltage Applied (pin DAC708) ±18V External Voltage Applied Output (pin DAC707; DAC709) Power Dissipation 1000mW Storage Temperature -60°C +150°C Lead Temperature (soldering, 10s) 300°C Stresses above those listed under "Absolute Maximum Ratings" cause permanent damage device. Exposure absolute maximum conditions extended periods affect device reliability. ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit damaged ESD. Burr-Brown recommends that integrated circuits handled with appropriate precautions. Failure observe proper handling installation procedures cause damage. damage range from subtle performance degradation complete device failure. Precision integrated circuits more susceptible damage because very small parametric changes could cause device meet published specifications. NOTE: detailed drawing dimension table, please data sheet, Appendix Burr-Brown Data Book. DAC707/708/709 ORDERING INFORMATION PRODUCT DAC707JP DAC707JP-BI(1) DAC707KP DAC707KP-BI(1) DAC707KH DAC707KH-BI(1) DAC707BH DAC707BH-BI(1) DAC707SH DAC707SH-BI(1) DAC708KH DAC708BH DAC708SH DAC709KH DAC709BH DAC709SH NOTE: piece minimum order. TEMPERATURE RANGE +70°C +70°C +70°C +70°C +70°C +70°C -25°C +85°C -25°C +85°C -55°C +125°C -55°C +125°C +70°C -25°C +85°C -55°C +125°C +70°C -25°C +85°C -55°C +125°C INPUT CONFIGURATION 16-bit port 16-bit port 16-bit port 16-bit port 16-bit port 16-bit port 16-bit port 16-bit port 16-bit port 16-bit port 8-bit port 8-bit port 8-bit port 8-bit port 8-bit port 8-bit port OUTPUT CONFIGURATION ±10V output ±10V output ±10V output ±10V output ±10V output ±10V output ±10V output ±10V output ±10V output ±10V output ±1mA output ±1mA output ±1mA output ±10V output ±10V output ±10V output CONNECTION DIAGRAMS DAC708/709 Register Enable Lines (D15) (D14) (D13) Data Inputs (D12) (D11) (D10) (D9) (D8)/S1 DCOM -VCC +VCC DAC709 Only Byte Latch High Byte Latch Latch 16-Bit Reference Circuit Ladder Resistor Network Current Switches Control Lines NOTES: Potentiometer 100k Decoupling capcitors 0.1µF 1.0µF. -VCC 270k Gain Adjust 3.9M +VCC ACOM VOUT Offset Adjust Connect bipolar operation. Connect range. Leave open range. DAC707 DCOM ACOM Input Latch (LSB) 16-Bit Ladder Resistor Network Current Switches Digital Inputs Digital Common Analog Common Offset Adjust 3.9M 270k +VCC Gain Adjust -VCC Control Lines Latch Enable Lines (MSB) Digital Inputs NOTES: Potentiometers 100k Decoupling capcitors 0.1µF 1.0µF. Bypass, 0.0022µF 0.01µF. DAC707/708/709 Latch DESCRIPTION FUNCTIONS DAC707 DESIGNATOR VOUT DESCRIPTION Voltage output DAC707 (±10V) Logic supply (+5V) DESIGNATOR DAC708/709 DESCRIPTION Latch enable latch (Active low) Latch enable "low byte" input (Active low). When both logic "0", serial input mode selected serial input enabled. Latch enable "high byte" input (Active low). When both logic "0", serial input mode selected serial input enabled. Input data enabling byte (LB) latch data enabling high byte (HB) latch. Input data enabling latch data enabling latch. DCOM Digital common ACOM Analog common Summing junction internal output DAC707. Offset adjust circuit connected summing junction output amplifier. Refer Block Diagram. Gain adjust pin. Refer Connection Diagram gain adjust circuit. Positive supply voltage (+15V) Negative supply voltage (-15V) Clear line. Sets input latch zero sets latch input code that gives bipolar zero output (Active low) Write control line (Active low) Enable converter latch (Active low) Enable input latch (Active low) Data (Most Significant Bit) (D15) (D14) +VCC -VCC (D13) (D12) (D11) (D10) Data (LB) data (HB) Data (LB) data (HB) Data (LB) data (HB) Data (LB) data (HB) (MSB) (D9) (D8)/SI DCOM Data (LB) data (HB) Data (LB) data (HB). Serial input when serial mode selected. Digital common Feedback resistor internal external operational amplifier. Connect when output range desired. Leave open output range. Voltage output DAC709 feedback resistor with external output DAC708. Refer Connection Diagram connection external DAC708. Analog common Summing junction internal output DAC709, current output DAC708. Refer Connection Diagram connection external DAC708. Bipolar offset. Connect when operating bipolar mode. Leave open unipolar mode. Gain adjust Positive supply voltage (+15V) Negative supply voltage (-15V) Clear line. Sets high byte input registers zero and, bipolar operation, sets register input code that gives bipolar zero output. unipolar mode, invert prior D/A.) Write control line Chip select control line Logic supply (+5V) Data VOUT (DAC708) Data Data ACOM (DAC709) IOUT (DAC708) Data Data Data Data Data +VCC -VCC (LSB) Data Data Data Data Data Data Data (Least Significant Bit) (The DAC708 DAC709 24-pin packages) DAC707/708/709 DISCUSSION SPECIFICATIONS DIGITAL INPUT CODES bipolar operation, DAC707/708/709 accept positivetrue binary two's complement input code. unipolar operation (DAC708/709 only) input code positive-true straight-binary provided that input inverted with external inverter. Table ANALOG OUTPUT Digital Input Codes 7FFFH 0000H FFFFH 8000H Unipolar Straight Binary(1) (DAC708/709 only; connected Unipolar operation) +1/2 Full Scale -1LSB(2) Zero +Full Scale +1/2 Full Scale Binary Two's Complement (Bipolar operation; models) +Full Scale Zero -1LSB -Full Scale must inverted). This code corresponds zero volts (DAC707 DAC709) zero milliamps (DAC708) analog output. maximum change offset tMIN tMAX referenced zero error +25°C divided temperature change. This drift expressed FSR/ SETTLING TIME Settling time total time required analog output settle within error band around final value after change digital input. Refer Figure typical values this family products. Final-Value Error Band Percent Full-Scale Range FSR) DAC707 DAC708 0.01 DAC709 NOTES: must inverted externally. Assumes inverted externally. TABLE Digital Input Codes. ACCURACY Linearity This specification describes most important measures performance converter. Linearity error deviation analog output from straight line drawn through points (-Full Scale point +Full Scale point). Differential Linearity Error Differential Linearity Error (DLE) converter deviation from ideal 1LSB change output when input changes from adjacent code next. differential linearity error specification ±1/2LSB means that output step size between 1/2LSB 3/2LSB when input changes between adjacent codes. negative specification -1LSB maximum (-0.006% 14-bit resolution) insures monotonicity. Monotonicity Monotonicity assures that analog output will increase remain same increasing input digital codes. DAC707/708/709 specified monotonic bits over entire specification temperature range. DRIFT Gain Drift Gain Drift measure change full-scale range output over temperature expressed parts million degree centigrade (ppm/°C). Gain drift established testing point differences tMIN, +25°C tMAX; calculating gain error with respect +25°C value; dividing temperature change. Zero Drift Zero Drift measure change output with 0000H applied converter inputs over specified temperature range. (For DAC708/709 unipolar mode, 0.001 0.01 Settling Time (µs) FIGURE Final-Value Error Band Versus Full-Scale Range Settling Time. Voltage Output Settling times specified ±0.003% (±1/2LSB bits) input conditions: full-scale range change (±10V) (±5V 10V) 1LSB change "major carry", point which worstcase settling time occurs. (This worst-case point since input bits change when going from code next.) Current Output Settling times specified ±0.003% fullscale range change output load conditions: 1000. specified this because output time constant becomes dominant factor determining settling time large resistive loads. COMPLIANCE VOLTAGE Compliance voltage applies only current output models. maximum voltage swing allowed output current while still being able maintain specified accuracy. POWER SUPPLY SENSITIVITY Power supply sensitivity measure effect change power supply voltage converter DAC707/708/709 output. defined percent change output percent change either positive supply (+VCC), negative supply (-VCC) logic supply (VDD) about nominal power supply voltages (see Figure specified frequency changes. typical performance curve Figure shows effect high frequency changes power supply voltages. Zero Adjustment unipolar (USB) configurations, apply digital input code that produces zero voltage zero current output adjust zero potentiometer zero output. bipolar (BTC) configurations, apply digital input code that produces zero output voltage current. Table corresponding codes connection diagrams zero adjustments circuit connections. Zero calibration should made before gain calibration. Gain Adjustment Apply digital input that gives maximum positive output voltage. Adjust gain potentiometer this positive full-scale voltage. Table positive full-scale voltages Connection Diagrams gain adjustment circuit connections. Error Change VSUPPLY 0.030 0.025 -15V Supply 0.020 0.015 0.010 0.005 100k Supply +15V Supply Range Gain Adjust Full Scale 1LSB Power Supply Ripple Frequency (Hz) Full Scale Range FIGURE Power Supply Rejection Versus Power Supply Ripple Frequency. Analog Output Gain Adjust Rotates Line OPERATING INSTRUCTIONS POWER SUPPLY CONNECTIONS optimum performance noise rejection, power supply decoupling capacitors should added shown Connection Diagram. tantalum capacitors should located close converter. EXTERNAL ZERO GAIN ADJUSTMENT Zero gain trimmed installing external zero gain potentiometers. Connect these potentiometers shown Connection Diagram adjust described below. potentiometers should 100ppm/°C less. 3.9M 270k resistors (±20% carbon better) should located close converter prevent noise pickup. convenient these high-value resistors, equivalent network, shown Figure substituted place 3.9M resistor. 0.001µF 0.01µF ceramic capacitor should connected from GAIN ADJUST ANALOG COMMON prevent noise pickup. Refer Figures relationship zero gain adjustments unipolar converters. Range Zero Adjust Input 0000 Input FFFFH Digital Input Zero Adjust Translates Line FIGURE Relationship Zero Gain Adjustments Unipolar Converters, DAC708 DAC709. Full Scale 1LSB Input 8000H Full Scale Range Gain Adjust Rotates Line Range Gain Adjust Analog Output Offset Adjust Translates Line Range Offset Adjust Input 7FFFH Input 0000H 3.9M 180k 180k Full Scale Digital Input FIGURE Equivalent Resistances. FIGURE Relationship Zero Gain Adjustments Bipolar Converters, DAC707 DAC708/ DAC707/708/709 VOLTAGE OUTPUT MODELS Digital Input Code FFFFH 0000H Analog Output Unipolar, +10V(1) 16-Bit +9.99985 15-Bit +9.99969 14-Bit +9.99939 Units Digital Input Code 7FFFH 8000H Analog Output Bipolar, ±10V 16-Bit +9.99960 -10.0000 15-Bit +9.99939 -10.0000 14-Bit 1224 +9.99878 -10.0000 16-Bit +4.99980 -5.0000 Bipolar, 15-Bit +4.99970 -5.0000 14-Bit +4.99939 -5.0000 Units CURRENT OUTPUT MODELS Digital Input Code 16-Bit FFFFH 0000H 0.031 -1.99997 Analog Output Unipolar, -2mA 15-Bit 0.061 -1.99994 14-Bit 0.122 -1.99988 Units 7FFFH 8000H Digital Input Code 16-Bit 0.031 -0.99997 +1.00000 Analog Output Bipolar, ±1mA 15-Bit 0.061 -0.99994 +1.00000 14-Bit 0.122 -0.99988 +1.00000 Units NOTE: assumed inverted externally. TABLE Digital Input Analog Output Voltage/Current Relationships. INTERFACE LOGIC TIMING DAC708/709 signals CHIP SELECT (CS), WRITE (WR), register enables (A0, CLEAR (CLR), provide control functions microprocessor interface. They active "low" logic state. must access registers. steer input 8-bit data byte low- high-byte input latch respectively. gates contents input latches through latch parallel. contents then applied input converter. When goes low, data strobed into latch latches which have been enabled. serial input mode activated when both logic simultaneously. (D8)/SI input data line accepts serial data first. Each clocked pulse. Data strobed through latch going logic same parallel input mode. Each latches made "transparent" maintaining enable signal logic "0". However, stated above, when both logic same time, serial mode selected. line resets both input latches zeros sets latch 0000H. This binary code that gives null, zero, output bipolar mode. unipolar mode, activating will cause output one-half full scale. maximum clock rate latches 10MHz. minimum time between write (WR) pulses successive enables 20ns. serial input mode (DAC708 DAC709), maximum rate which data clocked into input shift register 10MHz. timing control signals given Figure DAC707 DAC707 interface timing same that described above except instead 8-bit separately-enabled input latches, single 16-bit input latch enabled LOGIC TIMING Parallel Serial Data Input Over Temperature Data valid valid valid Write pulse width Data hold after TIMING DIAGRAM D0-D15, FIGURE Logic Timing Diagram. latch enabled Also, there serial-input mode CHIP SELECT (CS) line. INSTALLATION CONSIDERATIONS extremely-high accuracy converter, system design problems such grounding contact resistance become very important. 16-bit converter with +10V full-scale range, 1LSB 153µV. With load current 5mA, series wiring connector resistance only will cause output error 1LSB. understand what this means terms system layout, resistance typical ounce copper-clad printed circuit board material approximately 1/2m square. example above, milliinch-wide conductor milliinches long would cause 1LSB error. DAC707/708/709 DAC707/709 MicroProcessor Interface Figures lead contact resistances represented through long load resistance constant, simply introduces gain error removed with gain calibration. part output voltage sensed ANALOG COMMON. Digital Common Analog Common Sense Output Alternate Ground Sense Connection System Ground +VCC Analog Common -VCC Digital Common Supply Figures show methods connecting current output model with external precision output amp. sensing output voltage load resistor (connecting output amplifier effect greatly reduced. will cause gain error independent value eliminated initial calibration adjustments. effect negligible because inside feedback loop output therefore greatly reduced loop gain. many applications impractical sense output voltage ANALOG COMMON. Sensing output voltage system ground point permissible because these converters have separate analog digital common lines analog return current near-constant varies only 10µA 20µA over entire input code range. large without adversely affecting linearity converter. voltage drop across constant appears zero error that nulled with zero calibration adjustment. Another approach senses output load shown Figure this circuit output voltage sensed load common converter common previous circuits. value must adjusted maximum common-mode rejection across effect negligible explained previously. converter wiring connectors should located provide optimum isolation from sources EMI. elimination radiation pickup small loop area. Signal leads their return conductors should kept close together such that they present small flux-capture cross section external field. ±VCC Supply FIGURE DAC707/709 Bipolar Output Circuit (Voltage Out). DAC708 MicroProcessor Interface IOUT 2.45k DAC708 Digital Common Analog Common Sense Output Alternate Ground Sense Connection System Ground +VCC Analog Common -VCC Digital Common Supply RDAC Sense Output ±VCC Supply System Ground FIGURE Alternate Connection Ground Sensing Load (Current Output Models). FIGURE DAC708 Bipolar Output Circuit (with External Amp). DAC707/708/709 BURN-IN SCREENING Burn-in screening option available DAC707. Burn-in duration hours temperature shown below equivalent combination time temperature). Product Temp. Range Burn-In Screening DAC707JP-BI 70°C 100°C DAC707KP-BI 70°C 100°C DAC707KH-BI -25°C +85°C 125°C DAC707BH-BI -25°C +85°C 125°C DAC707SH-BI -55°C +125°C 125°C units tested after burn-in ensure that grade specifications met. signal lines need isolated. data applied serial stream, first. input used data strobe, clocking each data bit. RESET signal provided system startup reset. These three signals each optically isolated. Once bits serial data have been strobed into input register pair, data strobed through register "carry" signal 4-bit binary synchronous counter that counted pulses used clock data. circuit diagram given Figure CONNECTING MULTIPLE DAC707s 16-BIT MICROPROCESSOR Figure illustrates method connecting multiple DAC707s 16-bit microprocessor bus. circuit shown DAC707s uses only address line select either input register register. external address decoder selects desired converter. APPLICATIONS LOADING DAC709 SERIALLY ACROSS ISOLATION BARRIER very useful application DAC709 achieving low-cost isolation that preserves high accuracy. Using serial input feature input register pair, only three DAC707/708/709 74LS161A Carry Load Synchronous Binary Counter 0.001µF Connection 2.2k 74LS00 2.2k TIL117 Analog Output DATA STROBE 7407 2.2k DAC708 DAC709 Serial Input (16-Bit Data Stream) 7407 74LS00 74LS00 2.2k ACOM DCOM -VCC +VCC RESET 7407 Power Supply Voltage Isolated Power Supply 2.2µF Isolation Barrier DATA STROBE Serial Input Analog Output FIGURE Serial Loading Electrically Isolated DAC708/709. 16-Bit Data 16-Bit Address Base Address Decoder DAC707 VOUT DAC707 VOUT FIGURE Connecting Multiple DAC707s 16-Bit Microprocessor. DAC707/708/709 PACKAGE OPTION ADDENDUM www.ti.com 10-Nov-2003 PACKAGING INFORMATION ORDERABLE DEVICE DAC707JP DAC707JP-BI DAC707KP DAC707KP-7 DAC707KP-BI DAC709KH DAC709KH-2 STATUS(1) NRND OBSOLETE NRND OBSOLETE OBSOLETE OBSOLETE OBSOLETE PACKAGE TYPE PDIP PDIP PDIP PDIP PDIP CDIP CDIP PACKAGE DRAWING PINS PACKAGE marketing status values defined follows: ACTIVE: Product device recommended designs. LIFEBUY: announced that device will discontinued, lifetime-buy period effect. NRND: recommended designs. Device production support existing customers, does recommend using this part design. PREVIEW: Device been announced production. Samples available. OBSOLETE: discontinued production device. IMPORTANT NOTICE Texas Instruments Incorporated subsidiaries (TI) reserve right make corrections, modifications, enhancements, improvements, other changes products services time discontinue product service without notice. Customers should obtain latest relevant information before placing orders should verify that such information current complete. products sold subject TI's terms conditions sale supplied time order acknowledgment. warrants performance hardware products specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques used extent deems necessary support this warranty. Except where mandated government requirements, testing parameters each product necessarily performed. assumes liability applications assistance customer product design. Customers responsible their products applications using components. minimize risks associated with customer products applications, customers should provide adequate design operating safeguards. does warrant represent that license, either express implied, granted under patent right, copyright, mask work right, other intellectual property right relating combination, machine, process which products services used. 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