Revision History Features Overview.6 Assignment Signal Descriptions.8

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AC'97 CODEC 9761 Datasheet Rev.
Revision History Features Overview.6 Assignment Signal Descriptions.8 Power Ground AC-Link Clocking Digital Analog Filter Reference.10 Configuration Jack Detection Configuration Information. Resistors Network Method Configuration Diagram Characteristics AC-Link Timing Characteristics.14 Cold Reset Timing Warm Reset Timing AC-Link Clocks Data Output Input Timing Signal Rise Fall Timing.17 AC-Link Power Mode Timing.18 Test Mode Analog Performance Characteristics.19 Package Dimension.20
Copyright 2003-2004 C-Media Electronics Inc.
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AC'97 CODEC 9761 Datasheet Rev.
List Figures
Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Assignment Resistors Network Method Jack Detection Recommended Configuration Diagram Cold Reset Timing Diagram Warm Reset Timing Diagram BIT_CLK SYNC Timing Diagram Data Output Input Timing Diagram Signal Rise Fall Timing Diagram.17 AC-Link Power Mode Timing Diagram.18 Test Mode Timing Diagram.18 Mechanical Dimension
Copyright 2003-2004 C-Media Electronics Inc.
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AC'97 CODEC 9761 Datasheet Rev.
Revision History
Date 2003/06/30 Revision Description Preliminary Version
Copyright 2003-2004 C-Media Electronics Inc.
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AC'97 CODEC 9761 Datasheet Rev.
Features
Basic features: Full-duplex channel channel High audio quality much beyond 2001 requirements (A-A Support 96KHz double sample rate playback DVD-Audio Internal circuit saving external crystal features AC'97 codec: Extensive jack-detection capability covering front back panel jacks patented resistor network method that save much cost Precise advanced impedance sensing audio device identification, smart configuration, smart device memorization (with Smart Wizard support) Support stereo microphones recording playback improve telephony voice recognition applications (via noise reduction acoustic echo cancellation) Integrated digital Beep BIOS control. Versatile functionalities: Stereo Line-In jack Surround-Out. Stereo Mic-In jack Center/LFE output Built-in headphone amplifiers Line-Out/Surround-Out pins High-quality differential analog input supports stand-by-power playing mode consumer systems Video stereo inputs GPIO (General Purpose I/O) support additional surround audio bracket detection EAPD (External Amplifier Power Down) support. S/PDIF support: Output: with bits Input: 44.1 with bits (with S/PDIF-In interrupt, auto-lock, anti-noise, anti-distortion enhancement)
Copyright 2003-2004 C-Media Electronics Inc. Page
AC'97 CODEC 9761 Datasheet Rev.
Valuable software technology: Support Dolby Digital RTCE (Real-Time Content Encoder) output Dolby-certified MB/Media Center applications (optional) Xear sound technology: Virtual SPEAKER SHIFTER Earphone Plus listening mode (earphone place rear speakers) Sensaura® CRL3D HRTF positional sound enhancement Support Creative 1.0/2.0, Microsoft® DirectSound (DirectX) H/W&S/W, realistic game playing Karaoke functionality includes unique Microphone Echo, Shifting, Vocal Cancellation features 10-Band Equalizer with pre-set modes listening environment effects plus environmental sizes emulation Dynamic Auto-Gain-Control technology preventing volume saturation distortion playback recording Provide Microsoft WHQL certified drivers compatible with Intel®, SiS®, VIA®, ALi®, nVidia® AC'97 audio controllers
Copyright 2003-2004 C-Media Electronics Inc.
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AC'97 CODEC 9761 Datasheet Rev.
Overview
C-Media CMI9761 channel, Intel® AC'97 Rev. compliant audio codec. It's applicable extensive chipsets including Intel® ICHx series well those supplied SiS®, VIA®, Ali®, nVidia®. universal driver passed Microsoft WHQL certification Windows 2000, also Windows Linux driver. excellent audio quality (SNR>95dB), cost-effective design, powerful/sophisticated driver makes CMI9761 best solution designing multimedia desktops, media center, notebooks. versatile features CMI9761 satisfy customer's system requirements create value more than users' expectation. jack-detection impedance-sensing patented technology within CMI9761 minimize user's intervention try-and-error effort during initial setup. With precise advanced sensing technology, CMI9761 detect most device classes correctly with smart learning ability make smart configuration accordingly. Therefore, will reduce customer service cost give users very positive impression. optional Dolby® Digital Real-Time Content Encoder (RTCE) embedded driver promote much value products with Dolby logo system. makes able transmit multi-channel Dolby® Digital audio stream with distortion noise external decoder digital S/PDIF link utilize users' high-quality Home Theater acoustics. realizes media center concept facilitates online audio streaming application home. bits S/PDIF output capability CMI9761 easily distribute premium-quality sound such DVD-Audio Consumer Electronics. Combining with C-Media innovative Xear 3D5.1 Virtual SPEAKER SHIFTER sound technology, even audiophiles will surprised better-than-soundcard features will enjoy convenience 5.1CH sound speakers magic moving each virtual speaker anywhere they want.
Copyright 2003-2004 C-Media Electronics Inc. Page
AC'97 CODEC 9761 Datasheet Rev.
Assignment
Signal Name DVDD1 XTL_IN XTL_OUT DVSS1 SDATA_OUT BIT_CLK DVSS2 SDATA_IN DVDD2 SYNC RESET# JACKSENSE2 AUX_L AUX_R VIDEO_L VIDEO_R CD_L CD_C CD_R MIC1 MIC2 LINE_IN_L LINE_IN_R Signal Name AVDD1 AVSS1 VREF VREFOUT1 VREFOUT2 FMIC_R FMIC_L LINEOUT_L LINEOUT_R EXT_R AVDD2 SURR_OUT_L JACKSENSE1 SURR_OUT_R AVSS2 CENTER_OUT LFE_OUT HP_ON GPIO0 XTLSEL GPIO1 EAPD SPDIFI SPDIFO
C-Media CMI9761
Figure Assignment
Copyright 2003-2004 C-Media Electronics Inc. Page
AC'97 CODEC 9761 Datasheet Rev.
Signal Descriptions
Power Ground
digital portion CMI9761 operates 3.3V analog portion operates grounds should separated well assure best analog audio quality. Signal Name Type Description DVDD1 DVSS1 DVSS2 DVDD2 AVDD1 AVSS1 AVDD2 AVSS2 Digital (3.3V) Digital ground Digital ground Digital (3.3V) Analog (5V) Analog ground Analog (5V) Analog ground
AC-Link Clocking
These signals connect CMI9761 AC'97 controller counterpart external crystal oscillator clock source. Signal Name Type Description XTL_IN XTL_OUT SDATA_OUT BIT_CLK SDATA_IN SYNC RESET# 24.576 crystal input 14.318 oscillator input 24.576 crystal output (for 14.318 oscillator input) Serial, time division multiplexed, input stream from AC'97 controller. 12.288 clock output Serial, time division multiplexed, output stream AC'97 controller. sample sync AC'97 master reset
Note: denotes active
Copyright 2003-2004 C-Media Electronics Inc.
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AC'97 CODEC 9761 Datasheet Rev.
Digital
These signals digital inputs outputs CMI9761 that includes S/PDIF GPIO. Signal Name Type Description HP_ON/GPIO0 XTLSEL/GPIO1 EAPD/SPDIFI SPDIFO Headphone detection General Purpose Clock source selection General Purpose External Amplifier Power Down S/PDIF input S/PDIF output
Analog
These signals connect CMI9761 analog sources sinks, including microphones speakers. Signal Name Type Description AUX_IN_L AUX_IN_R VIDEO_L VIDEO_R CD_L CD_C CD_R MIC1 MIC2 LINE_IN_L LINE_IN_R FMIC_R FMIC_L LINEOUT_L input left channel input right channel Video audio input left channel Video audio input right channel audio input left channel audio common channel audio input right channel Stereo microphone left channel Alternative center channel output Stereo microphone right channel Alternative channel output Line-In input left channel Alternative rear output left channel Line-In input right channel Alternative rear output right channel Front panel stereo microphone right channel Front panel stereo microphone left channel Line output left channel
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Copyright 2003-2004 C-Media Electronics Inc.
AC'97 CODEC 9761 Datasheet Rev.
Signal Name LINEOUT_R SURR_OUT_L SURR_OUT_R CENTER_OUT LFE_OUT
Type
Description Line output right channel Dedicated rear output left channel Dedicated rear output right channel Dedicated center output channel Dedicated output channel
Filter Reference
These signals CMI9761 connected resistors capacitors. Signal Name Type Description VREF VREFOUT1 VREFOUT2 EXT_R Reference voltage Reference voltage MIC1 bias Reference voltage MIC2 bias external precision resistor reference
Configuration
These pins utilize C-Media proprietary parallel resistors method jack detection. Signal Name Type Description JACKSENSE JACKSENSE Jack sensing Jack sensing
Note: detailed information, please refer Sec. facilitate implementation resistors network.
Copyright 2003-2004 C-Media Electronics Inc.
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AC'97 CODEC 9761 Datasheet Rev.
Jack Detection Configuration Information
this section, describe resistors network method jack detection configuration identification. also, design CMI9761 with shared audio function dedicated multi-channel output, configuration audio system versatile possible.
Resistors Network Method
+5VA Sense
16K/open
switch will closed audio connector plugged switch will open audio connector plugged out. configuration identified weighting resistor open.
Figure Resistors Network Method Jack Detection sense connects internally measure resistance network. CMI9761 able monitor plugging status each jack according resistance measured. obtain correct result, value each precision resistor should modified from specified schematics provided C-Media reason.
Copyright 2003-2004 C-Media Electronics Inc.
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AC'97 CODEC 9761 Datasheet Rev.
Configuration Diagram
C-Media CMI9761 Recommended Configuration Diagram
Optional front panel Jacks
Front Panel
CMI9761
Rear Panel Jacks Line Line-In Rear
Optional bracket Jacks
Additional Bracket
Rear
Optional S/PDIF module
S/PDIF Module
VIDEO
Internal Analog Input
Figure Recommended Configuration Diagram
Copyright 2003-2004 C-Media Electronics Inc.
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AC'97 CODEC 9761 Datasheet Rev.
Characteristics
Parameter Digital power supply Input voltage range level input voltage High level input voltage High level output voltage level output voltage Input leakage current (AC-Link inputs) Output leakage current (Hi-Z'd AC-Link outputs) Input/Output Capacitance Symbol DVdd Minimum 3.135 -0.30 0.65xDVdd 0.90xDVdd Typical Maximum Units 3.465 DVdd+0.3
0.35xDVdd
0.10xDVdd
Copyright 2003-2004 C-Media Electronics Inc.
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AC'97 CODEC 9761 Datasheet Rev.
AC-Link Timing Characteristics
Cold Reset Timing
Parameter Symbol Minimum Typical Maximum Units 162.8 0.416 RESET# active pulse width Trst_low REEST# inactive SDATA_IN Ttri2actv BIT_CLK active delay RESET# inactive BIT_CLK startup delay BITCLK active RESET# asserted Trst2clk Tclk2rst
Figure Cold Reset Timing Diagram
Warm Reset Timing
Parameter SYNC inactive BIT_CLK startup delay Symbol Minimum Typical Maximum Units 162.8 SYNC active high pulse width Tsync_high Tsync2clk
Figure Warm Reset Timing Diagram
Copyright 2003-2004 C-Media Electronics Inc.
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AC'97 CODEC 9761 Datasheet Rev.
AC-Link Clocks
Parameter BIT_CLK frequency BIT_CLK period BIT_CLK output jitter BLT_CLK high pulse width (note BIT_CLK pulse width (note SYNC frequency SYNC period SYNC high pulse width SYNC low_pulse width Tsync_period Tsync_high Tsync_low Tclk_high Tclk_low Tclk_period Symbol Minimum Typical Maximum Units 36.0 36.0 12.288 81.4 40.7 40.7 48.0 20.8 19.5 750.0 45.0 45.0
Note Worse case duty cycle restricted 45/5
Figure BIT_CLK SYNC Timing Diagram
Copyright 2003-2004 C-Media Electronics Inc.
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AC'97 CODEC 9761 Datasheet Rev.
Data Output Input Timing
Parameter Output valid delay from rising edge BIT_CLK
Note: 50pF external load.
Symbol Minimum Typical Maximum Units 15.0
Parameter
Symbol Minimum Typical Maximum Units 10.0 10.0
Input Setup falling edge Tsetup BIT_CLK Input Hold from falling edge Thold BIT_CLK Parameter BIT_CLK combined rise fall plus flight time SDATA combined rise fall plus flight time
scenario modeling purposes.
Symbol Minimum Typical Maximum Units
Note: Combined rise fall plus flight times provided worst case
Figure Data Output Input Timing Diagram
Copyright 2003-2004 C-Media Electronics Inc.
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AC'97 CODEC 9761 Datasheet Rev.
Signal Rise Fall Timing
rise time from (Vol Voh). fall time from (Voh Vol). Parameter Symbol Minimum Typical Maximum Units BIT_CLK rise time (note BIT_CLK fall time (note SYNC rise time (note SYNC fall time (note SDATA_IN rise time (note SDATA_IN fall time (note Triseclk Tfallclk Trisesync Tfallsync Trisedin Tfalldin
SDATA_OUT rise time (note Trisedout SDATA_OUT fall time (note Tfalldout
Note 75pF external load Note 60pF external load
Figure Signal Rise Fall Timing Diagram
Copyright 2003-2004 C-Media Electronics Inc.
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AC'97 CODEC 9761 Datasheet Rev.
AC-Link Power Mode Timing
Parameter Slot BIT_CLK, SDATA_IN Symbol Minimum Typical Maximum Units Ts2_pdown
Figure AC-Link Power Mode Timing Diagram
Test Mode
Parameter Setup trailing edge RESET# (also applies SYNC) Rising edge RESET# Hi-Z delay Symbol Minimum Typical Maximum Units Tsetup2rst 15.0
Toff
25.0
Figure
Test Mode Timing Diagram
Copyright 2003-2004 C-Media Electronics Inc.
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AC'97 CODEC 9761 Datasheet Rev.
Analog Performance Characteristics
measurements performed under circumstance Tambient AVdd 5.0V DVdd 3.3V 10k/50pF external load. Input sine wave; Sampling frequency kHz; Bandwidth kHz; attenuation; sound effects such effects disabled. Parameter Minimum Typical Maximum Units
Full Scale Input Voltage: Line Inputs Inputs Full Scale Output Voltage: LINEOUT REAROUT CENTER_OUT LFE_OUT Frequency Response Dynamic Range Total Harmonic Distortion Plus Noise Cross-talk 10KHz Power Supply Current AVDD (5.0V) DVDD (3.3V) Vrefout Copyright 2003-2004 C-Media Electronics Inc.
2.25
20,000 20,000 20,000
Vrms Vrms Vrms Vrms Vrms
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AC'97 CODEC 9761 Datasheet Rev.
Package Dimension
Dimensions shown inches (mm)
Figure
Mechanical Dimension
DataSheet
Copyright 2003-2004 C-Media Electronics Inc.
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Revision History Features Overview.6 Assignment Signal Descriptions.8

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