Volt 32-Mbit Mask with Page Mode organization (byte mode) (word m
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MX23C3211
Volt 32-Mbit Mask with Page Mode
organization (byte mode) (word mode) Fast access time Random access: 100ns (max.) Page access: 30ns (max.) Page Size words page Current Operating:60mA Standby:50uA Supply voltage 5V±10% Package (500mil) TSOP (12mm 20mm)
ORDER INFORMATION
Part Access Page Access Package Time MX23C3211MC-10 100ns MX23C3211MC-12 120ns MX23C3211TC-10 MX23C3211TC-12 100ns 120ns Time 30ns 50ns 30ns 50ns 30ns 50ns TSOP TSOP TSOP (Reverse type) MX23C3211RC-12 120ns TSOP (Reverse type)
MX23C3211RC-10 100ns
DESCRIPTION
Symbol A0~A20 D0~D14 D15/A-1 Byte
BYTE D15/A-1
CONFIGURATION
TSOP (Normal Type)
BYTE D15/A-1
MX23C3211 (Normal Type)
Function Address Inputs Data Outputs (Word Mode)/ Address (Byte Mode) Chip Enable Input Output Enable Input Word/ Byte Mode Selection Power Supply Ground Connection
TSOP (Reverse Type)
D15/A-1 BYTE
MX23C3211 (Reverse Tpye)
P/N:PM0258
MX23C3211
REV. 3.1,NOV. 2002
MX23C3211
MODE SELECTION
Byte D15/A-1 Output Input D0~D7 High High D0~D7 D0~D7 D8~D15 High High D8~D15 High Mode Word Byte Power Stand-by Active Active Active
BLOCK DIAGRAM
A0/(A-1) BYTE Address Buffer Memory Array Page Buffer Page Decoder Word/ Byte Output Buffer D15/(D7)
ABSOLUTE MAXIMUM RATINGS
Item Voltage Relative Ambient Operating Temperature Storage Temperature Symbol Topr Tstg Ratings -1.3V VCC+2.0V (Note) -65° 125°
Note: Minimum voltage input pins -0.5V. During voltage transitions, inputs undershoot -1.3V periods 20ns. Maximum voltage input pins VCC+0.5V. During voltage transitions, input overshoot VCC+2.0V periods 20ns.
P/N:PM0258
REV. 3.1, NOV. 2002
MX23C3211
CHARACTERISTICS 70°C, 5V±10%)
Item Output High Voltage Output Voltage Input High Voltage Input Voltage Input Leakage Current Output Leakage Current Operating Current Standby Current (TTL) Standby Current (CMOS) Input Capacitance Output Capacitance Symbol ICC1 ISTB1 ISTB2 COUT MIN. 2.4V 2.2V -0.3V MAX. 0.4V VCC+0.3V 0.8V 60mA 50uA 10pF 10pF Conditions -1.0mA 2.1mA
100ns, output open CE>VCC-0.2V 1MHZ 1MHZ
CHARACTERISTICS 5V±10%)
Item Read Cycle Time Address Access Time Chip Enable Access Time Page Mode Access Time Output Enable Time Output Hold After Address Output High Delay Symbol tACE 23C3211-10 MIN. MAX. 100ns 100ns 100ns 30ns 30ns 20ns 23C3211-12 MIN. MAX. 120ns 120ns 120ns 50ns 50ns 20ns
Note:Output high-impedance delay (tHZ) measured from going high, this parameter guaranteed design over full voltage temperature operating range tested.
Test Conditions
Input Pulse Levels Input Rise Fall Times Input Timing Level Output Timing Level Output Load 0.4V~ 3.3V 10ns 1.5V 0.8V 2.0V Figure
(load)=-1mA DOUT (load)=2.1mA
C<100pF
Note:No output loading present tester load board. Active loading used under software programming control. Output loading capacitance includes load board's stray capacitance.
P/N:PM0258
REV. 3.1, NOV. 2002
MX23C3211
TIMING DIAGRAM
RANDOM READ
tACE
DATA
VALID
VALID
VALID
PAGE READ
A3-A20
VALID
(A-1),A0,A1,A2
1'st
2'nd VALID VALID
3'rd
DATA
VALID
Note: enable. Page size words 16-bit mode, bytes 8-bit mode.
P/N:PM0258
REV. 3.1, NOV. 2002
MX23C3211
PACKAGE INFORMATION
P/N:PM0258
REV. 3.1, NOV. 2002
MX23C3211
P/N:PM0258
REV. 3.1, NOV. 2002
MX23C3211
P/N:PM0258
REV. 3.1, NOV. 2002
MX23C3211
REVISION HISTORY
Revision Description Characteristics: 10ns Typing error correction Characteristics- Modify Characteristics- tACE Modify Package Information Modify Package Information Page P1,2 P5,6 P5-7 Date FEB/01/1999 JAN/18/2000 OCT/03/2000 JUL/17/2001 NOV/21/2002
P/N:PM0258
REV. 3.1, NOV. 2002
MX23C3211
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MACRONIX INTERNATIONAL CO., LTD. reserves right change product specifications without notice.
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