ST7565S Matrix Controller/Driver GENERAL DESCRIPTION ST

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ST7565S Matrix Controller/Driver GENERAL DESCRIPTION ST

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Direct display data through display data RAM. capacity 8580 bits Display duty selectable select 1/65 duty common segment 1/49 duty common segment 1/33 duty common segment 1/55 duty common segment 1/53 duty common segment High-speed 8-bit interface (The chip connected directly both 80x86 series MPUs 68000 series MPUs) /Serial interfaces supported. Abundant command functions Display data Read/Write, display ON/OFF, Normal/ Reverse display mode, page address set, display start line set, column address set, status read, display points ON/OFF, bias set, electronic volume, read/modify/write, segment driver direction select, power saver, static indicator, common output status select, voltage regulation internal resistor ratio set. Static drive circuit equipped internally indicators. system, with variable flashing speed.) Low-power liquid crystal display power supply circuit equipped internally. Booster circuit (with Boost ratios 2X/3X/4X/5X/6X where step-up voltage reference power supply input externally). High-accuracy voltage adjustment circuit (Thermal gradient -0.05%/°C voltage regulator resistors equipped internally, voltage divider resistors equipped internally, electronic volume function equipped internally, voltage follower. oscillator circuit equipped internally (external clock also input) Extremely power consumption Operating power when built-in power supply used example) 60uA (VDD VSS2 =3.0 Quad voltage, 11.0 Conditions: displays pattern normal mode selected. Power supply operate voltage Logic power supply 2.1V Boost reference voltage: VSS2 1.8V 3.3V Booster maximum voltage limited VOUT= -13V Liquid crystal drive power supply: 4.0V 13.0 Wide range operating temperatures: 85°C CMOS process Shipping forms include bare chip TCP. These chips designed resistance light resistance radiation.
ST7565S
Matrix Controller/Driver
GENERAL DESCRIPTION
ST7565S single-chip matrix drivers that connected directly microprocessor bus. 8-bit parallel serial display data sent from microprocessor stored internal display data chip generates drive signal independent microprocessor. Because chips ST7565S contain 65x132 bits display data there 1-to-1 correspondence between panel pixels internal bits, these chips enable displays with high degree freedom. ST7565S chips contain common output circuits segment output circuits, that single chip drive 65x132 display (capable displaying columnsx4 rows PART ST7565S 16x16 kanji font). Moreover, capacity display extended through master/slave structures between chips. chips able minimize power consumption because external operating clock necessary display data read/write operation. Furthermore, because each chip equipped internally with low-power driver power supply, resistors driver power voltage adjustment display clock oscillator circuit, ST7565S used create lowest power display system with fewest components high-performance portable devices. range -2.1V ±0.06V
temperature gradient -0.05%/°C
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ST7565S
ST7565S Arrangement
9,336m 1,000 58m(Min.) 001012 013102 103114 116128 129276 277289 Bump Height: 18m(Typ) Chip Thickness: 660m Chip Size: Bump Pitch: Bump Size: 30um 39um 102m 37.5m 102m 37.5m
38um 30um
22um 30um 22um
38um 30um (3528,395) (0,0)
ST7565S DIAGRAM
(4558,-410)
(-4558,-410) DIFFERENCE WITH SED1565 VOUT maximum -13V ST7565S Temperature gradient -0.05%/°C Logic power supply 2.1V booster ratio times times select defin display duty following table DUTY 0,0,0 0,0,1 0,1,0 0,1,1 1,0,0 1/65 1/49 1/33 1/55 1/53
BIAS
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ST7565S
Center Coordinates
Units: Name COM[53] COM[54] COM[55] COM[56] COM[57] COM[58] COM[59] COM[60] COM[61] COM[62] COM[63] COMS1 /DOF /CS1 /RES WR(R/W) RD(E) VSS2 VSS2 VOUT VOUT CAP5CAP5CAP1+ CAP1+ 4241 4183 4125 4067 4009 3951 3893 3835 3777 3719 3661 3603 3443 3369 3295 3221 3147 3073 2999 2925 2851 2777 2703 2629 2555 2481 2407 2333 2259 2185 2111 2037 1963 1889 1815 1741 1667 1593 1519 1445 1371 1297 1223 1149 1075 1001 Name CAP3CAP3CAP1+ CAP1+ CAP1CAP1CAP2CAP2CAP2+ CAP2+ CAP4CAP4VSS TEST0 TEST1 TEST2 TEST3 TEST4 TEST5 /HPM -109 -183 -257 -331 -405 -479 -553 -627 -701 -775 -849 -923 -997 -1071 -1145 -1219 -1293 -1367 -1441 -1515 -1589 -1663 -1737 -1811 -1885 -1959 -2033 -2107 -2181 -2255 -2329 -2403 -2477 -2551
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Name SEL1 SEL2 SEL3 COM[31] COM[30] COM[29] COM[28] COM[27] COM[26] COM[25] COM[24] COM[23] COM[22] COM[21] COM[20] (NC) COM[19] COM[18] COM[17] COM[16] COM[15] COM[14] COM[13] COM[12] COM[11] COM[10] COM[9] COM[8] COM[7] COM[6] COM[5] COM[4] COM[3] COM[2] COM[1] COM[0] COMS2 SEG[0] SEG[1] SEG[2] SEG[3] SEG[4] SEG[5] SEG[6] SEG[7] SEG[8] SEG[9] -2625 -2699 -2773 -2847 -2921 -2995 -3069 -3143 -3606 -3664 -3722 -3780 -3838 -3896 -3954 -4012 -4070 -4128 -4186 -4244 -4542 -4542 -4542 -4542 -4542 -4542 -4542 -4542 -4542 -4542 -4542 -4542 -4542 -4542 -4267 -4209 -4151 -4093 -4035 -3977 -3919 -3861 -3803 -3745 -3687 -3629 -3571 -3513 -3455 -3397 -3339 -3281 -113 -171 -229 -287 -345 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 Name SEG[10] SEG[11] SEG[12] SEG[13] SEG[14] SEG[15] SEG[16] SEG[17] SEG[18] SEG[19] SEG[20] SEG[21] SEG[22] SEG[23] SEG[24] SEG[25] SEG[26] SEG[27] SEG[28] SEG[29] SEG[30] SEG[31] SEG[32] SEG[33] SEG[34] SEG[35] SEG[36] SEG[37] SEG[38] SEG[39] SEG[40] SEG[41] SEG[42] SEG[43] SEG[44] SEG[45] SEG[46] SEG[47] SEG[48] SEG[49] SEG[50] SEG[51] SEG[52] SEG[53] SEG[54] SEG[55] SEG[56] SEG[57] SEG[58] SEG[59] SEG[60] SEG[61] -3223 -3165 -3107 -3049 -2991 -2933 -2875 -2817 -2759 -2701 -2643 -2585 -2527 -2469 -2411 -2353 -2295 -2237 -2179 -2121 -2063 -2005 -1947 -1889 -1831 -1773 -1715 -1657 -1599 -1541 -1483 -1425 -1367 -1309 -1251 -1193 -1135 -1077 -1019 -961 -903 -845 -787 -729 -671 -613 -555 -497 -439 -381 -323 -265 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374
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Name SEG[62] SEG[63] SEG[64] SEG[65] SEG[66] SEG[67] SEG[68] SEG[69] SEG[70] SEG[71] SEG[72] SEG[73] SEG[74] SEG[75] SEG[76] SEG[77] SEG[78] SEG[79] SEG[80] SEG[81] SEG[82] SEG[83] SEG[84] SEG[85] SEG[86] SEG[87] SEG[88] SEG[89] SEG[90] SEG[91] SEG[92] SEG[93] SEG[94] SEG[95] SEG[96] SEG[97] SEG[98] SEG[99] SEG[100] SEG[101] SEG[102] SEG[103] SEG[104] SEG[105] SEG[106] SEG[107] SEG[108] -207 -149 1011 1069 1127 1185 1243 1301 1359 1417 1475 1533 1591 1649 1707 1765 1823 1881 1939 1997 2055 2113 2171 2229 2287 2345 2403 2461 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 Name SEG[109] SEG[110] SEG[111] SEG[112] SEG[113] SEG[114] SEG[115] SEG[116] SEG[117] SEG[118] SEG[119] SEG[120] SEG[121] SEG[122] SEG[123] SEG[124] SEG[125] SEG[126] SEG[127] SEG[128] SEG[129] SEG[130] SEG[131] COM[32] COM[33] COM[34] COM[35] COM[36] COM[37] COM[38] COM[39] COM[40] COM[41] COM[42] COM[43] COM[44] COM[45] COM[46] COM[47] COM[48] COM[49] COM[50] COM[51] COM[52] (NC) 2519 2577 2635 2693 2751 2809 2867 2925 2983 3041 3099 3157 3215 3273 3331 3389 3447 3505 3563 3621 3679 3737 3795 3853 3911 3969 4027 4085 4143 4201 4259 4542 4542 4542 4542 4542 4542 4542 4542 4542 4542 4542 4542 4542 4542 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -374 -345 -287 -229 -171 -113
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ST7565S
BLOCK DIAGRAM
SEG131 COM63 COMS COM0
SEG0
COMS
SEGMENT DRIVERS
COMMON DRIVERS
output control circuit
Voltage follower circuit
Display data latch circuit
Line address circuit
Display timing generator circuit
Page address circuit
VOUT CAP1+ CAP1CAP2+ CAP2CAP3+ CAP4CAP5VSS2 Voltage booster circuit Power Supply Circuit Voltage Regulator circuit
buffer
DISPLAY DATA 8580 Bits
Column address circuit
Oscillator circuit
Status
Command decoder
holder
INTERFACE Parallel Serial
SEL1
SEL2
SEL3
E(RD)
RW(WR)
/RES
D6(SCL)
D7(SI)
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DESCRIPTIONS
Power Supply Pins
Name
VSS2
Power Supply Power Supply Power Supply Power Supply
Function
Shared with power supply terminal Vcc. This terminal connected system GND. This reference power supply step-up voltage circuit liquid crystal drive. This internal-output VREG power supply power supply voltage regulator. This multi-level power supply liquid crystal drive. voltage Supply applied determined liquid crystal cell, changed through resistive voltage divided through changing impedance using amp. Voltage levels determined based VDD, must maintain relative magnitudes shown below.
Pins
Power Supply
When power supply turns internal power supply circuits produce voltages shown below. voltage settings selected using bias command. 1/65 DUTY 1/9*V5,1/7*V5 2/9*V5,2/7*V5 7/9*V5,5/7*V5 8/9*V5,6/7*V5 1/49 DUTY 1/8*V5,1/6*V5 2/8*V5,2/6*V5 6/8*V5,4/6*V5 7/8*V5,5/6*V5 1/33 DUTY 1/6*V5,1/5*V5 2/6*V5,2/5*V5 4/6*V5,3/5*V5 5/6*V5,4/5*V5 1/55 DUTY 1/8*V5,1/6*V5 2/8*V5,2/6*V5 6/8*V5,4/6*V5 7/8*V5,5/6*V5 1/53 DUTY 1/8*V5,1/6*V5 2/8*V5,2/6*V5 6/8*V5,4/6*V5 7/8*V5,5/6*V5
Power Supply Pins
Name
CAP1+ CAP1- CAP2+ CAP2- CAP3- CAP4- CAP5- VOUT
Function
DC/DC voltage converter. Connect capacitor between this terminal CAP1- terminal. DC/DC voltage converter. Connect capacitor between this terminal CAP1+ terminal. DC/DC voltage converter. Connect capacitor between this terminal CAP2- terminal. DC/DC voltage converter. Connect capacitor between this terminal CAP2+ terminal. DC/DC voltage converter. Connect capacitor between this terminal CAP1+ terminal. DC/DC voltage converter. Connect capacitor between this terminal CAP2+ terminal. DC/DC voltage converter. Connect capacitor between this terminal CAP1+ terminal. DC/DC voltage converter. Connect capacitor between this terminal VSS. Output voltage regulator terminal. Provides voltage between through resistive voltage divider. voltage regulator internal resistors used voltage regulator internal resistors used
Pins
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ST7565S
System Connection Pins
Name (SCL) (SI)
Function
This 8-bit bi-directional data that connects 8-bit 16-bit standard data bus. When serial interface selected (P/S "L") serial data input (SI) serial clock input (SCL). high impedance. When chip select active, high impedance. This connect least significant normal address bus, determines whether data bits data command. "H": Indicates that display data. "L": Indicates that control data. When "L," settings initialized. reset operation performed signal level.
Pins
This chip select signal. When "H," then chip select becomes active, data/command enabled. When connected 8080 MPU, this active LOW. This connected signal 8080 MPU, ST7565S series data output status when this signal "L". When connected 6800 Series MPU, this active HIGH. This 6800 Series enable clock input terminal. When connected 8080 MPU, this active LOW. (R/W) This terminal connects 8080 signal. signals data latched rising edge signal. When connected 6800 Series MPU: This read/write control signal input terminal. When "H": Read. When "L": Write. This interface switch terminal. "H": 6800 Series interface. "L": 8080 interface. This parallel data input/serial data input switch terminal. "H": Parallel data input. "L": Serial data input. following applies depending status: Data/Command Data (D7) Read/Write Serial Clock Write only (D6)
(R/W)
When "L", "H", Open. (R/W) fixed either "L". With serial data input, impossible read data from
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Name Function
Terminal select whether enable disable display clock internal oscillator circuit. used Internal oscillator circuit used external clock input .(internal oscillator disable) When "L", input display clock through terminal. This This display clock input terminal following true depending status. Output Input Input Input
Pins
/DOF
This liquid crystal alternating current signal terminal. This blanking control terminal. This output terminal static drive. This terminal only enabled when static indicator display used conjunction with terminal. This terminal selects resistors voltage level adjustment. "H": internal resistors "L": internal resistors. voltage level regulated external resistive voltage divider attached terminal This power control terminal power supply circuit liquid crystal drive. "H": Normal mode "L": High power mode These pins DUTY selection. DUTY 0,0,0 1/65 1/49 1/33 1/55 1/53
BIAS
SEL3 SEL2 SEL1
0,0,1 0,1,0 0,1,1 1,0,0
TEST0
These terminals testing They open
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ST7565S
Driver Pins
Name
Function
These segment drive outputs. Through combination contents display with signal, single level selected from VDD, DATA Output Voltage Normal Display Reverse Display
Pins
SEG0 SEG131
Power save
These common drive outputs. Part ST7565S ST7566S ST7567S ST7568S ST7569S COM0 COMn COM0 COM63 COM0 COM47 COM0 COM31 COM0 COM53 COM0 COM51 TOTAL
Through combination contents scan data with signal, single level selected from VDD, Scan Data Power save Output Voltage
COMS
These output terminals indicator. Both terminals output same signal. Leave these open they used.
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ST7565S
DESCRIPTION FUNCTIONS
Interface Selecting Interface Type With ST7565S chips, data transfers done through 8-bit parallel data through serial data input (SI). Through selecting terminal polarity possible select either parallel data input serial data input shown Table
Table Parallel Input Serial Input D5~D0 D5~D0 (HZ)
indicates fixed either
Parallel Interface When parallel interface been selected (P/S ="H"), then possible connect directly either 8080-system 6800 Series (shown Table selecting terminal either "L". Table (P/S=H) D7~D0 D7~D0 D7~D0
6800 Series 8080 Series
Moreover, data signals recognized combination (E), (R/W) signals, shown Table Table Shared 6800 Series 8080 Series Function Reads display data Writes display data Status read Write control data (command)
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Serial Interface When serial interface been selected (P/S "L") then when chip active state (CS1 "H") serial data input (SI) serial clock input (SCL) received. serial data read from serial data input rising edge serial clocks through this order. This data converted bits parallel data rising edge eighth serial clock processing.
input used determine whether serial data input display data command data; when "H", data display data, when then data command data. input read used detection every rising edge serial clock after chip becomes active. Figure serial interface signal chart.
Figure When chip active, shift registers counter reset their initial states. Reading possible while serial interface mode. Caution required signal when comes line-end reflections external noise. recommend that operation rechecked actual equipment. Chip Select ST7565S have chip select terminals: CS2. interface serial interface enabled only when "H". When chip select inactive, enter high impedance state, inputs inactive. When serial interface selected, shift register counter reset.
Accessing Display Data Internal Registers Data transfer higher speed ensured since required satisfy cycle time (tCYC) requirement alone accessing ST7565S. Wait time considered. And, ST7565S, each time data sent from MPU, type pipeline process between LSIs performed through holder attached internal data bus. Internal data bus. example, when writes data display data RAM, once data stored holder, then written display data before next data write cycle. Moreover, when reads display data RAM, first data read cycle (dummy) stores read data holder, then data read from holder system next data read cycle. There certain restriction read sequence display data RAM. Please advised that data specified address generated read instruction issued immediately after address setup. This data generated data read second time. Thus, dummy required whenever address setup write cycle operation conducted. This relationship shown Figure
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ST7565S
Busy Flag When busy flag indicates that ST7565S running internal processes, this time command aside from status read will received. busy flag outputted with read instruction. cycle time
(tCYC) maintained, necessary check this flag before each command. This makes vast improvements processing capabilities possible.
Writing DATA Internal Timing
Holder Write Signal
Reading DATA
Address Preset
Internal Timing
Read Signal
Column Address
Preset
Increment
Holder
Address
Dummy Read
Figure
Data Read
Data Read #n+1
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ST7565S
Display Data display data stores data LCD. page structure. shown Figure display data from corresponds display common direction, there constraints time display data transfer when multiple ST7565S used, thus display structures created easily with high degree
freedom. Moreover, reading from writing display from side performed through buffer, which independent operation from signal reading liquid crystal driver. Consequently, even display data accessed asynchronously during liquid crystal display, will cause adverse effects display (such flickering).
COM0
COM1
COM2
COM3
COM4
Display data
Liquid crystal display
Figure Page Address Circuit Page address display data specified through Page Address Command. page address must specified again when changing pages perform access. Column Addresses display data column address specified Column Address command. specified column address incremented (+1) with each display data read/write command. This allows display data accessed continuously. Moreover, incrementation column addresses stops with 83H. Because column address independent page address, when moving, example, from page column page column 00H, necessary respecify both page address column address. Furthermore, shown Table command (segment driver direction select command) used reverse relationship between display data column address segment output. Because this, constraints layout when module assembled minimized. shown Figure Page address (D3, special icons, only display data used. (see Figure
Table Output (D0) (D0) Line Address Circuit line address circuit, shown Table specifies line address relating output when contents display data displayed. Using display start line address command, what normally line display specified (this COM0 output when common output mode normal, COM63 output ST7565S detail shown page.11 display area line area ST7565S. line addresses changed dynamically using display start line address command, screen scrolling, page swapping, etc. performed. SEG0
Column Address Column Address
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ST7565S
Page Address Data Line Address
When common output normal
Output COM0 COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 COM17 COM18 COM19 COM20 COM21 COM22 COM23 COM24 COM25 COM26 COM27 COM28 COM29 COM30 COM31 COM32 COM33 COM34 COM35 COM36 COM37 COM38 COM39 COM40 COM41 COM42 COM43 COM44 COM45 COM46 COM47 COM48 COM49 COM50 COM51 COM52 COM53 COM54 COM55 COM56 COM57 COM58 COM59 COM60 COM61 COM62 COM63 COMS
Page
Page
Page
Page
Page
Page
Page
Page
Page Column address
Regardless display start line address, 1/65duty 65th line, 1/49duty =>49th line. 1/33duty =>33th line, 1/55duty =>55th line, 1/53duty =>53th line.
S123
S124
S125
S126
S127
S128
S129
S130
S131
Figure
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ST7565S
Display Data Latch Circuit display data latch circuit latch that temporarily stores display data that output liquid crystal driver circuit from display data RAM. Because display normal/reverse status, display ON/OFF Oscillator Circuit This CR-type oscillator that produces display clock. oscillator circuit only enabled when M/S= "H". Display Timing Generator Circuit display timing generator circuit generates timing signal line address circuit display data latch circuit using display clock. display data latched into display data latch circuit synchronized with display clock, output data driver output terminal. Reading display data liquid crystal driver circuits completely independent accesses display data MPU. Consequently, even display data Two-frame alternating current drive waveform
status, display points ON/OFF commands control only data within latch, they change data within display data itself.
When oscillation stops, external clock input through terminal.
accessed asynchronously during liquid crystal display, there absolutely adverse effect (such flickering) display. Moreover, display timing generator circuit generates common timing liquid crystal alternating current signal (FR) from display clock. generates drive wave form using frame alternating current drive method, shown Figure liquid crystal drive circuit.
COM0 COM1
Data SEGn
Figure
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ST7565S
Common Output Status Select Circuit ST7565S chips, output scan direction selected common output status select command. (See Table Consequently, constraints layout time module assembly minimized.
Table Status 1/65 DUTY Normal Reverse Duty 1/65 1/49 1/33 1/55 1/53 com[0:23] com[47:24] com[0:15] com[31:16] com[0:26] com[53:27] com[0:25] com[51:26] com[27:53] com[26:0] com[26:51] com[25:0] 1/49 DUTY Scan Direction 1/33 DUTY 1/55 DUTY 1/53 DUTY COM0 COM63 COM0 COM47 COM0 COM31 COM0 COM53 COM0 COM51 COM63 COM0 COM47 COM0 COM31 COM0 COM53 COM0 COM51 COM0 Common output pins com[0:15] com[16:23] com[24:26] com[27:36] com[0:63] com[63:0] com[24:47] com[23:0] com[16:31] com[15:0] com[37:39] com[40:47] com[48:63] coms coms coms coms coms coms coms coms coms coms coms
Driver Circuits These 197-channel, that generate four voltage levels driving combination display data, scan signal, signal produces liquid crystal drive voltage output. Figure shows examples output wave form.
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ST7565S
COM0 COM1 COM2 COM3 COM4 COM5 COM6 COM7
COM0
COM1
COM8 COM9 COM10 COM11 COM12 COM13 COM14
COM2
SEG0
SEG1
COM0 SET0
COM0 SET1
Figure
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ST7565S
Power Supply Circuits power supply circuits low-power consumption power supply circuits that generate voltage levels required drivers. They Booster circuits, voltage regulator circuits, voltage follower circuits. They only enabled master operation. power supply circuits turn Booster circuits, voltage regulator circuits, Table voltage follower circuits independently through Power Control command. Consequently, possible make external power supply internal power supply function somewhat parallel. Table shows Power Control Command 3-bit data control function, Table shows reference combinations.
function Booster circuit control Voltage regulator circuit control (V/R circuit) Voltage follower circuit control (V/F circuit)
Status
Control Details Each Power Control Command Table Settings Only internal power supply used Only voltage regulator circuit voltage follower circuit used Only circuit used Only external power supply used
Voltage Voltage Voltage booster regulator follower
External voltage input VSS2 VOUT, VSS2 VSS2
Step-up voltage Used Open Open Open
Reference Combinations "step-up system terminals" refer CAP1+, CAP1-, CAP2+, CAP2-, CAP3-. While other combinations, shown above, also possible, these combinations recommended because they have practical use. Step-up Voltage Circuits Using step-up voltage circuits equipped within ST7565S chips possible product 2X,3X,4X,5X step-up VSS2 voltage levels. step-up:Connect capacitor between CAP1+ CAP1-, between CAP2+ CAP2-, between CAP1+ CAP3-, between CAP2+ CAP4-,between CAP1+ CAP5-, between VSS2 VOUT, produce voltage level negative direction VOUT terminal that times voltage level between VSS2. step-up:Connect capacitor between CAP1+ CAP1-, between CAP2+ CAP2-, between CAP1+ CAP3-, between CAP2+ CAP4-,and between VSS2 VOUT, produce voltage level negative direction VOUT terminal that times voltage level between VSS2. step-up: Connect capacitor between CAP1+ CAP1-, between CAP2+ CAP2-, between CAP1+ CAP3-, between VSS2 VOUT, produce voltage level negative direction VOUT terminal that times voltage level between VSS2. step-up: Connect capacitor between CAP1+ CAP1-, between CAP2+ CAP2- between VSS2 VOUT, short between CAP3- VOUT produce avoltage level negative direction VOUT terminal that times voltage difference between VSS2. step-up: Connect capacitor between CAP1+ CAP1-, between VSS2 VOUT, leave CAP2+ open, short between CAP2-, CAP3- VOUT produce voltage negative direction VOUT terminal that twice voltage between VSS2. step-up voltage relationships shown Figure
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ST7565S
VSS2 VOUT CAP3C1 CAP1+ CAP1CAP2C1 CAP2+ OPEN OPEN CAP4CAP5OPEN OPEN CAP2+ CAP4CAP5OPEN OPEN OPEN CAP2+ CAP4CAP5ST7565S VOUT CAP3ST7565S CAP1+ CAP1CAP2VSS2 VOUT CAP3ST7565S CAP1+ CAP1CAP2VSS2
step-up voltage circuit VDD=0V VSS2=-3V
step-up voltage circuit VDD=0V VSS2=-3V VOUT=3xVSS2=-9V step-up voltage relationships
step-up voltage circuit VDD=0V VSS2=-3V VOUT=2xVSS2=-6V step-up voltage relationships
VOUT=4xVSS2=-12V step-up voltage relationships
VSS2 VOUT CAP3C1 CAP1+ CAP1CAP2C1 CAP2+ CAP4OPEN CAP5C1 ST7565S
VSS2 VOUT CAP3ST7565S CAP1+ CAP1CAP2CAP2+ CAP4CAP56x step-up voltage circuit VDD=0V VSS2=-2V
step-up voltage circuit VDD=0V VSS2=-2V
VOUT=5xVSS2=-10V step-up voltage relationships
VOUT=6xVSS2=-12V step-up voltage relationships
Figure VSS2 voltage range must that VOUT terminal voltage does exceed absolute maximum rated value.
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ST7565S
Voltage Regulator Circuit step-up voltage generated VOUT outputs driver voltage through voltage regulator circuit. Because ST7565S chips have internal high-accuracy fixed voltage power supply with 64-level electronic volume function internal resistors voltage regulator, systems constructed without having include high-accuracy voltage regulator circuit components. (VREG thermal gradients approximate -0.05%/°C)
When Voltage Regulator Internal Resistors Used Through voltage regulator internal resistors electronic volume function liquid crystal power supply voltage controlled commands alone (without adding external resistors), making possible adjust liquid crystal display brightness. voltage calculated using equation over range where VOUT
VEV(constant voltage supply+electronic volume) Internal
Internal
Figure
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ST7565S
VREG IC-internal fixed voltage supply, voltage 25°C shown Table Table
Part ST7565S
Equipment Type Internal Power Supply
Thermal Gradient -0.05 %/°C
VREG -2.1V
level possible levels electronic volume function depending data 6-bit electronic volume register. Table shows value depending electronic volume register settings. Rb/Ra voltage regulator internal resistor ratio, different levels through voltage regulator internal resistor ratio command. Rb/Ra) ratio assumes values shown Table depending 3-bit data settings voltage regulator internal resistor ratio register. Table
voltage regulator internal resistance ratio register value Rb/Ra) ratio (Reference value) Table Register ST7565S -0.05 %/°C
Figures show voltage measured values internal resistance ratio resistor voltage adjustment electric volume resister each temperature grade model.
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booster ,regulator,follower VOUT=-13V VSS=-3V
UNIT:V
voltage regulator internal resistor ratio D2,D1,D0
Electronic volume registered
Figure ST7565S Thermal Gradient -0.05%/°C voltage function voltage regulator internal resistor ratio register electronic volume register. Setup example: When selecting 25°C ST7565S which Temperature gradient -0.05%/°C. Using Figure equation A-1, following setup enabled. this time, variable range notch width voltage shown Table dependent electronic volume. Table Contents voltage regulator Electronic Volume Register Table Variable Range Notch width -8.4 levels) -6.8 (central value) -5.1 level) Units [mV]
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When External Resistance Used (The Voltage Regulator Internal Resistors Used) liquid crystal power supply voltage also without using voltage regulator internal resistors (IRS terminal "L") adding resistors between between respectively. When this done, electronic volume function makes possible adjust brightness liquid crystal display controlling liquid crystal power supply voltage through commands. range where VOUT voltage calculated using equation based external resistances Rb'.
VEV(fixed voltage power supply+electronic volume)
External resistor
External resistor
Figure Setup example: When selecting 25°C ST7565S temperature gradient -0.05%/°C. When central value electron volume register (D5, then VREG -2.1V according equation B-1,
3.12 340k 1060k
this time, voltage variable range notch width, based electron volume function, given Table
1Ra'
VREG (-2.1)
Moreover, when value current running through Consequently, equations B-3,
Table Variable Range Notch width -8.6 levels) -7.0 (central value) -5.3 level) Units [mV]
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When External Resistors Used (The Voltage Regulator Internal Resistors Used) When external resistor described above used, adding variable resistor well makes possible perform fine adjustments Rb', liquid crystal drive voltage this case, electronic volume function makes possible control liquid crystal power supply voltage commands adjust liquid crystal display brightness. range where VOUT voltage calculated equation below based (var settings, where subjected fine adjustments R2).
R3+R2-R2) R1+R2 R3+R2-R2 1=(1 R1+R2
VREG
VEV(fixed voltage power supply+electronic volume)
External resistor External resistor
External resistor
Figure Setup example: When selecting 25°C (using ST7565S temperature gradient -0.05%/°C. When central value electronic volume register (D5, then VREG -2.1 according equation C-1, when order make
With this, according equation C-2, C-4,
264k 211k 925k
voltage variable range notch width based electron volume function shown Table
-9V=
R3+R2 R1+R2
(-2.1)
When order make
-5V=
(-2.1)
Table
When current flowing Variable Range Notch width -7.0 (central value) -5.3 level) Units [mV]
-8.7 levels)
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When voltage regulator internal resistors electronic volume function used, necessary least voltage regulator circuit voltage follower circuit operating mode using power control commands. Moreover, necessary provide voltage from VOUT when Booster circuit OFF. terminal enabled only when voltage regulator internal resistors used (i.e. terminal "L"). When voltage regulator internal resistors used (i.e. when terminal "H"), then terminal left open. Because input impedance terminal high, necessary take into consideration short leads, shield cables, etc. handle noise. Voltage Generator Circuit voltage produced resistive voltage divider within produced voltage levels required liquid crystal driving. Moreover, High Power Mode power supply circuit equipped ST7565S chips very power consumption (normal mode: "H"). However, LCDs panels with large loads, this low-power power supply cause display quality degrade. When this occurs, setting terminal (high power mode) improve quality display. Internal Power Supply Shutdown Command Sequence sequence shown Figure recommended shutting down internal power supply, first placing
Sequence Step1 Step2
when voltage follower changes impedance, provides liquid crystal drive circuit.
recommend that display checked actual equipment determine whether this mode. Moreover, improvement display inadequate even after high power mode been set, then necessary liquid crystal drive power supply externally.
power supply power saver mode then turning power supply OFF.
Command address
Details (Command, status) Display Display points Internal power supply
Power saver commands (compound)
Figure
temperature grade Internal Power Supply ST7565S (-0.05%/°C)
Ta=-40°C V5=9.40V
Ta=25°C V5=8.46V
Ta=85°C V5=7.60V
-40°C -20°C 25°C
Figure
50°C
85°C
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Reference Circuit Examples Figure shows reference circuit examples. When used step-up circuit, voltage regulating circuit circuit When voltage regulator internal resistor When voltage regulator internal resistor used. used. (Example where VSS2 VSS, with step-up) (Example where VSS2 VSS, with step-up)
VSS2 VOUT CAP3C1 CAP1+ CAP1CAP2+ CAP2R3 CAP5C1 CAP4C1
VSS2 VOUT CAP3CAP1+ CAP1CAP2+ CAP2CAP4CAP5-
ST7565S
ST7565S
When voltage regulator circuit circuit alone used voltage regulator internal resistor voltage regulator internal resistor used. used.
VSS2 VOUT External power supply CAP3CAP1+ CAP1CAP2+ CAP2R3 CAP4CAP5External power supply
VSS2 VOUT CAP3CAP1+ CAP1CAP2+ CAP2CAP4CAP5-
ST7565S
ST7565S
When circuit alone used
When built-in power used
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VSS2 VOUT CAP3CAP1+ CAP1CAP2+ External power supply CAP2CAP4CAP5-
VSS2 VOUT CAP3CAP1+ CAP1CAP2+ CAP2CAP4CAP5-
ST7565S
ST7565S
External power supply
When built-in power circuit used drive liquid ryst heavily loaded with recommended connect external resistor stabilize potentials which output from
VDD,V0
built-in voltage follower. Examples shared reference settings When vary between
Item
value
units
determined size being driven
ST7565S
crystal display drive waveform. Reference value 100K recommended optimum resistance value taking liquid Figure Because terminal input impedance high, short leads shielded lines. determined size being driven. Select value that will stabilize liquid crystal drive voltage. Example Process which Determine Settings: Turn voltage regulator circuit voltage follower circuit supply voltage VOUT from outside. Determine displaying pattern with heavy load (such horizontal stripes) selecting that stabilizes liquid crystal drive voltages V5). Note that capacitors must have same capacitance value. Next turn power supplies determine
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Reset Circuit When input comes level, these LSIs return default state. Their default states follows: Display Normal display select: Normal (ADC command "L") Power control register: (D2, Serial interface internal register data clear power supply bias rate: 1/65 DUTY bias 1/49,1/55,1/53 DUTY bias 1/33 DUTY bias All-indicator lamps-on (All-indicator lamps ON/OFF command "L") Power saving clear voltage regulator internal resistors separation Output conditions terminals SEG=VDD COM=VDD Read modify write Static indicator Static indicator register (D1, Display start line first line Column address Address Page address Page Common output status normal voltage regulator internal resistor ratio mode clear Electronic volume register mode clear Electronic volume register (D5, 0,0) Test mode clear
other hand, when reset command used, above default settings from only executed. When power turned internal state becomes unstable, necessary initialize using terminal. After initialization, each input terminal should controlled normally. Moreover, when control signal from high impedance, overcurrent flow After applying current, necessary take proper measures prevent input terminal from getting into high impedance state. internal liquid crystal power supply circuit used ST7565S,it necessary that when external liquid crystal power supply turned This function discharge when "L," external power supply short-circuits when "L." While "L," oscillator display timing generator stop, terminals fixed "H." terminals affected. level output from output terminals. This means that internal resistor connected between When internal liquid crystal power supply circuit used other models ST7565S series, necessary that when external liquid crystal power supply turned While "L," oscillator works display timing generator stops, terminals fixed "H." terminals affected.
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COMMANDS
ST7565S identify data signals combination (E), WR(R/W) signals. Command interpretation execution does depend external clock, rather performed through internal timing only, thus processing fast enough that normally busy check required. 8080 interface, commands launched inputting pulse terminal reading, inputting pulse terminal writing. 6800 Series interface, interface placed read mode when signal input terminal placed write mode when signal input terminal then command launched inputting high pulse terminal. Consequently, 6800 Series interface different than 80x86 Series interface that explanation commands display commands status read display data read becomes "1(H)". explanations below commands explained using 8080 Series interface example. When serial interface selected, data input sequence starting with <Explanation Commands> Display ON/OFF This command turns display OFF. Setting
Display Display When display command executed when display points mode, power saver mode entered. section power saver details. Display Start Line This command used specify display start line address display data shown Figure further details explanation this function "The Line Address Circuit". Page Address This command specifies page address corresponding address when accesses display data (see Figure Specifying page address column address enables access desired display data RAM. Changing page address does accompany change status display. Line address
Page address
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Column Address This command specifies column address display data shown Figure column address split into sections (the higher bits lower bits) when (fundamentally, continuously). Each time display data accessed, column address automatically increments (+1), making possible continuously read from/write display data. column address increment topped 83H. This does change page address continuously. function explanation "The Column Address Circuit," details.
High bits bits
Column address
Status Read BUSY
ON/OFF RESET
BUSY
BUSY indicates that either processing occurring internally reset condition process. BUSY command accepted cycle time satisfied, there need check BUSY conditions. This shows relationship between column address segment driver. Reverse (column address 131-n Normal (column address (The command switches polarity.) ON/OFF: indicates display ON/OFF state. Display Display (This display ON/OFF command switches polarity.) This indicates that chip process initialization either because signal because reset command. Operating state Reset progress
ON/OFF
RESET
Display Data Write This command writes 8-bit data specified display data address. Since column address automatically incremented after write, write display data.
Write data
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Display Data Read This command reads 8-bit data from specified display data address. Since column address automatically incremented after read, continuously read multiple-word data. dummy read required immediately after column address been set. function explanation "Display Data RAM" explanation accessing internal registers. When serial interface used, reading display data becomes unavailable.
Read data
Select (Segment Driver Direction Select) This command reverse correspondence between display data column address segment driver output. Thus, sequence segment driver output pins reversed command. column address circuit (page 1-20) detail. Increment column address "1") accompanying reading writing display data done according column address indicated Figure
Setting Normal Reverse
Display Normal/Reverse This command reverse unlit display without overwriting contents display data RAM. When this done display data contents maintained.
Setting Data voltage (normal) Data voltage (reverse)
Display Points ON/OFF This command makes possible force display points regardless content display data RAM. contents display data maintained when this done. This command takes priority over display normal/reverse command.
Setting Normal display mode Display points
When display mode, executing display points command will place display power save mode. details, Power Save section.
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Bias This command selects voltage bias ratio required liquid crystal display. Select Status 1/65duty bias bias 1/49duty bias bias 1/33duty bias bias 1/55duty bias bias 1/53duty bias bias
Read/Modify/Write This command used paired with "END" command. Once this command been input, display data read command does change column address, only display data write command increments (+1) column address. This mode maintained until command input. When command input, column address returns address when read/modify/write command entered. This function makes possible reduce load when there repeating data changes specified display region, such when there blanking cursor.
Even read/modify/write mode, other commands aside from display data read/write commands also used. However, column address command cannot used. Page address
Column address
Read-modify-write cycle
Dummy read
Data read Data write
Changes Finished
Figure Command Sequence read modify write
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Return Column address
Read-modify-write mode Figure
This command releases read/modify/write mode, returns column address address when mode entered.
Reset
This command initializes display start line, column address, page address, common output mode, voltage regulator internal resistor ratio, electronic volume, static indicator reset, read/modify/write mode test mode released. There impact display data RAM. function explanation "Reset" details. reset operation performed after reset command entered.
initialization when power supply applied must done through applying reset signal /RES terminal. reset command must used instead. Common Output Mode Select This command select scan direction output terminal. details, function explanation "Common Output Mode Select Circuit." Selected Mode
1/65duty
1/49duty
1/33duty
1/55duty
1/53duty
Normal COM0COM63 COM0COM47 COM0COM31 COM0COM53 COM0COM51 Reverse COM63COM0 COM47COM0 COM31COM0 COM53COM0 COM51COM0
Disabled
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Power Controller This command sets power supply circuit functions. function explanation "The Power Supply Circuit," details
Selected Mode Booster circuit: Booster circuit: Voltage regulator circuit: Voltage regulator circuit: Voltage follower circuit: Voltage follower circuit:
Voltage Regulator Internal Resistor Ratio This command sets voltage regulator internal resistor ratio. details, function explanation "The Voltage Regulator circuit table
Rb/Ra Ratio Small Large
Electronic Volume (Double Byte Command) This command makes possible adjust brightness liquid crystal display controlling drive voltage through output from voltage regulator circuits internal liquid crystal power supply. This command byte command used pair with electronic volume mode command electronic volume register command, both commands must issued after other. Electronic Volume Mode When this command input, electronic volume register command becomes enabled. Once electronic volume mode been set, other command except electronic volume register command used. Once electronic volume register command been used data into register, then electronic volume mode released.
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Electronic Volume Register using this command bits data electronic volume register, liquid crystal drive voltage assumes voltage levels. When this command input, electronic volume mode released after electronic volume register been set.
Small
Large Inactive When electronic volume function used, this Electronic Volume Register Sequence
electronic volume mode
electronic volume register Electronic volume mode clear complete Figure Static Indicator (Double Byte Command) This command controls static drive system indicator display. static indicator display controlled this command only, independent other display control commands. This used when static indicator liquid crystal drive electrodes connected terminal, other connected terminal. different pattern recommended static indicator electrodes than dynamic drive electrodes. pattern close, result deterioration liquid crystal electrodes. static indicator command double byte command paired with static indicator register command, thus must execute after other. (The static indicator command single byte command.) Static Indicator ON/OFF When static indicator command entered, static indicator register command enabled. Once static indicator command been entered, other command aside from static indicator register command used.
Static Indicator
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Static Indicator Register This command sets bits data into static indicator register, used static indicator into blinking mode.
Indicator Display State (blinking approximately second intervals) (blinking approximately second intervals) (constantly
Disabled Static Indicator Register Sequence
Static indicator mode
Static indicator register Static indicator mode clear complete Figure Power Save (Compound Command) When display points performed while display mode, power saver mode entered, thus greatly reducing power consumption. power saver mode different modes: sleep mode standby mode. When static indicator OFF, sleep mode that entered. When static indicator standby mode that entered. sleep mode standby mode, display data saved operating mode that effect before power saver mode initiated, still able access display data RAM. Refer figure power save sequence. Static indicator Display Static indicator Display
Display point
Display point
Sleep mode
Standby mode
Power save Display point Static indicator bytes)
Power save Display point
Sleep mode cancel Figure
Standby mode cancel
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Sleep Mode This stops operations display system, long there accesses from MPU, consumption current reduced value near static current. internal modes during sleep mode follows: oscillator circuit power supply circuit halted. liquid crystal drive circuits halted, segment common drive outputs output level. Standby Mode duty display system operations halted only static drive system indicator continues operate, providing minimum required consumption current static drive. internal modes following states during standby mode. power supply circuits halted. oscillator circuit continues operate. duty drive system liquid crystal drive circuits halted segment common driver outputs output level. static drive system does operate. When reset command performed while standby mode, system enters sleep mode. When external power supply used, recommended that functions external power supply circuit stopped when power saver mode started. example, when various levels liquid crystal drive voltage provided external resistive voltage dividers, recommended that circuit added order electrical current flowing through resistive voltage divider circuit when power saver mode effect. ST7565S series chips have liquid crystal display blanking control terminal DOF. This terminal enters state when power saver mode launched. Using output DOF, possible stop function external power supply circuit. When master turned oscillator circuit operable immediately after powering Booster Ratio (Double Byte Command) This command makes possible select step-up ratio. used when power control have turn internal booster circuit. This command byte command used pair with booster ratio select mode command booster ratio register command, both commands must issued after other. Booster Ratio Select Mode When this command input, Booster ratio register command becomes enabled. Once booster ratio select mode been set, other command except booster ratio register command used. Once booster ratio register command been used data into register, then booster ratio select mode released.
Booset Ratio Register using this command bits data booster ratio register,it select what kind booster ratio used. When this command input, booster ratio select mode released after booster ratio register been set.
Booster ratio select 2x,3x,4x
Inactive When booster ratio select function used, this 2x,3x,4x step-up mode
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booster ratio Register Sequence
booster ratio select mode
booster ratio register Booster ratio select mode clear complete
Figure Non-OPeration Command
Test This command chip testing. Please test command used accident, cleared applying signal input reset command using NOP.
Inactive Note: ST7565S maintain their operating modes until something happens change them. Consequently, excessive external noise, etc., change internal modes ST7565S Thus packaging system design necessary suppress noise take measure prevent noise from influencing chip. Moreover, recommended that operating modes refreshed periodically prevent effects unanticipated noise.
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Table Table ST7565S Commands Command Code Command Display ON/OFF Display start line Page address Column address upper Column address lower Status read Display data write Display data read select Display normal/ reverse (10) Display points ON/OFF (11) bias Function display ON/OFF OFF, Sets display display start Display start address line address Sets display page Page address address Most significant Sets most significant bits column address display column address. Least significant Sets least significant bits column address display column address. Reads status data Writes display Reads from display Sets display address output correspondence normal, reverse Sets display normal/ reverse normal, reverse Display points normal display points Sets drive voltage bias ratio bias, bias (ST7565S) Column address increment write: read: Clear read/modify/write Internal reset Select output scan direction normal direction reverse direction Select internal power supply operating mode Select internal resistor ratio(Rb/Ra) mode output voltage electronic volume register OFF, flashing mode select booster ratio 2x,3x,4x Display display points compound command Command non-operation Command test. this command (Note) disabled data
Status
Write data Read data
(12) Read/modify/write (13) (14) Reset (15) Common output mode select (16) Power control (17) voltage regulator internal resistor ratio (18) Electronic volume mode Electronic volume register (19) Static indicator ON/OFF Static indicator register (20) Booster ratio
Operating mode Resistor ratio
Electronic volume value Mode
step-up value
(21) Power saver (22) (23) Test
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COMMAND DESCRIPTION
Instruction Setup: Reference
Initialization
Note: With this when power applied, driving non-selective potentials (SEG pin) (COM pin) output through driving output pins COM. When electric charge remaining smoothing capacitor connecting between driving voltage output pins pin, picture display become totally dark instantaneously when power turned avoid occurrence such failure, recommend following flow when turning power. When built-in power being used immediately after turning power: Turn power keeping "L".
When power stabilized
Release reset state. (RES "H")
Initialized state (Default)
Function setup command input (User setup) (17) Setting built-in resistance radio regulation voltage (18) Electronic volume control
Arrange execute procedures from releasing reset state through setting power control within 5ms. case other models) execute procedures from turning power setting power control 5ms.
Function setup command input (User setup) (16) Power control setting
This concludes initialization target time will result vary depending panel characteristics capacitance smoothing capacitor. Therefore, suggest conduct operation check using actual equipment. Notes: Refer respective sections paragraphs listed below. Description functions; Resetting circuit Command description; bias setting Command description; selection Command description; Common output state selection Description functions; Power circuit Command description; Setting built-in resistance radio regulation voltage Description functions; Power circuit Command description; Electronic volume control Description functions; Power circuit Command description; Power control setting
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When built-in power being used immediately after turning power: Turn VDD-VSS power keeping "L".
When power stabilized
Release reset state. (RES "H")
Initialized state (Default)
Power saver START (multiple commands)
Arrange start ower within after releasing reset state. case other models) execute procedures from turning power setting power control 5ms.
Function setup command input (User setup) (11) bias setting selection (15) Common output state selection
Function setup command input (User setup) (17) Setting built-in resistance radio regulation voltage (18) Electronic volume control
Power saver Arrange start power control setting within after turning power saver.
Function setup command input (User setup) (16) Power control setting
This concludes initialization target time will result vary depending panel characteristics capacitance smoothing capacitor. Therefore, suggest conduct operation check using actual equipment. Notes: Refer respective sections paragraphs listed below. Description functions; Resetting circuit Command description; bias setting Command description; selection Command description; Common output state selection Description functions; Power circuit Command description; Setting built-in resistance radio regulation voltage Description functions; Power circuit Command description; Electronic volume control Description functions; Power circuit Command description; Power control setting power saver state either sleep state stand-by state. Command description; Power saver START (multiple commands)
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Data Display
initialization
Function setup command input (User setup) Display start line Page address Column address
Function setup command input (User setup) Display data write
Function setup command input (User setup) Display ON/OFF
data display Notes: Reference items Command Description; Display start line *10: Command Description; Page address *11: Command Description; Column address *12: Command Description; Display data write *13: Command Description; Display ON/OFF Avoid displaying data data display start (when display white.
Power
Optional status time from reset active turning power (VDD 2.1V) longer than time (tH) when potential becomes below threshold voltage (approximately panel. refer <Reference Data> this event. When long, insert resistor between reduce
Function setup command input (User setup) (20) Power save
Reset active (RES "L")
power
Notes: Reference items *14: logic circuit this IC's power supply controls driver power supply power supply when power supply still residual voltage, driver (COM. SEG) output uncontrolled voltage. When turning power, observe following basic procedures: After turning internal power supply, make sure that potential become below threshold voltage panel, then turn this IC's power supply (VDD VSS). Description Function, Power Circuit *15: After inputting power save command, sure reset function using terminal until power supply turned off. Command Description (20) Power Save *16: After inputting power save command, reset function using terminal until power supply turned off. Command Description (20) Power Save
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Refresh recommended turn refresh sequence regularly specified interval.
Refresh sequence
Reset command command
commands ready state
Refreshing DRAM
Precautions Turning power <Turning power (VDD VSS) off> Power Save (The powers (VDD off.) Reset input Power (VDD VSS) Observe When irregular display occur. according software. determined according external capacity (smoothing capacity driver's discharging capacity.
Reset Power save 1.8V Power
Since power DD-VSS) off,the output comes fixed.
About 1V:below Panel
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<Turning power (VDD VSS) When command control possible.> Reset (The powers (VDD VSS) off.) Power (VDD VSS) Observe When irregular display occur. make power (VDD VSS) falling characteristics longer consider other method. determined according external capacity (smoothing capacity driver's discharging capacity.
Reset Power 1.8V
Since power (VDD-VSS) off,the output comes fixed.
About 1V:below Panel
<Reference Data> voltage falling (discharge) time (tH) after process operation power save reset. voltage falling (discharge) time (tH) after process operation reset.
VDD-V SS(V)
voltage falling time (mSec)
capacity (uF)
Figure
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ABSOLUTE MAXIMUM RATINGS
Unless otherwise noted, Table Parameter Power Supply Voltage Power supply voltage (VDD standard) Power supply voltage (VDD standard) Power supply voltage (VDD standard) Input voltage Output voltage Operating temperature Storage temperature Bare chip
Symbol VSS2 VOUT TOPR TSTR
Conditions -0.3 +5.0 -3.3 -1.8 -13.0 +0.3 +0.3 -0.3 -0.3 +100 +125
Unit
VSS2,V1
V5.,VOUT System (MPU) side ST7565S chip side
Figure Notes Cautions VSS2, VOUT relative reference. Insure that voltage levels always such that Permanent damage result used outside absolute maximum ratings. Moreover, recommended that normal operation chip used electrical characteristic conditions, outside these conditions only result malfunctions LSI, have negative impact reliability well.
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CHARACTERISTICS
Unless otherwise specified, 10%, 85°C Table Item Operating Voltage Symbol Condition Min. -3.3 Rating Typ. Max. -2.1 Units Applicable Vss*1
Operating Voltage
VSS2
(Relative VDD)
-3.3
-1.8
VSS2
-13.0 Operating Voltage VSS2 (Relative VDD) High-level Input Voltage Low-level Input Voltage High-level Output Voltage Low-level Output Voltage Input leakage current Output leakage current Liquid Crystal Driver Resistance Static Consumption Current Output Leakage Current Input Terminal Capacitance Internal Oscillator External Input Internal Oscillator External Input VIHC VILC VOHC -0.5 VOLC ISSQ fOSC fOSC 25°C -13.0 (Relative VDD) -8.0 -13.0 V(Relative VDD) 25°C 1/65 duty 1/33 duty 1/49 duty 1/53 duty 1/55 duty 25°C 25°C -1.0 -3.0
0.01 0.01
-4.0
SEGn COMn VSS, VSS2
Oscillator Frequency
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Table Item Input voltage Internal Power Symbol VSS2 Condition (Relative VDD) Min. -3.3 -13.0 -13.0 Rating Typ. Max. -1.8 -6.0 Units Applicable VSS2 VOUT VOUT
Supply Step-up output VOUT (Relative VDD) voltage Circuit Voltage regulator Circuit Operating VOUT (Relative VDD) Voltage Voltage Follower (Relative VDD) Circuit Operating Voltage Base Voltage 25°C (Relative VDD) -0.05%/°C
-13.0 -2.04
-2.10
-4.0 -2.16
Dynamic Consumption Current During Display, with Internal Power Supply Current consumed total when external power supply used Table Rating Test pattern Symbol Condition Units Notes Min. Typ. Max. Display Pattern Display Pattern Checker
-11.0 -11.0
Dynamic Consumption Current During Display, with Internal Power Supply Table Rating Test pattern Symbol Condition Min. Typ. Display Pattern Display Pattern Checker
Max.
Units Notes
Quad step-up voltage. -11.0 Quad step-up voltage. -11.0
Normal Mode High-Power Mode Normal Mode High-Power Mode
Consumption Current Time Power Saver Mode -3.0 Table Item Sleep mode Standby Mode Symbol Condition 25°C 25°C Min. Rating Typ. 0.01 Max. Units Notes
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Relationship Between Oscillator Frequency fOSC, Display Clock Frequency Liquid Crystal Frame Rate Frequency Table Item Used internal oscillator circuit
1/65 DUTY
Used external display clock Used internal oscillator circuit
fOSC
External input (fCL)
fOSC (4*65) fOSC (4*49) fOSC (8*33) fOSC (4*55) fOSC (4*53)
1/49 DUTY
Used external display clock Used internal oscillator circuit
fOSC
External input (fCL)
1/33 DUTY
Used external display clock Used internal oscillator circuit
fOSC
External input (fCL)
1/55 DUTY
Used external display clock Used internal oscillator circuit
fOSC
External input (fCL)
1/53 DUTY
Used external display clock
fOSC
External input (fCL)
(fFR liquid crystal alternating current period, signal period.) References items market with While broad range operating voltages guaranteed, performance cannot guaranteed there sudden fluctuations voltage while being accessed. operating voltage range system system This applies when external power supply being used. (SCL), (SI), (E), (R/W), CS1, CS2, CLS, M/S, C86, P/S, DOF, RES, IRS, terminals. FRS, DOF, terminals. (E), (R/W), CS1, CS2, CLS, M/S, C86, P/S, RES, IRS, terminals. Applies when (SCL), (SI), terminals high impedance state. These resistance values when voltage applied between output terminal SEGn COMn various power supply terminals These specified operating voltage range. (Where current that flows when applied while power supply ON.) Table relationship between oscillator frequency frame rate frequency. voltage regulator circuit regulates within operating voltage range voltage follower. This internal voltage reference supply voltage regulator circuit. ST7565S temperature range approximately -0.05%/°C. *11, indicates current consumed alone when internal oscillator circuit display turned ST7565S biased. Does include current panel capacity wiring capacity. Applicable only when there access from MPU. value ST7565S having VREG temperature gradient -0.05%/°C when voltage regulator internal resistor used.
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TIMING CHARACTERISTICS
System Read/Write Characteristics (For 8080 Series MPU)
tAW8 (CS2="1") tCYC8 tCCLR,tCCLW WR,RD
tAH8
tCCHR,tCCHW tDS8 (Write) tDH8
tACC8 (Read)
tOH8
Figure Table Item Address hold time Address setup time System cycle time Enable pulse width (WRITE) Enable pulse width (WRITE) Enable pulse width (READ) Enable pulse width (READ) WRITE Data setup time WRITE Address hold time READ access time READ Output disable time Signal Symbol Condition (VDD 3.3V =25°C) Rating Units Min. Max.
tAH8 tAW8 tCYC8 tCCLW tCCHW tCCLR tCCHR tDS8 tDH8 tACC8 tOH8
0.2a
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Table Item Address hold time Address setup time System cycle time Enable pulse width (WRITE) Enable pulse width (WRITE) Enable pulse width (READ) Enable pulse width (READ) WRITE Data setup time WRITE Address hold time READ access time READ Output disable time Signal Symbol Condition (VDD 25°C Rating Units Min. Max. Table Item Address hold time Address setup time System cycle time Enable pulse width (WRITE) Enable pulse width (WRITE) Enable pulse width (READ) Enable pulse width (READ) WRITE Data setup time WRITE Address hold time READ access time READ Output disable time Signal Symbol Condition (VDD 2.1V 25°C Rating Units Min. Max.
tAH8 tAW8 tCYC8 tCCLW tCCHW tCCLR tCCHR tDS8 tDH8 tACC8 tOH8
tAH8 tAW8 tCYC8 tCCLW tCCHW tCCLR tCCHR tDS8 tDH8 tACC8 tOH8
input signal rise time fall time (tr, specified less. When system cycle time extremely fast, +tf) (tCYC8 tCCLW tCCHW (tCYC8 tCCLR tCCHR) specified. timing specified using reference. tCCLW tCCLR specified overlap between being (CS2 "H") being level.
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tAW6 (CS2="1") tCYC6 tCCLR,tCCLW tCCHR,tCCHW tDS6 (Write) tDH6 tAH6
tACC6 (Read)
tOH6
System Read/Write Characteristics (For 6800 Series MPU) Figure Table Item Address hold time Address setup time System cycle time Enable pulse width (WRITE) Enable pulse width (WRITE) Enable pulse width (READ) Enable pulse width (READ) WRITE Data setup time WRITE Address hold time READ access time READ Output disable time Signal Symbol Condition (VDD 25°C Rating Units Min. Max.
tAH6 tAW6 tCYC6 tEWLW tEWHW tEWLR tEWHR tDS6 tDH6 tACC6 tOH6
0.2a
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Table Item Address hold time Address setup time System cycle time Enable pulse width (WRITE) Enable pulse width (WRITE) Enable pulse width (READ) Enable pulse width (READ) WRITE Data setup time WRITE Address hold time READ access time READ Output disable time Signal Symbol Condition (VDD 2.7V =25°C Rating Units Min. Max. Table Item Address hold time Address setup time System cycle time Enable pulse width (WRITE) Enable pulse width (WRITE) Enable pulse width (READ) Enable pulse width (READ) WRITE Data setup time WRITE Address hold time READ access time READ Output disable time Signal Symbol Condition (VDD =2.1V =25°C Rating Units Min. Max.
tAH6 tAW6 tCYC6 tEWLW tEWHW tEWLR tEWHR tDS6 tDH6 tACC6 tOH6
tAH6 tAW6 tCYC6 tEWLW tEWHW tEWLR tEWHR tDS6 tDH6 tACC6 tOH6
input signal rise time fall time (tr, specified less. When system cycle time extremely fast, +tf) (tCYC6 tEWLW tEWHW (tCYC6 tEWLR tEWHR) specified. timing specified using reference. tEWLW tEWLR specified overlap between being (CS2 "H")
0.2a
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Serial Interface
tCCSS (CS2="1") tCSH
tSAS tSCYC tSLW
tSAH
tSHW tSDS tSDH
Figure Table Item Serial Clock Period pulse width pulse width Address setup time Address hold time Data setup time Data hold time CS-SCL time CS-SCL time Signal Symbol Condition (VDD 3.3V, =25°C Rating Units Min. Max.
tSCYC tSHW tSLW tSAS tSAH tSDS tSDH tCSS tCSH
Table
Item Serial Clock Period pulse width pulse width Address setup time Address hold time Data setup time Data hold time CS-SCL time CS-SCL time
Signal
Symbol
Condition
tSCYC tSHW tSLW tSAS tSAH tSDS tSDH tCSS tCSH
(VDD =2.7V =25°C Rating Units Min. Max.
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Table Item Serial Clock Period pulse width pulse width Address setup time Address hold time Data setup time Data hold time CS-SCL time CS-SCL time Signal Symbol Condition (VDD 2.1V 25°C Rating Units Min. Max.
tSCYC tSHW tSLW tSAS tSAH tSDS tSDH tCSS tCSH
input signal rise fall time (tr, specified less. timing specified using standard.
0.2a
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Reset Timing
Internal status During reset Reset complete
Figure Table Item Reset time Reset pulse width Signal Symbol Condition (VDD 3.3V 85°C Rating Units Min. Typ. Max.
Table
Item Reset time Reset pulse width
Signal
Symbol
Condition
Table
(VDD 2.7V 85°C Rating Units Min. Typ. Max.
Item Reset time Reset pulse width
Signal
Symbol
Condition
(VDD 2.1V 85°C Rating Units Min. Typ. Max.
timing specified with standard.
0.2a
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INTERFACE (REFERENCE EXAMPLES)
ST7565S Series connected either 80X86 Series MPUs 68000 Series MPUs. Moreover, using serial interface possible operate ST7565S series chips with fewer signal lines. display area enlarged using multiple ST7565S Series chips. When this done, chip select signal used select individual access. 8080 Series MPUs
IORQ RESET Decoder
Figure 42-1 6800 Series MPUs
RESET Decoder ST7565S
Figure 42-2 Using Serial Interface
Decoder ST7565S
Port Port RESET
Figure 42-3
0.2a
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CONNECTIONS BETWEEN DRIVERS (REFERENCE EXAMPLE)
liquid crystal display area enlarged with ease through multiple ST7565S Series chips. same equipment type. ST7565S (master) ST7565S (slave)
ST7565S
Output
Input
Slave
ST7565S
Master
Figure 43-1 Single-chip Structure
Dots
ST7565S Master
Figure 43-2 Double-chip Structure
Dots
ST7565S Master
ST7565S Slave
Figure 43-3
0.2a
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Revisions
Version Version Version 0.2a Preliminary. update Center Coordinates page 2,3,4,5 update ABSOLUTE MAXIMUM RATINGS CHARACTERISTICS
0.2a
59/59
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ST7565S Matrix Controller/Driver GENERAL DESCRIPTION ST

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