16-Bit Driver with Shift Register Latch REJ03F0176-0201 Rev.2.01

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16-Bit Driver with Shift Register Latch REJ03F0176-0201 Rev.2.01

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M66310P/FP
16-Bit Driver with Shift Register Latch
REJ03F0176-0201 Rev.2.01 2008
M66310P/FP array driver having serial-input parallel output shift-register function with direct coupled reset input output latch function. This product guarantees output electric current which sufficient cathode common drive, capable flowing bits continuously same time. Parallel output open drain output. addition, this product been designed complete CMOS, power consumption greatly reduced when compared with conventional BIPOLAR Bi-CMOS products. Furthermore, layout ensures realization easy printed circuit.
Features
Cathode common drive High output current parallel output simultaneous lighting available power dissipation: µW/package (max) (VCC 25°C, quiescent state) High noise margin schmitt input circuit provides responsiveness long line length. Equipped with direct-coupled reset Open drain output (except serial data output) Wide operating temperature range: +85°C layout facilitates printed circuit wiring. (This layout facilitates cascade connection connection.)
Application
array drive BUTTON TELEPHONE array drive ERASER copier Other various modules
REJ03F0176-0201 Rev.2.01 2008 Page
M66310P/FP
Logic Diagram
Parallel data outputs
Serial data output
Enable Serial input data input
Parallel data output
Serial data output
Shift Direct Latch clock reset clock input input input
Output format
Arrangement
M66310P/FP
Parallel data outputs
Serial data input Enable input
Latch clock input Direct reset input
Parallel data outputs
Shift clock input
Serial data output Parallel data outputs
(Top view) Outline: PRDP0024AA-A (24P4D) (24P2N-B)
REJ03F0176-0201 Rev.2.01 2008 Page
M66310P/FP
Functional M66310P/FP uses silicon gate CMOS process, realizes high-speed high-output currents sufficient drive while maintaining power consumption allowance high noises. Each shift-register consists flip-flops having independent clocks shifting latching. clock input, shift clock input latch clock input independent from each other, shift latch operations being made when changes "H". Serial data input data input first-step shift-register signal shifts shifting registers when pulse impressed CKS. When "L", signal shifts. When pulse impressed CKL, contents shifting register that time stored latching register, they appear outputs from Outputs from open drain outputs. extend number bits, serial data output which shows output shifting register 16th bit. connected, state shifting register with clock delay outputted When reset input changed "L", reset. this case, shifting latching registers reset. impressed output enable input reaches high impedance state, does reach high impedance state. Furthermore, change does affect shift operation. Function Table (Note)
Input Operation Mode Reset Shift latch Shift Latch Latch Output disable Parallel Data Output Serial Data Output Remarks Output lighting Output lights-out
operation Shift
Note
Change from low-level high-level Output state before changed Irrelevant Contents shift register before changed Contents shift register after High impedance
REJ03F0176-0201 Rev.2.01 2008 Page
M66310P/FP
Absolute Maximum Ratings
+85°C, unless otherwise noted)
Item Supply voltage Input voltage Output voltage Input protection diode current Output parasitic diode current Output current output Supply/GND current Power dissipation Storage temperature range Note: Symbol Tstg Ratings -0.5 +7.0 -0.5 -0.5 -410, +150 Unit VCC, (Note) Conditions
M66310FP; +70°C, 85°C derated mW/°C.
Recommended Operating Conditions
+85°C, unless otherwise noted)
Item Supply voltage Input voltage Output voltage Operating temperature range Symbol Topr Limits Unit
REJ03F0176-0201 Rev.2.01 2008 Page
M66310P/FP
Electrical Characteristics
(VCC unless otherwise noted)
Limits Item Positivegoing threshold voltage Negativegoing threshold voltage High-level output voltage High-level output voltage Low-level output voltage High-level input current Low-level input current Maximum output leakage current Quiescent supply current Note: Symbol 25°C +85°C Unit Conditions 0.1V, VCC-0.1V
0.1V, VCC-0.1V
VCC-0.1 3.83 3.50 VCC-0.1 3.83
VCC-0.1 3.66 3.25 VCC-0.1 3.66
VT+,
(Note)
VT+,
0.44
0.53
VT+,
VCC,
-0.5
-5.0
GND,
-1.0
10.0 -10.0
VT+,
20.0
200.0
VCC, GND,
M66310 used under condition output current number simultaneous drive outputs restricted shown Duty Cycle-IOH Standard characteristics.
REJ03F0176-0201 Rev.2.01 2008 Page
M66310P/FP
Switching Characteristics
(VCC
Limits Item Maximum clock frequency Low-level high-level high-level low-level output propagation time (CKS-SQP) High-level low-level output propagation time (RSQP) High-level low-level output propagation time (RQA Low-level high-level high-level low-level output propagation time (CKL-QA Output enable time lowlevel high-level (OE-QA Input Capacitance Output Capacitance Power dissipation (Note Capacitance Note: Symbol fmax tPLH tPHL 25°C +85°C Unit Conditions
(Note
tPHL
tPHZ
tPZH tPHZ
tPZH tPHZ
internal capacitance calculated from operation supply current under no-load conditions. (per latch) power dissipated during operation under no-load conditions calculated using following formula:
Timing Requirements
(VCC
Limits Item CKS, CKL, pulse width setup time with respect setup time with respect hold time with respect recovery time with respect CKS, Symbol trec 25°C +85°C Unit Conditions
(Note
REJ03F0176-0201 Rev.2.01 2008 Page
M66310P/FP
Note: Test Circuit
Input
pulse generator (PG) following characteristics (10% 90%): capacitance includes stray wiring capacitance probe input capacitance.
Typical Characteristics
Duty Cycle (VCC 25°C) Duty Cycle (VCC 85°C)
(16)
(mA)
(mA)
Repetition frequency Numbers indicate number
output circuits that operate simultaneously. Current values circuit.
Repetition frequency Numbers indicate number
output circuits that operate simultaneously. Current values circuit.
(10) (11) (12) (13) (14) (15) (16)
Duty Cycle
Duty Cycle
REJ03F0176-0201 Rev.2.01 2008 Page
M66310P/FP
Timing Chart
tPLH tPHL
tPZH
tPHZ
trec
tPHL
tPHZ
tPZH
tPHZ
REJ03F0176-0201 Rev.2.01 2008 Page
M66310P/FP
Package Dimensions
JEITA Package Code P-DIP24-6.3x29.2-2.54 RENESAS Code PRDP0024AA-A Previous Code 24P4D MASS[Typ.] 1.6g
NOTE) DIMENSIONS "*1" "*2" INCLUDE MOLD FLASH. DIMENSION "*3" DOES INCLUDE TRIM OFFSET.
Reference Dimension Millimeters Symbol
SEATING PLANE
24P2N-B
EIAJ Package Code SOP24-P-300-1.27
Plastic 24pin 300mil
JEDEC Code Weight(g) Lead Material Alloy
7.32 7.62 7.92 29.0 29.2 29.4 6.15 6.45 0.51 0.22 0.27 0.34 2.29 2.54 2.79
Recommended Mount Symbol
Detail Detail
Dimension Millimeters 0.35 0.18 0.25 14.92 15.02 15.12 1.27 7.82 8.12 8.42 1.41 0.525 0.675 0.25 0.76 7.62 1.27
REJ03F0176-0201 Rev.2.01 2008 Page
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16-Bit Driver with Shift Register Latch REJ03F0176-0201 Rev.2.01

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