Type 8-bit 36ch Selector Built-in Converter with Buffer Amplifiers

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Type 8-bit 36ch Selector Built-in Converter with Buffer Amplifiers

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M62370GP
Type 8-bit 36ch Selector Built-in Converter with Buffer Amplifiers
REJ03D0879-0300 Rev.3.00 2008
M62370GP CMOS semiconductor containing channels 8-bit converters. operable with supply voltage between easy serial data input, 3-pin (DI, CLK, connection with microcomputer. also contains terminal, enabling cascade connection, therefore suitable automatic control combination with microcomputer.
Features
Operable with voltage between 16-bit serial data input (connected pins: CLK, channels built-in 8-bit converter channels converters capable selecting outputting data stored each converter, through control terminals
Application
Digital/analog conversion industrial home-use electronic equipment. Automatic control combination with EEPROM microcomputer (Substitute conventional semi-fixed resistor).
Block Diagram
16-bit shift register
Decoder
8-bit latch
VDD1 VSS1
8-bit latch
8-bit latch
8-bit latch
Data control
AO24
AO35
AO36
VDD2 VSS2
REJ03D0879-0300 Rev.3.00 2008 Page
M62370GP
Arrangement
M62370GP
AO11 AO10 AO36
VSS1 VDD1 AO12 AO13 AO14 AO15
AO35 AO34 AO33 AO32 VSS2 VDD2 AO31 AO30 AO29 AO28
AO16
AO17
AO18
AO19
AO21
AO24
AO25
AO20
AO22
AO23
AO26
(Top view) Outline: 48P6D-A
Name AO11 AO12 AO31 AO32 AO36 VDD1 VSS1 VDD2 VSS2 Function Serial data input terminal input serial data 16-bit length Terminal output data 16-bit shift register Shift clock input terminal. Input signal input 16-bit shift register rise shift clock pulse When H-level signal input this terminal, value stored 16-bit shift register loaded decoder converter output register. 8-bit converter output terminal
Power supply terminal terminal Data select signal input terminal channel No.31 through Data select signal input terminal channel No.31 through Upper reference voltage input terminal power supply operational amplifier channel No.1 through Lower reference voltage input terminal channel No.1 through Upper reference voltage input terminal power supply operational amplifier channel No.25 through Lower reference voltage input terminal channel No.25 through
REJ03D0879-0300 Rev.3.00 2008 Page
AO27
M62370GP
Block Diagram Explanation Terminals
16-bit shift register
Address decoder
VDD1 VSS1
8-bit latch 8-bit converter
8-bit latch 8-bit converter
8-bit latch selector 8-bit converter
8-bit latch selector 8-bit converter
Data control
AO30
AO31
AO36
VDD2
VSS2
Absolute Maximum Ratings
25°C, unless otherwise noted.)
Item Supply voltage Upper reference voltage converter Input voltage Output voltage Power dissipation Terminal derating Operating temperature Storage temperature Symbol Topr Tstg Ratings -0.3 +7.0 -0.3 +7.0 -0.3 -0.3 +125 Unit mW/°C Conditions
25°C
REJ03D0879-0300 Rev.3.00 2008 Page
M62370GP
Electrical Characteristics
<Digital Part> (VCC 10%, VDD, +85°C, unless otherwise noted.)
Item Supply voltage Circuit current Input leak current Input voltage Input high voltage Output voltage Output high voltage Note: Symbol IILK Limits Unit Conditions operation,
-400
Standard value 25°C
<Analog Part> (VCC 10%, VDD, +85°C, unless otherwise noted.)
Item Current dissipation converter upper reference voltage range converter lower reference voltage range Buffer amplifier output voltage range Buffer amplifier output driving range Differential nonlinearity error Nonlinearity error Zero code error Full scale error Output capacitive load Buffer amplifier output impedance Symbol -300 -1.0 -1.5 Limits Unit ±100 +300 -200 Upper saturation voltage Lower saturation voltage 2.700 2.700 0.050 load (IAO Conditions
SZERO SFULL
REJ03D0879-0300 Rev.3.00 2008 Page
M62370GP
Characteristics
(VCC VDD, +85°C, unless otherwise noted.)
Item Clock pulse width Clock pulse width Clock rise time Clock fall time Data setup time Data hold time setup time hold time pulse duration time Data output delay time converter output setting time Symbol tCKL tCKH tDCH tCHD tCHL tLDC tLDH tLDD Limits Unit Conditions
VAO: This time until output becomes final value
Timing Chart
tCKH
tCKL
tDCH tCHD tLDH tCHL tLDC
tLDD
output
output
REJ03D0879-0300 Rev.3.00 2008 Page
M62370GP
Digital Data Format
First Last
select data
data
Data
Note: Output (VrefU VrefL) VrefL (VrefU VrefL) VrefL (VrefU VrefL) VrefL (VrefU VrefL) VrefL (VrefU VrefL) VrefL VrefU
VrefU VDD1, VDD2, VrefL VSS1, VSS2
Select Data
Selection Don't care selection selection AO30 selection AO31 selection AO32 selection AO36 selection AO31 selection AO36 selection AO31 selection AO36 selection AO31 selection AO36 selection Don't care Don't care
AO31 Through AO36 Data Selected Address selected Address selected Address selected Address selected
REJ03D0879-0300 Rev.3.00 2008 Page
M62370GP
Timing Chart (Model)
output
REJ03D0879-0300 Rev.3.00 2008 Page
M62370GP
Package Dimensions
48P6D-A
EIAJ Package Code LQFP48-P-77-0.50 JEDEC Code Weight(g) 0.18 Lead Material Alloy
Plastic 48pin body LQFP
Recommended Mount
Symbol Dimension Millimeters 0.13 0.18 0.28 0.105 0.125 0.175 0.45 0.75 0.25 0.08 0.225
Detail
REJ03D0879-0300 Rev.3.00 2008 Page
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Type 8-bit 36ch Selector Built-in Converter with Buffer Amplifiers

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