128M-BIT MASK (SOP ONLY) organization (word mode) Fast access tim

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128M-BIT MASK (SOP ONLY) organization (word mode) Fast access tim

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MX23L12810
128M-BIT MASK (SOP ONLY)
organization (word mode) Fast access time Random access: 100ns (max.) Current Operating:50mA Standby:15uA Supply voltage 3.0~3.6V Package (500mil) Temperature
CONFIGURATION
SOP(For Word Mode Only)
DESCRIPTION
Symbol A0~A22 D0~D15 Function Address Inputs Data Outputs Chip Enable Input Output Enable Input Power Supply Ground Connection
MX23L12810
ORDER INFORMATION
Part MX23L12810MC-10 MX23L12810MC-12 MX23L12810MC-15 Access Time 100ns 120ns 150ns Package
P/N:PM0750
REV. 1.9, FEB. 2005
MX23L12810
ABSOLUTE MAXIMUM RATINGS
Item Supply Voltage Relative Voltage Relative Ambient Operating Temperature Storage Temperature Symbol Topr Tstg Ratings -0.3V 4.3V -1.3V (Note) -65° 125°
Note: Minimum voltage input pins -0.5V. During voltage transitions, inputs undershoot 1.3V periods 20ns. Maximum voltage input pins VCC+0.5V. During voltage transitions, input overshoot VCC+2.0V periods 20ns.
CHARACTERISTICS 3.0V~3.6V)
Item Output High Voltage Output Voltage Input High Voltage Input Voltage Input Leakage Current Output Leakage Current Operating Current Standby Current (TTL) Standby Current (CMOS) Input Capacitance Output Capacitance Symbol ICC1 ISTB1 ISTB2 COUT MIN. 2.4V 2.2V -0.3V MAX. 0.4V VCC+0.3V 50mA 15uA 10pF 10pF Conditions -0.4mA 1.6mA
f=5MHz, outputs open CE>VCC-0.2V 1MHZ 1MHZ
CHARACTERISTICS 3.0V~3.6V)
Item Read Cycle Time Address Access Time Chip Enable Access Time Output Enable Time Output Hold After Address Output High Delay Symbol tACE 23L12810-10 MIN. MAX. 100ns 100ns 100ns 30ns 20ns 23L12810-12 MIN. MAX. 120ns 120ns 120ns 50ns 20ns 23L12810-15 MIN. MAX. 150ns 150ns 150ns 70ns 20ns
Note: Output high-impedance delay (tHZ) measured from going high, this parameter guaranteed design over full voltage temperature operating range tested.
P/N:PM0750
REV. 1.9, FEB. 2005
MX23L12810
Test Conditions
Input Pulse Levels Input Rise Fall Times Input Timing Level Output Timing Level Output Load 0.4V~2.4V 10ns 1.4V 1.4V Figure
(load)=-0.4mA DOUT (load)=1.6mA
C<100pF
Note:No output loading present tester load board. Active loading used under software programming control. Output loading capacitance includes load board's stray capacitance.
TIMING DIAGRAM
RANDOM READ
tACE
DATA
VALID
VALID
VALID
P/N:PM0750
REV. 1.9, FEB. 2005
MX23L12810
PACKAGE INFORMATION
P/N:PM0750
REV. 1.9, FEB. 2005
MX23L12810
REVISION HISTORY
Revision Description Modify Current Operating:60mA->40mA Modify ICC1:60mA->40mA, f=5MHz, outputs open ICC2 Modify Current Operating:40mA->50mA Modify ICC1:40mA->50mA Access Time:90/100/120ns Temperature:0~70° Modify Supply voltage:3.4V±0.2->3.0V~3.6V Modify Package Information supply voltage relative Change voltage relative VSS:-0.5V VCC+2.0 modify Package Information Added notes Absolute Maximum ratings Modify VIN: -0.5V -1.3V (Note) Removed access time:90ns Page P1,2 P1,2 P1,2 Date DEC/12/2000
DEC/14/2000 AUG/28/2001
FEB/01/2002 JUL/19/2002 NOV/20/2002 DEC/03/2002 DEC/10/2002 FEB/17/2005
P/N:PM0750
REV. 1.9, FEB. 2005
MX23L12810
MACRONIX INTERNATIONAL CO., LTD.
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MACRONIX INTERNATIONAL CO., LTD. reserves right change product specifications without notice.

128M-BIT MASK (SOP ONLY) organization (word mode) Fast access tim

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