Short Descriptions Features.4 Architecture Overview Descriptions.6

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ATJ2073
Short Descriptions Features.4 Architecture Overview Descriptions.6
Pinout. sort number. sort Function.
Functional Description
Core Core System Memory Mapping USB1.1 Interface MPEG Decoder. Microphone Interface. SPDIF Interface Power Management Unit (PMU).
Control Interfaces
System Power Matrix Scan 4*13 Driver. 8080/6800 Interface
Configurations.32 Electrical Characteristics
Absolute Maximum Ratings Capacitance Characteristics 2.35 3.15 Characteristics
Typical Performance Characteristics
Converter Characteristics. Converter Internal Power Amplifier channels) MCU/DSP Dissipation (Ivdd Frequency).
Outline Dimension.44
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ATJ2073
Short Descriptions
ATJ2073 single-chip highly-integrated digital music system solution devices such dedicated audio players, PDAs, cell phones. includes audio decoder with high performance with embedded RAM, ADPCM/AG record capabilities interface downloading music uploading voice recordings. ATJ2073 also provides interface S/PDIF audio data input, flash memory, LED/LCD, button switch inputs, headphone, microphone, radio control. ATJ2073's programmable architecture supports other digital audio standards. devices like Flash Disk, ATJ2073 mass storage slave device personal computer system. ATJ2073 power consumption allow long battery life efficient flexible on-chip DC-DC converter that allows many different battery configurations, including 1xAA, 1xAAA, 2xAA,2xAAA.
Features
24-bit Core with on-chip support On-chip 16Kx24 (16K-256)x24 switched memory space Integrated 8bit with on-chip support which instructions compatible with Internal bytes SRAM accessed External 25-bit code address space with chips select Support with on-chip Supported 3*4Gbyte Nand type Flash 2-channel 1-channel CTC(Counter/Timer Controller) On-chip interrupt controller Built-in power management unit(PMU), supporting batteries operation Support with 32.768kHz 76.8kHz Built-in USB1.1 interface Support SPDIF IN/UART/IR interface Support on-chip Stereo Sigma-Delta Support external 6800 8086 series interface Support 4x13 matrix Keyboard Circuit Auto Scan Support General Purpose Input/Output Support external Epson Series Frame Buffer 320x240 dots Support on-chip biased duty driver(4x13dots, multiplexed Support external CMOS image sensor interface On-chip 16-bit Microphone input support sample rate 8K/11K/12K/16K/22K/24KHz On-chip channel headphone power amplifiers 128-pin 14x14x1.4mm LQFP package
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ATJ2073
Architecture Overview
Port
Microphone
Nor/Nand Flash Smart Media Cand Compact Flash Card Multi Media Card Driver General Purpose Input /Output LED/ILCD KeyScan/ Switchs SPDIF GPIO Module Mouse/ Keyboard
Ext.Mem
PlatForm
8Bit SPDIF 24bit Headphone Amplifeer
Bus/DMA/IRQ Controller UART/
gain
Earphone
zRAM
16K*8
16K*24
16K*24
PLL1/2 XTAL
Battery 1AAor2AA
24.576MHZ
32.768KHZ
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ATJ2073
Descriptions
Pinout
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ATJ2073
sort number
2(1) 2(3) 3(1) 3(3) 4(1) 4(3) 5(1) 5(3) 6(1) 6(3) 7(1) 7(3) 8(1) 8(3) 9(1) 9(3) 10(1) 10(2) 10(3) 11(1) Name GIOF3 KEYO3 SEG15 GIOF1 KEYO1 SEG13 GIOF0 KEYO0 SEG12 GIOE7 KEYI11 SEG11 GIOE6 KEYI10 SEG10 GIOE5 KEYI9 SEG9 GIOE4 KEYI8 SEG8 GIOE3 KEYI7 SEG7 GIOD7 TCPD7 KEYI3 SEG3 GIOD6 TCPD6 Type Reset Default Short Description Power supply Pads circuits Bit3 general purpose port Bit3 scan circuit output SEG15 int. 4comX28seg driver Bit1 general purpose port Bit1 scan circuit output SEG13 int. 4comX28seg driver Bit0 general purpose port Bit0 scan circuit output SEG12 int. 4comX28seg driver Bit7 general purpose port Bit11 scan circuit input SEG11 int. 4comX28seg driver Bit6 general purpose port Bit10 scan circuit input SEG10 int. 4comX28seg driver Bit5 general purpose port Bit9 scan circuit input SEG9 int. 4comX28seg driver Bit4 general purpose port Bit8 scan circuit input SEG8 int. 4comX28seg driver Bit3 general purpose port Bit7 scan circuit input SEG7 int. 4comX28seg driver Bit7 general purpose port Bit7 Epson Series data Bit3 scan circuit input SEG3 int. 4comX28seg driver Bit6 general purpose port Bit6 Epson Series data
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ATJ2073
Data Sheet Bit2 scan circuit input SEG2 int. 4comX28seg driver Bit5 general purpose port Bit5 Epson Series data Bit1 scan circuit input SEG1 int. 4comX28seg driver Digital signal ground Bit4 general purpose port Bit4 Epson Series data Bit0 scan circuit input SEG0 int. 4comX28seg driver Power supply core Bit3 general purpose port Bit3 Epson Series data COM3 int. 4comX28seg driver Bit2 general purpose port Bit2 Epson Series data COM2 int. 4comX28seg driver Bit1 general purpose port Bit1 Epson Series data COM1 int. 4comX28seg driver Bit0 general purpose port Bit0 Epson Series data COM0 int. 4comX28seg driver Ext. memory write active signal Nand type flash write enable Ext. memory read active signal Nand type flash read enable Bit0 ext. memory address Bit1 ext. memory address Bit2 ext. memory address Bit3 ext. memory address Bit4 ext. memory address Bit5 ext. memory address Actions Semiconductor Co.,LTD
KEYI2 SEG2 GIOD5 TCPD5 KEYI1 SEG1 GIOD4 TCPD4 KEYI0 SEG0
11(3) 12(1) 12(2) 12(3) 14(1) 14(2) 14(3) 16(1) 16(3) 17(1) 17(3) 18(1) 18(3) 19(1) 19(3) 20(1) 21(1)
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GIOD3 TCPD3 COM3 GIOD2 TCPD2 COM2 GIOD1 TCPD1 COM1 GIOD0 TCPD0 COM0 MWRWEMRDRE
ATJ2073
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Data Sheet Bit6 ext. memory address Bit7 ext. memory address Bit8 ext. memory address Ext. non-maskable interrupt input Digital signal ground Digital signal ground Power supply Pads circuits Bit9 ext. memory address Bit10 ext. memory address Bit11 ext. memory address Bit12 ext. memory address Bit13 ext. memory address Debug pin, data output from Debug pin, data input Debug pin, clock into Ext. memory chip select Test mode control, 0:normal mode 1:test mode Debug pin, reset Ext. memory chip select Debug pin, enable Ext. memory chip select System reset input Bit14 ext. memory address Ext. memory chip select Bit0 ext. memory data Bit1 ext. memory data Bit2 ext. memory data Bit3 ext. memory data Bit4 ext. memory data Bit5 ext. memory data Bit6 ext. memory data Bit7 ext. memory data Ext. memory chip select Ext. memory chip select Actions Semiconductor Co.,LTD
NMIGND ZICEDO ZICEDI ZICECK CE2TEST ZICERSTCE3ZICEENCE4RESETA14 CE5D0 CE0CE1-
ATJ2073
67(1) 68(1) CE6VDD LOSCI LOSCO USBDUSBD+ USBVBUS PVDD PAOR PAOL PGND PAIR PAIL AOUTR AOUTL VRDA VRAD AGCI Reference voltage Microphone amplifier input Ext. memory chip select Power supply core frequency crystal input frequency crystal output Digital signal ground Bit15 ext. memory address Command latch enable Nand type flash Bit16 ext. memory address Address latch enable Nand type flash Bit17 ext. memory address Bit18 ext. memory address Bit19 ext. memory address bus/GPO Bit20 ext. memory address bus/GPO Bit21 ext. memory address bus/GPO Bit22 ext. memory address bus/GPO Bit23 ext. memory address bus/GPO Bit24 ext. memory address bus/GPO Power supply Pads circuits negative connect positive connect cable power signal Bypass capacitor power amplifier Output right channel power amplifier Output left channel power amplifier
Ground power amplifier circuits Input right channel power amplifier Input left channel power amplifier Int. sigma-dalta right channel analog output Int. sigma-dalta left channel analog output Reference voltage
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ATJ2073
121(1) 121(3) MICOUT MICIN VMIC AGND AVCC BATSEL IBIAS VREFI DCDIS VBAT DCF2 DCF1 DCOP2 DCOP1 AVDD AVSS HOSCI HOSCO XSCLK DISPOFF FRAME LCM_CE Microphone pre-amplifier output Microphone pre-amplifier input Power supply microphone bias circuits Analog ground record, blocks Power supply record, blocks Battery select, 0:one battery 1:two batteries Int. bias with ext.R(1.5Mohm) ground Reference voltage input (1.5v) Battery monitor reference voltage input example 1.40v) Battery monitor reference voltage input (for example 1.30v) Battery monitor reference voltage input (for example 1.15v) Battery monitor reference voltage input (for example 1.05v) DC-DC converter disable, 0:enable 1:disable Battery signal input (1.0-1.5v) DC-DC feedback DC-DC feedback Power supply int. regulator Power supply core Input int. power switch DC-DC pulse output DC-DC pulse output Power supply analog circuits Ground analog circuits High frequency crystal input High frequency crystal output Digital signal ground Epson Series XSCLK output Epson Series display control output Epson Series frame signal output 6800 Series Int. 4comX28seg driver
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ATJ2073
123(1) 124(1) 124(2) 125(1) 125(3) 126(1) 126(2) 127(1) 128(1) 128(3) YSCLK_LP LCM_RWGIOC2 SIN2 IRRX LCM_CSV1 GIOC3 SOUT2 IRTX GIOC4 SPDIFRX GIOF4 KEYO4 SEG16 Power supply Pads circuits Epson Series YSCLK/LP signal output 6800 Series RWBit2 general purpose port UART2 serial input receive input Epson Series signal output 6800 Series CSInt. 4comX28seg driver Bit3 general purpose port UART2 serial output transmit output Bit4 general purpose port SPDIF receive input Bit4 general purpose port Bit4 scan circuit output SEG16 int. 4comX28seg driver
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ATJ2073
sort Function
Type Power
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Name
Type
Reset Default
Short Description
AVCC AVDD PGND AGND AVSS BATSEL IBIAS VREFI
Power supply Pads circuits Power supply Pads circuits Power supply Pads circuits Power supply Pads circuits Power supply record, blocks Power supply core Power supply core Power supply core Power supply circuits analog
Digital signal ground Digital signal ground Digital signal ground Digital signal ground Digital signal ground Ground power amplifier circuits Analog ground record, blocks Ground analog circuits Power supply int. regulator Battery select, 0:one battery 1:two batteries Int. bias with ext.R(1.5Mohm) ground Reference voltage input (1.5v) Battery monitor reference voltage input (for example 1.40v) Battery monitor reference voltage input (for example 1.30v) Battery monitor reference voltage input (for example 1.15v) Battery monitor reference voltage input (for example 1.05v) Actions Semiconductor Co.,LTD
DC-DC
ATJ2073
Interface TEST Reset31 Chip Select Interface DCDIS VBAT DCF2 DCF1 DCOP2 DCOP1 ZICERSTZICEENZICEDI ZICECK ZICEDO NMITEST RESETCE0CE1CE2CE3CE4CE5CE6GIOF0 KEYO0 SEG12 GIOF1 KEYO1 SEG13 KeyBoard Interface GIOF3 KEYO3 SEG14 GIOF4 KEYO4 SEG15
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Data Sheet DC-DC converter disable, 0:enable 1:disable Battery signal input (1.0-1.5v) DC-DC feedback DC-DC feedback Input int. power switch DC-DC pulse output DC-DC pulse output Debug pin, reset Debug pin, enable Debug pin, data input Debug pin, clock into Debug pin, data output from Ext. non-maskable interrupt input Test mode control, 0:normal mode 1:test mode System reset input Ext. memory chip select Ext. memory chip select Ext. memory chip select Ext. memory chip select Ext. memory chip select Ext. memory chip select Ext. memory chip select Bit0 general purpose port Bit0 scan circuit output SEG12 LCD4*28 Bit1 general purpose port Bit1 scan circuit output SEG13 LCD4*28 Bit3 general purpose port Bit3 scan circuit output SEG14 LCD4*28 Bit4 general purpose port Bit4 scan circuit output SEG15 LCD4*28 Actions Semiconductor Co.,LTD
ATJ2073
GIOE3 KEYI7 SEG7 GIOE4 KEYI8 SEG8 GIOE5 KEYI9 SEG9 GIOE6 KEYI10 SEG10 GIOE7 KEYI11 SEG11 GIOD0 TCPD0 COM0 GIOD1 TCPD1 COM1 GIOD2 TCPD2 COM2 GIOD3 TCPD3 COM3 Display Epson Series Interface GIOD4 TCPD4 KEYI0 SEG0 GIOD5 TCPD5 KEYI1 SEG1
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Data Sheet Bit3 general purpose port Bit7 scan circuit input SEG7 LCD4*28 Bit4 general purpose port Bit8 scan circuit input SEG8 LCD4*28 Bit5 general purpose port Bit9 scan circuit input SEG9 LCD4*28 Bit6 general purpose port Bit10 scan circuit input SEG10 LCD4*28 Bit7 general purpose port Bit11 scan circuit input SEG11 LCD4*28 Bit0 general purpose port Bit0 Epson Series data COM0 LCD4*28 Bit1 general purpose port Bit1 Epson Series data COM1 LCD4*28 Bit2 general purpose port Bit2 Epson Series data COM2 LCD4*28 Bit3 general purpose port Bit3 Epson Series data COM3 LCD4*28 Bit4 general purpose port Bit4 Epson Series data Bit0 scan circuit input SEG0 LCD4*28 Bit5 general purpose port Bit5 Epson Series data Bit1 scan circuit input SEG1 LCD4*28 Actions Semiconductor Co.,LTD
ATJ2073
GIOD6 TCPD6 KEYI2 SEG2 GIOD7 TCPD7 KEYI3 SEG3 XSCLK DISPOFF FRAME LCM_CE YSCLK_LP LCM_RW125 LCM_CS121 FRAME LCM_CE YSCLK_LP LCM_RW125 6800 Series Interface LCM_CS52
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Data Sheet Bit6 general purpose port Bit6 Epson Series data Bit2 scan circuit input SEG2 LCD4*28 Bit7 general purpose port Bit7 Epson Series data Bit3 scan circuit input SEG3 LCD4*28 Epson Series XSCLK output Epson Series display control output Epson Series frame signal output 6800 Series Epson Series signal output YSCLK/LP
6800 Series RWEpson Series signal output 6800 Series CSEpson Series frame signal output 6800 Series Epson Series signal output YSCLK/LP
6800 Series RWEpson Series signal output 6800 Series CSBit0 ext. memory data Bit1 ext. memory data Bit2 ext. memory data Bit3 ext. memory data Bit4 ext. memory data Bit5 ext. memory data Bit6 ext. memory data Bit7 ext. memory data Bit0 general purpose port Actions Semiconductor Co.,LTD
GIOD0
ATJ2073
TCPD0 COM0 GIOD1 TCPD1 COM1 GIOD2 TCPD2 COM2 Display LCD4*28 Interface GIOD3 TCPD3 COM3 GIOD4 TCPD4 KEYI0 SEG0 GIOD5 TCPD5 KEYI1 SEG1 GIOD6 TCPD6 KEYI2 SEG2 GIOD7 TCPD7 KEYI3 SEG3 GIOE3 KEYI7 SEG7 GIOE4 KEYI8 SEG8 GIOE5 KEYI9
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Data Sheet Bit0 Epson Series data COM0 LCD4*28 Bit1 general purpose port Bit1 Epson Series data COM1 LCD4*28 Bit2 general purpose port Bit2 Epson Series data COM2 LCD4*28 Bit3 general purpose port Bit3 Epson Series data COM3 LCD4*28 Bit4 general purpose port Bit4 Epson Series data Bit0 scan circuit input SEG0 LCD4*28 Bit5 general purpose port Bit5 Epson Series data Bit1 scan circuit input SEG1 LCD4*28 Bit6 general purpose port Bit6 Epson Series data Bit2 scan circuit input SEG2 LCD4*28 Bit7 general purpose port Bit7 Epson Series data Bit3 scan circuit input SEG3 LCD4*28 Bit3 general purpose port Bit7 scan circuit input SEG7 LCD4*28 Bit4 general purpose port Bit8 scan circuit input SEG8 LCD4*28 Bit5 general purpose port Bit9 scan circuit input Actions Semiconductor Co.,LTD
ATJ2073
SEG9 GIOE6 KEYI10 SEG10 GIOE7 KEYI11 SEG11 GIOF0 KEYO0 SEG12 GIOF1 KEYO1 SEG13 GIOF3 KEYO3 SEG14 GIOF4 KEYO4 SEG15 NAND TYPE FLASH Interface MWRWE21
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Data Sheet SEG9 LCD4*28 Bit6 general purpose port Bit10 scan circuit input SEG10 LCD4*28 Bit7 general purpose port Bit11 scan circuit input SEG11 LCD4*28 Bit0 general purpose port Bit0 scan circuit output SEG12 LCD4*28 Bit1 general purpose port Bit1 scan circuit output SEG13 LCD4*28 Bit3 general purpose port Bit3 scan circuit output SEG14 LCD4*28 Bit4 general purpose port Bit4 scan circuit output SEG15 LCD4*28 Bit15 ext. memory address Command latch enable Nand type flash Bit16 ext. memory address Address latch enable Nand type flash Bit0 ext. memory data Bit1 ext. memory data Bit2 ext. memory data Bit3 ext. memory data Bit4 ext. memory data Bit5 ext. memory data Bit6 ext. memory data Bit7 ext. memory data Ext. memory write active signal Nand type flash write enable Ext. memory read active signal Actions Semiconductor Co.,LTD
MRD-
ATJ2073
MWRWE21 MRDRE TYPE FLASH Interface
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Data Sheet Nand type flash read enable Ext. memory write active signal Nand type flash write enable Ext. memory read active signal Nand type flash read enable Bit0 ext. memory address Bit1 ext. memory address Bit2 ext. memory address Bit3 ext. memory address Bit4 ext. memory address Bit5 ext. memory address Bit6 ext. memory address Bit7 ext. memory address Bit8 ext. memory address Bit9 ext. memory address Bit10 ext. memory address Bit11 ext. memory address Bit12 ext. memory address Bit13 ext. memory address Bit14 ext. memory address Bit15 ext. memory address Command latch enable Nand type flash Bit16 ext. memory address Address latch enable Nand type flash Bit17 ext. memory address Bit18 ext. memory address Bit19 ext. memory address /GPO Bit20 ext. memory address /GPO Bit21 ext. memory address /GPO Bit22 ext. memory address /GPO Bit23 ext. memory address /GPO Actions Semiconductor Co.,LTD
ATJ2073
Crystal Interface Interface Power Amplifier Interface Output Interface Interface LOSCI LOSCO HOSCI HOSCO USBDUSBD+ USBVBUS PVDD PAOR PAOL PAIR PAIL AOUTR AOUTL VRDA VRAD AGCI MICOUT MICIN VMIC Reference voltage Microphone amplifier input Microphone pre-amplifier output Microphone pre-amplifier input Bit0 ext. memory data Bit1 ext. memory data Bit2 ext. memory data Bit3 ext. memory data Bit4 ext. memory data Bit5 ext. memory data Bit6 ext. memory data Bit7 ext. memory data frequency crystal input frequency crystal output High frequency crystal input
Data Sheet Bit24 ext. memory address /GPO
High frequency crystal output negative connect positive connect cable power signal Bypass capacitor power amplifier Output right channel power amplifier Output amplifier Input amplifier Input amplifier left channel power right left channel channel power power
Int. sigma-dalta right channel analog output Int. sigma-dalta left channel analog output Reference voltage
Power supply microphone bias circuits Actions Semiconductor Co.,LTD
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ATJ2073
UART Interface GIOC2 SIN2 IRRX GIOC3 SOUT2 IRTX Interface GIOC2 SIN2 IRRX GIOC3 SOUT2 IRTX SPDIF Interface GIOC4 SPDIFRX Bit2 general purpose port UART2 serial input receive input Bit3 general purpose port UART2 serial output transmit output Bit2 general purpose port UART2 serial input receive input Bit3 general purpose port UART2 serial output transmit output Bit4 general purpose port SPDIF receive input
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Functional Description
Core
24-bit Harvard architecture with on-chip support built works with memory word length bits. ATJ2073 16KB*24bit Program Memory (PM) (16KB-256)*24bit Data Memory (DM). Memory-Mapped Register include interface. Process capability controlled software MIPS.
Core
Integrated 8-bit with on-chip support. Instruction compatible with Z80. Process capability controlled software 24.576 MHz.
System Memory Mapping
64KB Memory Space 0000H 16KB Internal Memory Space (MCU.A15=0)
16KB
IPMH 16KB
IPMM 16KB
IPML 16KB
IDMH 16KB
IDMM 16KB
IDML 16KB
VRAM 9.6KB
8000H Entended Memory Space (MCU.A15=1)
32KB
BANK0(32KB) BANK1(32KB) BANK2(32KB) BANK3(32KB)
FFFFH
BANK.(32KB)
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ATJ2073
Assuming instruction uses A[15:0] access memory space. A[15]=0 mapped internal SRAM ,then A[14]=0, mapped lower 16KB (ZRAM) A[14]=1, mapped upper 16KB when they mapped into memory space. Additional three extended bits SRAM Page Register index=0x05) used decode which page access. Accessed Page byte middle byte high byte reserved byte middle byte high byte on-chip VRAM (Video RAM) IPM/IDM memory space unit. A[15]=1 External address A25~A15 mapped EMA15-25. While EMA26-28 used decode CE0- CE6-. CE0- used access boot code from ROM/MASK/NOR-type Flash CE1- CE6- configured access ROM, NAND-type Flash
USB1.1 Interface
Compliant with SPEC 1.1. Certified endpoints provided. Support bulk, control, interrupt isochronous transfer mode Endpoint endpoint employ independent FIFOs bulk isochronous transfers. Endpoint endpoint have bytes maximum packet size. There interrupt requests each endpoint respectively. Generally, this setting should satisfying most practical needs.
MPEG Decoder
With system software, ATJ2073 competent MPEG 1/2/2.5 Layer I/II/III decode. Sample rates (SR) rates (BR) supported shown following table. MPEG SR\BR 11.025 MPEG SR\BR
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ATJ2073
22.05 MPEG SR\BR 44.1 Table Sample rates rates Layer supported
MPEG SR\BR 22.05 MPEG SR\BR 44.1 Table MPEG SR\BR 22.05 MPEG SR\BR 44.1 Table Sample rates rates Layer supported Sample rates rates Layer supported
Microphone Interface
Microphone interface composed microphone pre-amplifier 16-bit ADC. Microphone pre-amplifier 35db gain least suitable recording volume noise microphone power supply must very low. composed regulator external first order LPF. function implemented variable gain amplifier register bits (MCU code control). adopts switched-capacitor successive approximation method. input from microphone preamplifier's output. Function enable, sampling frequency select, some other control signals from Page Actions Semiconductor Co.,LTD
ATJ2073
register.
AVCC AGND
DE_4
1.5v
MICIN
MICOUT
D4_[3:0] AGCI
SPDIF Interface
AES/EBU interface means serially communicating digital audio data through single transmission line. provides channels audio data, method communicating control information, error detection capabilities. control information transmitted sample accumulates block structure. data bi-phase encoded, which enables receiver extract clock from data Coding violations, defined preambles, used identify sample block boundaries. 8-level 8-bit FIFO used buffer data After received frame- four bytes channel status appended into FIFO. When FIFO empty SPDIF enabled, send frame.
Channel
Channel
Channel Sub-frame
Channel Sub-frame
Channel
Channel Frame
Frame
Frame Start Channel Status Block
Figure 7.1.
Frame/Block Format
Figure 7.2. Biphase-Mark Encoding
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ATJ2073
Figure 7.3. Preamble Forms
Sub-f
Pream
AuxData
Audio Data alidity User Data Channel Status Data Parity
2728293031
Figure 7.4.
Sub-frame Format
Power Management Unit (PMU)
consists DC-DC converter regulator battery monitor. ATJ2073 need power trails work rightly, (Core Power) (I/O Power). power level decided external voltage-divided resistance network describe clearly assume VDD=2.35V, VCC=3.15V. There battery modes with ATJ2073, one-battery mode two-battery mode, selected BATSEL. one-battery mode, VBAT 0.8V, some internal circuit (C1) begin work first will rise VDD. When reaches 2.35V, that internal circuit (C1) stops another circuit (C2) takes over both DC-DC converter. two-battery mode, VBAT 1.3V, internal regulator enabled supply VDD. 0.8V VBAT 1.3V, will stimulate DC-DC converter maintain VDD. judgement between VBAT 1.3V must have hysteresis preventing ATJ2073 from unstable toggle between regulator mode DC-DC mode. DC-DC converter always runs maintain VCC. Battery monitor compares battery voltage VBAT with four reference voltage pins named VL0, VL1, VL2, VL3. four reference voltages decided external resistance network. normal battery (1.5V) value 1.4V, 1.3V, 1.15V, 1.05V. VBAT VL3, ATJ2073 will into STANDBY mode; VBAT 0.8V, ATJ2073 will into mode, frequency timer still active. disable clock block when that block. Even more stop clock, frequency OSC, while design appropriately.
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ATJ2073
DCDIS BATOK
DCDC2 DCDC1
DCF2 DCOP2 DCOP1 DCF1
LOSCO LOSCI
DCDIS
DF_6 BATOK
BATOK DCDIS DCDIS
reset
rstBATOK DF_7 DF_6 DF_5 DF_4
regulator
BATOK DCDIS
rst0.8v VBAT
DCDISSEL
1.5v
RESET- DCDIS BATSEL VREFI
Control Interfaces
System Power
When VBAT about 0.8V level DC-DC converter. will begin rise VCC. frequency oscillator will begin work too. After duration POR(Power Reset) will deassert ATJ2073 finishes Power sequence RESET- assert, will from address=0x8000. Boot code address=0x8000 will following: 8003h (04h), Start Start:
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ATJ2073
VBAT
LOSC
8003
Matrix Scan
When scan circuit enabled, ATJ2073 will scan keyboard periodly. drives KEYOUTn [n=0.7] pulse turn When pressed, KEYINn connecting will found level. There internal 8-bit registers value latch scan. only another register (Key Scan Data Register access value Those internal registers mapped into this register, internal pointer used point current register return scan data when read. write this register will clear internal register, pointer will increase point next register after read performed.
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ATJ2073
KeyOut0 KeyOut1 KeyOut2 KeyOut3 KeyOut4 KeyOut5 KeyOut6 KeyOut7
10th 11th 11th 12th
Example: Reg$C0 Readback indicate following keys have pressed [KeyOut ,KeyIn] [1,0], [1,2], [1,7], [3,4], [7,4]
4*13 Driver
ATJ2073 builds biased duty driver. outputs signals glass directly. Bias voltage need connect by-pass capacitor ground. V0=GND, V3=VCC.
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KeyIn0 KeyIn1 KeyIn2 KeyIn3 KeyIn4 KeyIn5 KeyIn6 KeyIn7 KeyIn8 KeyIn9 KeyIn10 KeyIn11
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ATJ2073
COM0
COM1 COM2 COM3 SEGn ON=V0 OFF=V2
ON=V3 OFF=V1
COM0 COM1 COM2 COM3 +1+1+1 1+1+1+1
1.732
8080/6800 Interface
ATJ2073 supports high-speed 8-bit parallel bi-directional with 6800-series 8080-series interface Page Actions Semiconductor Co.,LTD
ATJ2073
with 8080-series interface: select Data register Command register LCM. CEx- used chip select. pull high VCC. MWR- write enable signal, ATJ2073 latches D[7:0] rising edge. MRD- read enable signal drives D[7:0] when MRD- low.
with 6800-series interface: select Data register Command register LCM. LCM_CS- used chip select. pull high VCC. LCM_RW- read/write indication signal high indicates read operation. LCM_CE- latch signal. should latch D[7:0] falling edge.
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ATJ2073
Configurations
ATJ2073 many Multiple Function Pins (MFP), these pins multiplexed several functions. name will indicate default function. Other functions enabled system register.
Number Name GIOD0 GIOD1 GIOD2 GIOD3 GIOD4 GIOD5 GIOD6 GIOD7 GIOE3 GIOE4 GIOE5 GIOE6 GIOE7 GIOF0 GIOF1 GIOF3 GIOF4 FRAME Default: IO[B0]=0x00, IO[B1]=0x00 GPIO GIOD0 GIOD1 GIOD2 GIOD3 GIOD4 GIOD5 GIOD6 GIOD7 GIOE3 GIOE4 GIOE5 GIOE6 GIOE7 GIOF0 GIOF1 GIOF3 GIOF4 COM0 COM1 COM2 COM3 SEG0 SEG1 SEG2 SEG3 SEG7 SEG8 SEG9 SEG10 SEG11 SEG12 SEG13 SEG15 SEG16
FUNCTION
SEGMENT BOARD LCMD0 LCMD1 LCMD2 LCMD3 KEYI0 KEYI1 KEYI2 KEYI3 KEYI7 KEYI8 KEYI9 KEYI10 KEYI11 KEYO0 KEYO1 KEYO3 KEYO4 LCMD4 LCMD5 LCMD6 LCMD7
Enable Condition
IO[B0]=0x2A, IO[B1] [7:5]=101
IO[B0]=0x3F, IO[B1][7:6]=11
IO[B0][5:2]=0101
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ATJ2073
Number Name MWRMRDA15 FRAME YSCLK_LP GIOC2 GIOC3 GIOC4 Default IO[28]=0xFE IO[70].1=1 IO[70].1=1 NAND FLASH WERE LCM_CE LCM_RWLCM_CSSIN2 SOUT2 IRRX IRTX
FUNCTON
UART IrDA SPDIF
SPDIFRX IO[70].2=1
Enable Condition
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ATJ2073
Electrical Characteristics
Absolute Maximum Ratings
Parameter Supply voltage Input voltage Storage temperature Symbol Tstg Condition MIN. -0.5 -0.5 -0.5 -0.5 MAX. +2.7 +3.6 +3.9 VCC+0.6 +125 Unit
Cautions short-circuit more output pins simultaneously. even above parameters exceeds absolute maximum ratings even momentarily, quality product degraded. absolute maximum ratings,therefore, specify value exceeding which product physically damaged. product well within these ratings. specifications conditions shown Characteristics characteristics ranges normal operation quality assurance product.
Capacitance
Parameter Input capacitance capacitance Symbol
Condition Unmeasured pins returned MIN. MAX. Unit
Characteristics
Parameter High-level output voltage Low-level output voltage High-level input voltage Low-level input voltage Input leakage current Output leakage current GPIO
Page
2.35 3.15 MIN. 0.6* -0.3 TYP. 2.60 0.4V Unit
Symbol Idrive1
Condition
VCC, VCC, Gpioc1,Gpioc3,Gpioc5
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ATJ2073
Drive Supply Current batteries mode Ivdd Fullspeed mode (MCU 24.576MHz internal SRAM,DSP 24MIPS) Standby mode Ivcc Idrive2 Other Gpio Fullspeed mode (MCU 24.576MHz internal SRAM,DSP 24MIPS) Standby mode 1.25
Data Sheet
Notes IvDD total core power supply current power supply. IvDD applied LOGIC block. Ivcc total power supply current power supply. Ivcc applied USB, block.
Characteristics
test input waveform
input pins
test output measuring points
0.6VCC 0.4VCC
Test Points
0.6VCC 0.4VCC
output pins
Reset parameter Parameter Symbol
0.5VCC
Test Points
0.5VCC
Condition RESET#
MIN.
MAX. Unit
Reset input low-level tWRSL width
RESET#
Initialization parameter Parameter Data sampling time (from RESET#
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tWRSL
Symbol
Condition
MIN.
MAX. Unit 61.04
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ATJ2073
Output delay RESET# time (from 61.04
32.768KHz RESET# PINs
Hi-Z
Normal Operation Sampling Point
GPIO interface parameter Parameter Input level width Symbol tGPIN Condition Normal operation MIN. fMCUclk fMCUclk MAX. Unit
GPIO input rise time tGPRISE GPIO input fall time tGPFALL Output level width tGPOUT
Notes fMCUclk frequency that running upon. Input level width
Input rise/fall time
Output level width
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Ordinary parameter Parameter Data access time (from address) Data access time (from CEx# Data input setup time Data input hold time
Note
Symbol tACC
Condition
MIN.
MAX. Unit
HOSC=24.576MH HOSC=24.576MH HOSC=24.576MH HOSC=24.576MH
)Note
A[24:0] CEn-/MRD-
D[7:0](I)
External system parameter Parameter Address setup time command signal
Note
Symbol tXAS tXAS tXAH tWXDS tWXDH
Condition
MIN. MAX. Unit 0.5T
Memory Read 0.5T Memory Write 1.5T 0.5T
Address hold time (from command signal
Note Note Note
Data output setup time command signal
Data output hold time (from command signal
Data input setup time command signal )Note tRXDS Data input hold time (from command signal
Note
tRXDH
Notes MRD#, MWR# called command signals External System Interface. (ns) 1000 fMCUCLK
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MCUCLK A[24:0] CEnMRDD[7:0](I) MWRD[7:0](O)
RXDS
RXDH
WXDS
WXDH
Operation Instruction fetch cycle
MRD# CEn#
Memory read cycle
MRD# CEn#
Memory write cycle
MWR# CEn#
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Keyboard interface parameter Parameter KEYOUT (7:0) low-level width Symbol tSCAN Condition Debounce time=2.5ms
MIN. MAX. Unit
Voltage stabilization time tKWAIT Debounce time=2.5ms (KEYOUT KEYOUT (n+1) scan interval time Debounce time=2.5ms Debounce time=2.5ms Debounce time=2.5ms input delay time (from KEYOUT input hold time (from KEYOUT
Remarks KEYOUT(7:0) multiplexed with GIOF(7:0); KEYIN(3:0) multiplexed with GIOD(7:4); KEYIN(11:4) multiplexed with GIOE(7:0) Keyscan Debouncing time thru Bit(2:0) Configuration1 Register[0xB1h] Keyboard scan parameter
KEYOUTn
(output)
tKWAIT tSCAN
KEYOUT(n+1)
(output)
Remark
Keyboard scan parameter
KEYOUT (output) KEYOUT (output)
tKWAIT
KEYOUT (output)
Keyboard port parameter
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KEYOUTn
(output)
KEYIN(7:0)
(input)
Remark
Serial interface parameter Prescale Value Baud Rate 1200 1800 2000 2400 3600 4800 7200 9600 14400 19200 28800 38400 57600 115200 230400 460800 750000 921600 1500000 Divisor %Error 0.16% 0.16% 0.16% 0.53% 0.16% 0.16% 0.16% 0.16% 0.16% 0.16% 0.16% 0.16% 0.16% 0.16% 0.16% Divisor 1.625 %Error 0.16% 0.16% 0.16% 0.16% 0.16% 0.16% 0.16% 0.16% 0.16% 0.16% 0.16% 0.16% 0.16% Divisor %Error 0.16% 0.16% 0.16% 0.16% 0.16% 0.16% 0.16% 0.16% 0.00% 0.00%
Note Data transfer rate bit, which determined divisor baud-rate generator that with UART1/2 Baud Rate Registers clock prescaler that with UART1/2 Control Registers.
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Typical Performance Characteristics
Converter Characteristics
2.35 Sample Rate=32KHz) Parameter Dynamic range Total Harmonic Distortion Noise Frequency Response (20-13KHz) Full Scale Input Voltage(Gain=0dB) Symbol THD+N Vifs Typ. Unit mVpp
Converter
interface parameter
Characteristics Table Parameter Clock Output Frequency Symbol
Test Conditions kHz/s Stereo bit/s
Min. Typ. Max.
Unit
SOCLK
Wordstrobe Hold Time SOISS after falling edge clock Data Hold Time after SOODC falling edge clock
SOCLK/ SOCLK/
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Converter Characteristics
Level=0x05, Volume Level 0x0D)
VDD=2.35V, VCC=3.3V, Sample Rate=48KHz, Bias Current=8uA, Quantizer
Parameter Signal Noise Ratio Total Harmonic Distortion Frequency Response 20-20KHz Output Common Mode Voltage Full Scale Output Voltage Interchannel Isolation with load. (1KHz) Interchannel Gain Mismatch(1KHz)
Symbol THD+N Vofs
0.05
Unit
±0.6 0.38 0.025
Vrms
Internal Power Amplifier channels)
Test circuit:
2.2u 4.7k
Output Power: (32Ohm, Avdd=2.15V 10mW (32Ohm, Avcc=3.00V
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MCU/DSP Dissipation (Ivdd Frequency)
Dissipation (Vbat=3.0V,DSP under reset, runs internal SRAM) Clock Source 32.768KHZ Divisor factor /(1-1024) 24.576MHz /128 /256 /512 /1024 Ivdd(Max) 350uA 8.5mA 4.7mA 2.9mA 1.8mA 1.4mA 1.1mA 0.96mA 0.88mA 0.85mA 0.84mA 0.83mA
Dissipation (Vbat=3.0V,MCU Debug mode) Speed (MIPS) Ivdd (Max) 11.7mA 18.8mA 30.7mA 43.2mA 55.9mA
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Outline Dimension
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information data contained this data sheet without commitment, considered offer conclusion contract shall construed create liability. issue this data sheet invalidates previous issues. Product availability delivery dates exclusively subject respective order confirmation form; same applies orders based development samples delivered. this publication, Actions Semiconductor Co.,LTD. does assume responsibility patent infringements other rights third parties which result from use. Reprinting generally permitted, indicating source. However, prior consent must obtained cases.
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Short Descriptions Features.4 Architecture Overview Descriptions.6

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