CS5265/75 CS5265 CS5275 Simplex encryption/decryption1 cores desi

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CS5265/75 CS5265 CS5275 Simplex encryption/decryption1 cores desi

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Simplex Encryption/Decryption Cores
CS5265/75
CS5265 CS5275 Simplex encryption/decryption1 cores designed achieve data privacy digital broadband, wireless, multimedia systems. These high performance application specific cores support (Rijndael) algorithm described NIST Federal Information Processing Standard. They offer efficient means providing both encryption decryption core order rapidly construct complete security solutions. CS5265 CS5275 cores available both ASIC programmable logic versions that have been hand crafted Amphion deliver high performance while minimizing power consumption silicon area. Amphion CS5265 Compact Simplex Core designed offer efficient high performance means both encryption decryption. Amphion CS5275 Fast Simplex Core offers increased data throughput comparison CS5265 Compact Simplex Core, while still achieving highly efficient hardware implementation AES. Amphion CS5200 series cores offer complete solution modern data encryption needs, offering simple interface, internal memory usage, external keyspace processing, highly efficient design offering superior performance.
Compact CS5265 Virtual Private Network (VPN) Corporate Training Center High Speed CS5275
Figure Example Secure Distance Corporate Training Scheme Using
Patent Pending
FEATURES
Fully compliant with NIST FIPS Encryption Decryption same core 128-bit data block 128-bit 32-bit Electronic Codebook mode (ECB) Output Feedback mode (OFB) Cipher Block Chaining mode (CBC) Cipher Feedback mode (CFB) Counter mode (CTR)
APPLICATIONS
Electronic financial transactions eCommerce Banking Securities exchange Point-of-Sale Secure corporate communications Storage Area Networks (SAN) Virtual private networks (VPN) Video conferencing Voice services Personal mobile communications Video phones Point-to-Point Wireless Wearable computers Secure environments Satellite communications Surveillance systems Network appliances
Amphion continues expand family application-specific cores http://www.amphion.com current list products
CS5265/75
Simplex Encryption/Decryption Cores
CS5265/75 SYMBOL DESCRIPTION
Table gives descriptions input output ports (shown graphically Figure CS5265/75 simplex encrytion/decryption cores. Unless otherwise stated, signals active high bit(0) least significant bit.
DADDR LDKEY KADDR SETIKEY MODE LOAD
Figure CS5265/75 Symbol
KSTAT DSTAT
CS5265/ CS5275
QSTRB QADDR
Table CS5265/75 Simplex Encryption/Decryption Interface Signal Definitions Signal
DADDR LDKEY KADDR SETIKEY
Width (Bits)
Plaintext/Ciphertext data
Description
Plaintext/Ciphertext data address, lowest 32-bit word Load encryption Encryption data Encryption address, lowest 32-bit word inverse (decryption) key. asserting SETIKEY when highest encryption word loaded (KADDR 11), more, less than cycles, inverse will derived from encryption which loaded normal manner. encrypt decrypt keys loaded remain unchanged, operating mode changed block block with dead cycles. keys different, decryption should loaded first SETIKEY should Asserted. encryption then loaded while core preparing decryption round keys. Encryption/Decryption mode select Encryption, Decryption Load Plaintext Ciphertext enable Synchronous system clock, rising edge active Asynchronous reset port status. When Asserted, loading cipher keys allowed Input port status next cycle after text D[3] (the highest word 128-bit clock) loaded, DSTAT will De-asserted indicate encryption progress. will Asserted when core ready loading highest word next 128-bit text. lower three words loaded anytime period when DSTAT depending key-size selection. Output strobe indicating Plaintext/Ciphertext word valid Plaintext Ciphertext data address, lowest 32-bit word Plaintext Ciphertext data
MODE LOAD KSTAT DSTAT
QSTRB QADDR
CS5265/75
Simplex Encryption/Decryption Cores
FUNCTIONAL DESCRIPTION
Rijndael algorithm iterated block cipher that encrypts decrypts data 128-bit data blocks using 128-bit, 192-bit, 256-bit key. algorithm consists initial data/key addition Nine, eleven thirteen rounds when length 128-bits, 192-bits, 256-bits respectively final round which variation typical round
Both versions Amphion simplex encryption/ decryption cores follow block diagram shown Figure CS5200 encryption cores excellent complements other Amphion cores. instance, they combined with CS3500 series Turbo Coders rapidly construct secure transmission channel, they combined with CS4191 ADPCM codec achieve secure, high speed, high channel-count speech processing Voice-over-Packet (VoP) systems. Amphion encryption/decryption cores also excellent choice security incorporated into broadband switches, routers, firewalls remote access concentrators. Likewise, cores ideal Secure Socket Layer (SSL) channel used servers, gateways other access applications requiring high number parallel channels carry eCommerce.
Figure represents block diagram Rijndael encryption algorithm. Rijndael round transforms data using permutations, non-linear substitutions, additions Galois field multiplications. Rijndael schedule consists parts: Expansion expands cipher into linear array 4-byte words Round Selection selection required number Round Keys from expanded array
Control Logic
Plaintext Ciphertext
Input Buffer
Encryption/Decryption Round Transformations
Ciphertext Output Buffer Plaintext
Buffer
Scheduler
Inverse Buffer
Figure Block Diagram CS5265 CS5275 Simplex Encryption/Decryption Cores
CS5265/75
Simplex Encryption/Decryption Cores
AVAILABILITY IMPLEMENTATION INFORMATION
Hardware accelerated technology governed internationally export regulations. Amphion cores listed this datasheet have been officially reviewed classified Department Trade Industry Bureau Export Administration. These cores licensed immediate export following countries: Austria Denmark Hungary Zealand Spain Australia Belgium Canada Czech Republic Finland France Germany Greece Ireland Italy Japan Luxembourg Netherlands Norway Poland Portugal Sweden Switzerland United Kingdom United States
delivery other destinations, please contact Amphion. Approval subject applicable export regulations. Licensees Amphion cores responsible complying with applicable requirements re-export electronics containing technology.
ASIC CORES
applications that require high performance, cost high integration ASIC, Amphion delivers application specific silicon cores that pre-optimized targeted ASIC technology Amphion experts. Consult your local Amphion representative product specific performance information, current availability individual products, lead times ASIC core porting.
Table CS5265 CS5275 ASIC Cores Using TSMC Process Standard Cell Libraries
PRODUCT LOGIC GATES CYCLES OPERATION TIMING CONSTRAINT (MHz) DATA RATE (MBITS/SEC) 581a 2327
CS5265TK CS5275TK
49.3K
Data rate refers maximum throughput plaintext/ciphertext mode
PROGRAMMABLE LOGIC CORES
ASIC prototyping projects requiring fast time-to-market programmable logic solution, Amphion delivers programmable logic core solutions that offer silicon-aware performance tuning found Amphion products, combined with rapid design times offered today's leading programmable logic solutions.
Table CS5265 CS5275 Programmable Logic Cores using Altera APEX20KE-1
PRODUCT CS5265AA CS5275AA LOGIC USED (LE) 1666 2297 MEMORY USED (ESB) CYCLES OPERATION CLOCK SPEED (MHz) DATA RATE (MBITS/Sec)
Table CS5265 CS5275 Programmable Logic Cores using Xilinx Virtex-2
PRODUCT CS5265X2 CS5275X2 SLICES 1256 MEMORY USED (BRAM) CYCLES OPERATION CLOCK SPEED (MHz) DATA RATE (MBITS/Sec)
CS5265/75
Simplex Encryption/Decryption Cores
Typical ASIC FPGA Design Flow (Conceptual)
Data Formats Supplied AMPHION
System-Level Code simulation
Accurate Model
Hardware Development
Simulation
Simulation Models
Logic Synthesis
Testbench
(VHDL Verilog)
Gate-level analysis (timing functional)
Netlists
(Verilog, VHDL, EDIF, .bd)
Physical Design
FPGA Programming Files
Figure Design Data Formats Supplied Amphion
CS5265/75
ABOUT AMPHION
Simplex Encryption/Decryption Cores
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Amphion (formerly Integrated Silicon Systems) leading supplier speech coding, video/ image processing channel coding application specific silicon cores system-on-a-chip (SoC) solutions broadband, wireless, mulitmedia markets Web: www.amphion.com Email: info@amphion.com
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04/02 Publication DS5265/75 v1.0

CS5265/75 CS5265 CS5275 Simplex encryption/decryption1 cores desi

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