AVAILABLE MILITARY SPECIFICATIONS 5962-93091 MIL-STD-883 AS8

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AVAILABLE MILITARY SPECIFICATIONS 5962-93091 MIL-STD-883 AS8

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Austin Semiconductor, Inc. 512K EEPROM Module
AVAILABLE MILITARY SPECIFICATIONS
5962-93091 MIL-STD-883
AS8E512K8
ASSIGNMENT
(Top View)
32-Pin 32-Pin (CW)
FEATURES
Access times 150, 200, 250, JEDEC Compatible Pinout 10,000 Write Endurance Cycles year Data Retention Organized 512Kx8 Operation with single volt supply power CMOS Compatible Inputs Outputs
OPTIONS
Packaging Timing 150ns 200ns 250ns 300ns Operating Temperature Range -Military (-55oC +125oC) -Industrial (-40oC +85oC)
MARKING
-150 -200 -250 -300
DESCRIPTION Address Inputs Data Inputs/Outputs Chip Select Output Enable Write Enable +5.0V Power
GENERAL DESCRIPTION
Austin Semiconductor, Inc. AS8E512K8 Megabit CMOS EEPROM Module organized 512K 8-bits. built with four 128K components single decoder. AS8E512K8 achieves high speed access, power consumption high reliability employing advanced CMOS memory technology. Software data protection implemented using JEDEC Optional Standard algorithm. This military temperature grade product ideally suited military space applications requiring high reliability.
Decoder
more products information please visit site www.austinsemiconductor.com
Austin Semiconductor, Inc. reserves right change products specifications without notice.
AS8E512K8 Rev. 6/03
Austin Semiconductor, Inc.
DEVICE OPERATION:
AS8E512K8 electrically erasable programmable memory module that accessed like Static read write cycle without need external components. device contains 128-byte-page register allow writing bytes data simultaneously. During write cycle, address bytes data internally latched, freeing address data other operations. Following initiation write cycle, device will automatically write latched data using internal control timer. write cycle detected DATA\ polling I/O7. Once write cycle been detected access read write begin.
AS8E512K8
TOGGLE BIT:
addition DATA\ Polling AS8E512K8 provides another method determining write cycle. During write operation, successive attempts read data from device will result toggling between zero. Once write completed, will stop toggling valid data will read. Reading toggle begin time during write cycle.
DATA PROTECTION:
precautions taken, inadvertent writes occur during transitions host power supply. module incorporated both hardware software features that will protect memory against inadvertent writes.
READ:
AS8E512K8 accessed like Static RAM. When high, data stored memory location determined address pins asserted outputs. outputs high impedance state when either high. This dual-line control gives designers flexibility preventing contention their system.
HARDWARE PROTECTION:
Hardware features protect against inadvertent writes AS8E512K8 following ways: sense below 3.8V (typical) write function inhibited; power-on delay once reached 3.8V device will automatically time (typical) before allowing write; write inhibit holding low, high high inhibits write cycles; noise filter pulses less than (typical) inputs will initiate write cycle.
BYTE WRITE:
pulse input with (respectively) high initiates write cycle. address latched falling edge WE\, whichever occurs last. data latched first rising edge WE\. Once byte, word double word write been started will automatically time itself completion.
SOFTWARE DATA PROTECTION:
software controlled data protection feature been implemented theAS8E512K8. When enabled, software data protection (SDP), will prevent inadvertent writes. feature enabled disabled user shipped with disabled, enabled host system issuing series three write commands; three specific bytes data written three specific addresses (refer Software Data Protection Algorithm). After writing three byte command sequence after each entire AS8E512K8 will protected from inadvertent write operations. should noted, that once protected host still perform byte page write AS8E512K8. This done preceding data written same three byte command sequence used enable SDP. Once set, will remain active unless disable command sequence issued. Power transitions disable will protect AS8E512K8 during power-up power-down conditions. command sequences must conform page write timing specifications. data enable disable command sequences written device memory addresses used sequence written with data either byte page write operation. After setting SDP, attempt write device without three byte command sequence will start internal write timers. data will written device; however, duration tWC, read operations will effectively polling operations.
PAGE WRITE:
page write operation AS8E512K8 allows BWDWs data written into device during single internal programming period. Each BWDW must written within 150us (tBLC) previous BWDW. tBLC limit exceeded AS8E512K8 will cease accepting data commence internal programming operation. each high transition during page write operation, A7-A18 must same. A0-A6 inputs used specify which bytes within page written. bytes loaded order altered within same load period. Only bytes which specified writing will written; unnecessary cycling other bytes within page does occur.
DATA\ POLLING:
AS8E512K8 features DATA\ Polling indicate write cycle. During byte page write cycle attempted read last byte written will result complement written data presented Once write cycle been completed, true data valid outputs, next write cycle begin. DATA\ Polling begin anytime during write cycle.
AS8E512K8 Rev. 6/03
Austin Semiconductor, Inc. reserves right change products specifications without notice.
Austin Semiconductor, Inc.
ABSOLUTE MAXIMUM RATINGS* Voltage Supply Relative Supply/Input Voltage Range1.-0.6V +6.25V Voltage A9.-0.6V +13.5V Voltage other pins.-0.6V +6.25V Storage Temperature.-65°C +150°C Operating Temperature, (Ambient).-55oC +125oC Lead Temperature (soldering seconds).+300oC Maximum Junction Temperature**.+165°C
NOTE: Including pins, with respect ground.
AS8E512K8
*Stresses greater than those listed under "Absolute Maximum Ratings" cause permanent damage device. This stress rating only functional operation device these other conditions above those indicated operation section this specification implied. Exposure absolute maximum rating conditions extended periods affect reliability. Junction temperature depends upon package type, cycle time, loading, ambient temperature airflow.
CAPACITANCE 1MHz, C)(1)
SYMBOL CADD, OE\, CI/O CCE\ CONDITIONS 1MHz VOUT 1MHz 1MHz UNIT
OPERATING MODES
MODE Read Write
DOUT High
Standby/Write Inhibit Write Inhibit Write Inhibit Output Disable
NOTE: VIH. Refer Programming Waveforms.
High
ELECTRICAL CHARACTERISTICS RECOMMENDED OPERATING CONDITIONS (-55oC<TA<+125oC; +10%)
PARAMETER Input Load Current Output Leakage Current Standby Current CMOS Standby Current Active Current Input Voltage Input High Voltage Output Voltage Output High Voltage Output High Voltage CMOS
AS8E512K8 Rev. 6/03
CONDITION VI/O -0.2V 2.2V MHz; IOUT
SYMBOL ISB1 ISB2 -400 VOH1 VOH2
UNITS
0.45
-100 4.5V
Austin Semiconductor, Inc. reserves right change products specifications without notice.
Austin Semiconductor, Inc.
AS8E512K8
ELECTRICAL CHARACTERISTICS RECOMMENDED READ OPERATING CONDITIONS (-55oC<TA<+125oC; +10%)
A.C. READ WAVEFORMS(1,2,3,4)
ADDRESS tACC
OUTPUT ALID
ADDRESS VALID
OUTPUT
HIGH
NOTES: delayed tACC-tCE after address transition without inpact tACC. delayed tCE-tOE after falling edge without inpact tACC-tOE after address change without inpact tACC.
specified from whichever occurs first 5pF). This parameter characterized 100% tested. must remain valid through pulse.
INPUT TEST WAVEFORMS MEASUREMENT LEVEL TEST CONDITIONS
AS8E512K8 Rev. 6/03
OUTPUT TEST LOAD
5.0V 1.8K 1.3K 100pF
Austin Semiconductor, Inc. reserves right change products specifications without notice.
Austin Semiconductor, Inc.
SYMBOL tBLC tWPH PARAMETER Write Cycle Time Address Set-up time Address Hold Time Data Set-up Time Data Hold Time Write Pulse Width Byte Load Cycle Time Write Pulse Width High
AS8E512K8
ELECTRICAL CHARACTERISTICS RECOMMENDED WRITE OPERATING CONDITIONS (-55oC<TA<+125oC; +10%)
UNITS
ADDRESS
WRITE WAVEFORMS CONTROLLED5 tOEH tOES
tAS5
tAH5
tWPH
DATA WRITE WAVEFORMS CONTROLLED5 ADDRESS tAS5 tAH5 tOES tOEH
tWPH
DATA
AS8E512K8 Rev. 6/03
Austin Semiconductor, Inc. reserves right change products specifications without notice.
Austin Semiconductor, Inc.
PAGE MODE CHARACTERISTICS
PARAMETER Address, Setup Time Address Hold Time Chip Select Setup Time Chip Select Hold Time Write Pulse Width (WE\ CE\) Data Setup Time Data, Hold Time SYMBOL tAS, tOES tDH, tOEH UNITS
AS8E512K8
PAGE MODE WRITE WAVEFORMS(1,2,3) tWPH A0-A18 DATA
VALID DATA BYTE BYTE BYTE BYTE BYTE BYTE
tBLC
VALID ADDR
NOTES: through must specify page address during each high transition ?W/E ?C/E). ?O/E must high only when ?W/E ?C/E both low. must remain valid throughout low.
CHIP ERASE WAVEFORMS
NOTES: 5µsec (min) msec (min) VH=12.0
AS8E512K8 Rev. 6/03
Austin Semiconductor, Inc. reserves right change products specifications without notice.
Austin Semiconductor, Inc.
AS8E512K8
SOFTWARE DATA PROTECTION ENABLE ALGORITHM(1)(5)
Load Data Address 5555 Load Data Address 2AAA Load Data Address 5555 Load Data Address(4) Load Last Byte Last Address
SOFTWARE DATA PROTECTION DISABLE ALGORITHM(1)(5)
Load Data Address 5555 Load Data Address 2AAA Load Data Address 5555 Load Data Address 5555 Load Data Address 2AAA Load Data Address 5555 Load Data Address(4) Load Last Byte Last Address
Writes Enabled(2)
Enter Data Protect State
Exit Data Protect State(3)
NOTES: Data Format: I/O0 (Hex) Write Protect state will active write even other data loaded. Write Protect state will deactivated period even other data loaded. bytes data loaded. Applies each module.
AS8E512K8 Rev. 6/03
Austin Semiconductor, Inc. reserves right change products specifications without notice.
Austin Semiconductor, Inc.
AS8E512K8
SOFTWARE PROTECTED PROGRAM CYCLE WAVEFORM(1,2,3,4)
A0-A6
5555 2AAA 5555
tWPH
BYTE ADDRESS
tBLC
A7-A18 DATA
PAGE ADDRESS
BYTE
BYTE
BYTE
NOTES: A0-A14 must conform addressing sequence first three bytes shown above. After command sequence been issued page write operation follows, page address inputs (A7-A18) must same each high transition CE\). Must high only when both low. must remain valid throughout cycle.
AS8E512K8 Rev. 6/03
Austin Semiconductor, Inc. reserves right change products specifications without notice.
Austin Semiconductor, Inc.
DATA POLLING CHARACTERISTICS(1)
PARAMETER Data Hold Time Hold Time Output Delay
AS8E512K8
SYMBOL tOEH
UNITS
Write Recovery Time
NOTES: These parameters characterized 100% tested. A.C. Read Characteristics.
DATA POLLING WAVEFORMS
tOEH
HIGH
I/O7 A0-A18
AS8E512K8 Rev. 6/03
Austin Semiconductor, Inc. reserves right change products specifications without notice.
Austin Semiconductor, Inc.
TOGGLE CHARACTERISTICS(1)
PARAMETER Data Hold Time Hold Time Output Delay High Pulse Write Recovery Time
AS8E512K8
SYMBOL tOEH tOEHP
UNITS
NOTES: These parameters characterized 100% tested. A.C. Read Characteristics.
TOGGLE WAVEFORMS(1,2,3)
I/O6
HIGH
NOTES: Toggling either Both will operate toggle bit. Beginning ending state I/O6 will vary. address location used address should vary.
AS8E512K8 Rev. 6/03
Austin Semiconductor, Inc. reserves right change products specifications without notice.
Austin Semiconductor, Inc.
AS8E512K8
MECHANICAL DEFINITIONS*
Case #112 (Package Designator 5962-93091, Case Outline
Specifications SYMBOL 0.161 0.027 0.125 0.009 0.590 1.654 0.580 1.492 0.100 0.016 0.02 0.012 0.610 1.686 0.600 1.508 0.181 0.047
NOTE: These dimensions SMD. ASI's package dimensional limits differ, they will within limits.
*All measurements inches.
AS8E512K8 Rev. 6/03
Austin Semiconductor, Inc. reserves right change products specifications without notice.
Austin Semiconductor, Inc.
AS8E512K8
ORDERING INFORMATION
EXAMPLE: AS8E512K8CW-250/XT Device Number AS8E512K8 AS8E512K8 AS8E512K8 AS8E512K8 Package Type Speed -150 -200 -250 -300 Process
*AVAILABLE PROCESSES Industrial Temperature Range Extended Temperature Range MIL-PRF-38534
-40oC +85oC -55oC +125oC -55oC +125oC
AS8E512K8 Rev. 6/03
Austin Semiconductor, Inc. reserves right change products specifications without notice.
Austin Semiconductor, Inc.
AS8E512K8
DSCC PART NUMBER CROSS REFERENCE*
Package Designator
Part AS8E512K8CW-150/HQ AS8E512K8CW-150/HQ AS8E512K8CW-200/HQ AS8E512K8CW-200/HQ AS8E512K8CW-250/HQ AS8E512K8CW-250/HQ AS8E512K8CW-300/HQ AS8E512K8CW-300/HQ Part 5962-9309101HYC 5962-9309101HYA 5962-9309104HYC 5962-9309104HYA 5962-9309103HYC 5962-9309103HYA 5962-9309102HYC 5962-9309102HYA
part number reference only. Orders received referencing part number will processed SMD.
AS8E512K8 Rev. 6/03
Austin Semiconductor, Inc. reserves right change products specifications without notice.

AVAILABLE MILITARY SPECIFICATIONS 5962-93091 MIL-STD-883 AS8

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