IND: -7.5/10/12/14/18 MACH111SP-5/7/10/12/15 High-Density CM
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COM'L: -5/7.5/10/12/15
IND: -7.5/10/12/14/18
MACH111SP-5/7/10/12/15
High-Density CMOS Programmable Logic
Programmable Logic Company From
DISTINCTIVE CHARACTERISTICS
JTAG-Compatible, in-system programming Pins Macrocells Commercial Industrial fCNT Bus-FriendlyInputs I/Os Peripheral Component Interconnect (PCI) compliant (-5/-7/-10) Programmable power-down mode Outputs Flip-flops; clock choices "PAL26V16" blocks with buried macrocells Improved routing over MACH110 Pin-compatible with MACH211SP JEDEC compatible with MACH111
IN-SYSTEM PROGRAMMING
In-system programming allows MACH111SP programmed while soldered onto system board. Programming MACH111SP in-system yields numerous benefits stages development: prototyping, manufacturing, field. Since insertion into programmer isn't needed, multiple handling steps resulting bent leads eliminated. design modified in-system design changes debugging while prototyping, programming boards production, field upgrades. MACH111SP offers advantages available other CPLD architectures with in-system programming. MACH devices have extensive routing resources pin-out retention; design changes resulting pin-out changes other CPLDs cancel advantages in-system programming. MACH111SP deployed JTAG (IEEE 1149.1) compliant chain.
GENERAL DESCRIPTION
MACH111SP member CMOS MACH® Performance Plus device family. This device approximately three times logic macrocell capability popular PALCE22V10 without loss speed. MACH111SP consists PAL® blocks interconnected programmable switch matrix. blocks essentially "PAL26V16" structures complete with product-term arrays programmable macrocells, which programmed high speed power, buried macrocells. switch matrix connects blocks each other input pins, providing high degree connectivity between fully connected blocks. This allows designs placed routed efficiently. MACH111SP macrocell provides either registered combinatorial outputs with programmable polarity. registered configuration chosen, register configured D-type T-type help reduce number product terms. register type decision made designer software. macrocells connected cell. buried macrocell desired, internal feedback path from macrocell used, which frees input. MACH111SP enhanced version MACH111, adding JTAG-compatible in-system programming feature.
Publication# 21120 Rev: Amendment/0 Issue Date: November 1996
BLOCK DIAGRAM
I/O0 I/O15
Cells Macrocells
Logic Array Logic Allocator Switch Matrix Logic Array Logic Allocator
Macrocells
Cells
I/O16 I/O31
CLK0/I0 CLK1/I1
21120A-1
MACH111SP-5/7/10/12/15
CONNECTION DIAGRAM MACH111SP View
44-Pin PLCC
I/O31
I/O30
I/O29
I/O5 I/O6 I/O7 CLK0/I0 I/O8 I/O9 I/O10 I/O11
I/O27 I/O26 I/O25 I/O24 CLK1/I1 I/O23 I/O22 I/O21
I/O12 I/O13 I/O14 I/O15 I/O16 I/O17 I/O18 I/O19 I/O20
I/O28
I/O4
I/O3
I/O2
I/O1
I/O0
21120A-2
Note: Pin-compatible with MACH211SP.
DESIGNATIONS
CLK/I Clock Input Ground Input Input/Output Test Data Test Clock Test Mode Select Test Data
Supply Voltage
MACH111SP-5/7/10/12/15
CONNECTION DIAGRAM MACH111SP View
44-Pin TQFP
I/O5 I/O6 I/O7 CLK0/I0 I/O8 I/O9 I/O10 I/O11
I/O4 I/O3 I/O2 I/O1 I/O0 I/O31 I/O30 I/O29 I/O28
I/O27 I/O26 I/O25 I/O24 CLK1/I1 I/O23 I/O22 I/O21
I/O12 I/O13 I/O14 I/O15 I/O16 I/O17 I/O18 I/O19 I/O20
21120A-3
Note: Pin-compatible with MACH211SP.
DESIGNATIONS
CLK/I Clock Input Ground Input Input/Output Supply Voltage Test Data Test Clock Test Mode Select Test Data
MACH111SP-5/7/10/12/15
ORDERING INFORMATION Commercial Products
programmable logic products commercial applications available with several ordering options. order number (Valid Combination) formed combination
MACH
FAMILY TYPE MACH Macro Array CMOS High-Speed
OPTIONAL PROCESSING Blank Standard Processing
DEVICE NUMBER Macrocells, Pins, Power-Down mode, Bus-Friendly Inputs I/Os PRODUCT DESIGNATION In-system Programmable
OPERATING CONDITIONS Commercial (0°C +70°C)
PACKAGE TYPE 44-Pin Plastic Leaded Chip Carrier 044) 44-Pin Thin Quad Flat Pack (PQT044) SPEED
Valid Combinations MACH111SP-5 MACH111SP-7 MACH111SP-10 MACH111SP-12 MACH111SP-15
Valid Combinations Valid Combinations table lists configurations planned supported volume this device. Consult local sales office confirm availability specific valid combinations check newly released combinations.
MACH111SP-5/7/10/12/15 (Com'l)
ORDERING INFORMATION Industrial Products
programmable logic products industrial applications available with several ordering options. order number (Valid Combination) formed combination
MACH
FAMILY TYPE MACH Macro Array CMOS High-Speed
OPTIONAL PROCESSING Blank Standard Processing
DEVICE NUMBER Macrocells, Pins, Power-Down mode, Bus-Friendly Inputs I/Os PRODUCT DESIGNATION In-system Programmable
OPERATING CONDITIONS Industrial (-40°C +85°C)
PACKAGE TYPE 44-Pin Plastic Leaded Chip Carrier 044)
SPEED
Valid Combinations MACH111SP-7 MACH111SP-10 MACH111SP-12 MACH111SP-14 MACH111SP-18
Valid Combinations Valid Combinations table lists configurations planned supported volume this device. Consult local sales office confirm availability specific valid combinations check newly released combinations.
MACH111SP-7/10/12/14/18 (Ind)
FUNCTIONAL DESCRIPTION
MACH111SP consists blocks connected switch matrix. There pins feeding switch matrix. These signals distributed blocks efficient design implementation. There clock pins that also used dedicated inputs.
Table
Output Macrocell
Logic Allocation
Available Clusters C10, C10, C11, C11, C12, C12, C13, C13, C14, C14,
Blocks
Each block MACH111SP (Figure contains 64-product-term logic array, logic allocator, macrocells, cells. switch matrix feeds each block with inputs. This makes block look effectively like independent "PAL26V16." There four additional output enable product terms each block. purposes output enable, cells divided into banks macrocells. Each bank allocated output enable product terms. asynchronous reset product term asynchronous preset product term provided flip-flop initialization. flip-flops within block initialized together.
Switch Matrix
MACH111SP switch matrix inputs feedback signals from blocks. Each block provides internal feedback signals feedback signals. switch matrix distributes these signals back blocks efficient manner that also provides high performance. design software automatically configures switch matrix when fitting design into device.
Macrocell
MACH111SP macrocells configured either registered combinatorial, with programmable polarity. macrocell provides internal feedback whether configured registered combinatorial. flip-flops configured D-type T-type, allowing product-term optimization. flip-flops individually select clock pins, which also available data inputs. registers clocked LOW-to-HIGH transition clock signal. flip-flops also asynchronously initialized with common asynchronous reset preset product terms.
Product-term Array
MACH111SP product-term array consists product terms logic use, special-purpose product terms. Four special-purpose product terms provide programmable output enable; provides asynchronous reset, provides asynchronous preset.
Cell
cell MACH111SP consists three-state output buffer. three-state buffer configured three ways: always enabled, always disabled, controlled product term. product term control chosen, product terms used provide control. product terms that available common cells block. These choices make possible macrocell output, input, bidirectional pin, three-state output driving bus.
Logic Allocator
logic allocator MACH111SP takes logic product terms allocates them macrocells needed. Each macrocell driven product terms. design software automatically configures logic allocator when fitting design into device. Table illustrates which product term clusters available each macrocell within block. Refer Figure cluster macrocell numbers.
MACH111SP-5/7/10/12/15
Power-Down Mode
MACH111SP features programmable low-power mode which individual signal paths programmed power. These low-power speed paths will slightly slower than non-low-power paths. This feature allows speed critical paths maximum frequency while rest paths operate low-power mode, resulting power savings 50%. signals block low-power, then total power reduced further.
MACH111SP devices tristate outputs during programming. They have security which inhibits program verify. This allows user protect proprietary patterns designs. Program verification MACH device involves reading back programmed pattern comparing with original JEDEC file. method program verification performed MACH devices permits verification device time.
In-System Programming
Programming process where MACH devices loaded with pattern defined JEDEC file obtained from MACHXL software third-party software. Programming accomplished through four JTAG pins: Test Mode Select (TMS), Test Clock (TCK), Test Data (TDI), Test Data (TDO). MACH111SP employed JTAG (IEEE 1149.1) compliant chain. MACH111SP fully JTAG compatible. supports IDcode, HiZ, BYPASS instruction, EXTEST SAMPLE/PRELOAD instructions. MACH111SP programmed across commercial temperature range. Programming MACH111SP device after been placed circuit board easily accomplished. Programming initiated placing device into programming mode, using MACHPRO programming software provided AMD. device bulk erased JEDEC file then loaded. After data transferred into device, PROGRAM instruction loaded. Further programming details found application note, "Advanced In-circuit Programming Guidelines."
Accidental Programming Erasure Protection
virtually impossible program erase MACH device inadvertently. following conditions must before programming actually takes place: device must password-protected program mode programming bulk erase instruction must instruction register above conditions met, programming circuitry cannot activated. ensure that year device data retention guarantee applies, program/erase cycle limit should exceeded.
Bus-Friendly Inputs I/Os
MACH111SP inputs I/Os include inverters series which loop back input. This double inversion reinforces state input pulls voltage away from input threshold voltage. illustration this configuration, please turn Input/Output Equivalent Schematics section.
On-Board Programming Options
Since MACHPRO software performs these steps automatically, following programming options published reference. configuration file, which also known chain file, defines MACH device JTAG chain. file contains information concerning which JEDEC file placed into which device, state which outputs should placed, whether security fuses should programmed. configuration file discussed detail MACHPRO software manual.
Compliance
MACH111SP-5/7/10/12/15 fully compliant with Local Specification published Special Interest Group. MACH111SP-5/7/10/12/15's predictable timing ensures compliance with specifications independent design. other hand, CPLD FPGA architectures without predictable timing, compliance dependent upon routing product term distribution.
MACH111SP-5/7/10/12/15
Output Enable Output Enable Asynchronous Reset Asynchronous Preset
Output Macro Cell
Cell
Output Macro Cell
Cell
Output Macro Cell
Cell
Output Macro Cell
Cell
Logic Allocator
Cell
Output Macro Cell
Output Macro Cell
Cell
Cell
Output Macro Cell
Switch Matrix
Cell
Output Macro Cell
Output Macro Cell
Cell
Output Macro Cell
Cell
Output Macro Cell
Cell
Output Macro Cell
Cell
Output Macro Cell
Cell
Cell
Output Macro Cell
Cell Output Macro Cell Cell Output Macro Cell
Output Enable Output Enable
21120A-4
Figure
MACH111SP Block
MACH111SP-5/7/10/12/15
ABSOLUTE MAXIMUM RATINGS
Storage Temperature -65°C +150°C Ambient Temperature with Power Applied. -55°C +125°C Supply Voltage with Respect Ground -0.5 +7.0 Input Voltage .-0.5 Output Voltage .-0.5 Static Discharge Voltage 2001 Latchup Current 70°C)
Stresses above those listed under Absolute Maximum Ratings cause permanent device failure. Functionality above these limits implied. Exposure Absolute Maximum Ratings extended periods affect device reliability. Programming conditions differ.
OPERATING RANGES
Commercial Devices Ambient Temperature (TA) Operating Free Air. .0°C +70°C Supply Voltage (VCC) with Respect Ground +4.75 +5.25
Operating ranges define those limits between which functionality device guaranteed.
CHARACTERISTICS over COMMERCIAL operating ranges unless otherwise specified
Parameter Symbol IOZH IOZL Parameter Description Output HIGH Voltage Output Voltage Input HIGH Voltage Input Voltage Input HIGH Current Input Current Off-State Output Leakage Current HIGH Off-State Output Leakage Current Output Short-Circuit Current Supply Current (Static) Supply Current (Active) Test Conditions -3.2 Min, Min, Guaranteed Input Logical HIGH Voltage Inputs (Note Guaranteed Input Logical Voltage Inputs (Note 5.25 (Note (Note VOUT 5.25 (Note VOUT (Note VOUT (Notes 25°C, (Note 25°C, (Note -160 Unit
Notes: These absolute values with respect device ground overshoots system and/or tester noise included. leakage worst case IOZL IOZH). more than output should shorted time. Duration short-circuit should exceed second. VOUT been chosen avoid test problems caused tester ground degradation. This parameter measured low-power mode with 16-bit up/down counter pattern. This pattern programmed each block capable being loaded, enabled reset. This parameter 100% tested, evaluated initial characterization time design modified where capacitance affected.
MACH111SP-5/7 (Com'l)
CAPACITANCE (Note
Parameter Symbol COUT Parameter Description Input Capacitance Output Capacitance VOUT Test Conditions 25°C Unit
SWITCHING CHARACTERISTICS over COMMERCIAL operating ranges (Note
Parameter Symbol External Feedback fMAX Maximum Frequency (Note 1/(tS tCO) Parameter Description Input, I/O, Feedback Combinatorial Output (Note D-type Setup Time from Input, I/O, Feedback Clock T-type Register Data Hold Time Clock Output (Note Clock Width (Note HIGH D-type T-type D-type Internal Feedback (fCNT) Feedback tARW tARR tAPW tAPR tLPS tLPCO tLPEA Asynchronous Reset Registered Output Asynchronous Reset Width (Note Asynchronous Reset Recovery Time Asynchronous Preset Registered Output Asynchronous Preset Width (Note Asynchronous Preset Recovery Time Input, I/O, Feedback Output Enable (Note Input, I/O, Feedback Output Disable (Note Increase Powered-down Macrocell (Note Increase Powered-down Macrocell (Note Increase Powered-down Macrocell (Note Increase Powered-down Macrocell (Note 1/(tWL tWH) T-type 166.7 Unit
Notes: These parameters 100% tested, evaluated initial characterization time design modified where frequency affected. Switching Test Circuit test conditions. signal powered-down, this parameter must added respective high-speed parameter.
MACH111SP-5/7 (Com'l)
ABSOLUTE MAXIMUM RATINGS
Storage Temperature -65°C +150°C Ambient Temperature with Power Applied. -55°C +125°C Supply Voltage with Respect Ground -0.5 +7.0 Input Voltage .-0.5 Output Voltage .-0.5 Static Discharge Voltage 2001 Latchup Current 70°C)
Stresses above those listed under Absolute Maximum Ratings cause permanent device failure. Functionality above these limits implied. Exposure Absolute Maximum Ratings extended periods affect device reliability. Programming conditions differ.
OPERATING RANGES
Commercial Devices Ambient Temperature (TA) Operating Free Air. .0°C +70°C Supply Voltage (VCC) with Respect Ground +4.75 +5.25
Operating ranges define those limits between which functionality device guaranteed.
CHARACTERISTICS over COMMERCIAL operating ranges unless otherwise specified
Parameter Symbol IOZH IOZL Parameter Description Output HIGH Voltage Output Voltage Input HIGH Voltage Input Voltage Input HIGH Current Input Current Off-State Output Leakage Current HIGH Off-State Output Leakage Current Output Short-Circuit Current Supply Current (Static) Supply Current (Active) Test Conditions -3.2 Min, Min, Guaranteed Input Logical HIGH Voltage Inputs (Note Guaranteed Input Logical Voltage Inputs (Note 5.25 (Note (Note VOUT 5.25 (Note VOUT (Note VOUT (Notes 25°C, (Note 25°C, (Note -160 Unit
Notes: These absolute values with respect device ground overshoots system and/or tester noise included. leakage worst case IOZL IOZH). more than output should shorted time. Duration short-circuit should exceed second. VOUT been chosen avoid test problems caused tester ground degradation. This parameter measured low-power mode with 16-bit up/down counter pattern. This pattern programmed each block capable being loaded, enabled reset. This parameter 100% tested, evaluated initial characterization time design modified where capacitance affected.
MACH111SP-10/12/15 (Com'l)
CAPACITANCE (Note
Parameter Symbol COUT Parameter Description Input Capacitance Output Capacitance -0.5 VOUT Test Conditions 25°C Unit
SWITCHING CHARACTERISTICS over COMMERCIAL operating ranges (Note
Parameter Symbol External Feedback fMAX Maximum Frequency (Note 1/(tS tCO) Parameter Description Input, I/O, Feedback Combinatorial Output (Note Setup Time from Input, I/O, Feedback Clock Register Data Hold Time Clock Output (Note Clock Width (Note HIGH D-type T-type D-type Internal Feedback (fCNT) Feedback tARW tARR tAPW tAPR tLPS tLPCO tLPEA 1/(tWL tWH) T-type 66.7 62.5 76.9 71.4 83.3 47.6 66.6 55.5 83.3 D-type T-type Unit
Asynchronous Reset Registered Output Asynchronous Reset Width (Note Asynchronous Reset Recovery Time Asynchronous Preset Registered Output Asynchronous Preset Width (Note Asynchronous Preset Recovery Time Input, I/O, Feedback Output Enable (Note Input, I/O, Feedback Output Disable (Note Increase Powered-down Macrocell (Note Increase Powered-down Macrocell (Note Increase Powered-down Macrocell (Note Increase Powered-down Macrocell (Note
Notes: These parameters 100% tested, evaluated initial characterization time design modified where frequency affected. Switching Test Circuit test conditions. signal powered-down, this parameter must added respective high-speed parameter.
MACH111SP-10/12/15 (Com'l)
ABSOLUTE MAXIMUM RATINGS
Storage Temperature -65°C +150°C Ambient Temperature with Power Applied. -55°C +125°C Supply Voltage with Respect Ground -0.5 +7.0 Input Voltage .-0.5 Output Voltage .-0.5 Static Discharge Voltage 2001 Latchup Current -40°C +85°C).
Stresses above those listed under Absolute Maximum Ratings cause permanent device failure. Functionality above these limits implied. Exposure Absolute Maximum Ratings extended periods affect device reliability. Programming conditions differ.
OPERATING RANGES
Industrial Devices Temperature (TA) Operating Free Air. .-40°C +85°C Supply Voltage (VCC) with Respect Ground +4.5 +5.5
Operating ranges define those limits between which functionality device guaranteed.
CHARACTERISTICS over INDUSTRIAL operating ranges unless otherwise specified
Parameter Symbol IOZH IOZL Parameter Description Output HIGH Voltage Output Voltage Input HIGH Voltage Input Voltage Input HIGH Leakage Current Input Leakage Current Off-State Output Leakage Current HIGH Off-State Output Leakage Current Output Short-Circuit Current Supply Current (Static) Supply Current (Active) Test Conditions -3.2 Min, Min, Guaranteed Input Logical HIGH Voltage Inputs (Note Guaranteed Input Logical Voltage Inputs (Note 5.25 (Note (Note VOUT 5.25 (Note VOUT (Note VOUT (Notes 25°C, (Note 25°C, (Note -160 Unit
Notes: These absolute values with respect device ground overshoots system and/or tester noise included. leakage worst case IOZL IOZH). more than output should shorted time. Duration short-circuit should exceed second. VOUT been chosen avoid test problems caused tester ground degradation. This parameter measured low-power mode with 16-bit up/down counter pattern. This pattern programmed each block capable being loaded, enabled reset. This parameter 100% tested, evaluated initial characterization time design modified where capacitance affected.
MACH111SP-7/10 (Ind)
CAPACITANCE (Note
Parameter Symbol COUT Parameter Description Input Capacitance Output Capacitance VOUT Test Conditions 25°C Unit
SWITCHING CHARACTERISTICS over INDUSTRIAL operating ranges (Note
Parameter Symbol External Feedback fMAX Maximum Frequency (Note 1/(tS tCO) Parameter Description Input, I/O, Feedback Combinatorial Output (Note D-type Setup Time from Input, I/O, Feedback Clock T-type Register Data Hold Time Clock Output (Note Clock Width (Note HIGH D-type T-type D-type Internal Feedback (fCNT) Feedback tARW tARR tAPW tAPR tLPS tLPCO tLPEA 1/(tWL tWH) T-type 166.7 Unit
Asynchronous Reset Registered Output Asynchronous Reset Width (Note Asynchronous Reset Recovery Time Asynchronous Preset Registered Output Asynchronous Preset Width (Note Asynchronous Preset Recovery Time Input, I/O, Feedback Output Enable (Note Input, I/O, Feedback Output Disable (Note Increase Powered-down Macrocell (Note Increase Powered-down Macrocell (Note Increase Powered-down Macrocell (Note Increase Powered-down Macrocell (Note
Notes: These parameters 100% tested, evaluated initial characterization time design modified where capacitance affected. Switching Test Circuit test conditions. signal powered-down, this parameter must added respective high-speed parameter.
MACH111SP-7/10 (Ind)
ABSOLUTE MAXIMUM RATINGS
Storage Temperature -65°C +150°C Ambient Temperature with Power Applied. -55°C +125°C Supply Voltage with Respect Ground -0.5 +7.0 Input Voltage .-0.5 Output Voltage .-0.5 Static Discharge Voltage 2001 Latchup Current -40°C 85°C)
Stresses above those listed under Absolute Maximum Ratings cause permanent device failure. Functionality above these limits implied. Exposure Absolute Maximum Ratings extended periods affect device reliability. Programming conditions differ.
OPERATING RANGES
Industrial Devices Ambient Temperature (TA) Operating Free Air. .-40°C +85°C Supply Voltage (VCC) with Respect Ground +4.5 +5.5
Operating ranges define those limits between which functionality device guaranteed.
CHARACTERISTICS over INDUSTRIAL operating ranges unless otherwise specified
Parameter Symbol IOZH IOZL Parameter Description Output HIGH Voltage Output Voltage Input HIGH Voltage Input Voltage Input HIGH Leakage Current Input Leakage Current Off-State Output Leakage Current HIGH Off-State Output Leakage Current Output Short-Circuit Current Supply Current (Static) Supply Current (Active) Test Conditions -3.2 Min, Min, Guaranteed Input Logical HIGH Voltage Inputs (Note Guaranteed Input Logical Voltage Inputs (Note 5.25 (Note (Note VOUT 5.25 (Note VOUT (Note VOUT (Notes 25°C, (Note 25°C, (Note -160 Unit
Notes: These absolute values with respect device ground overshoots system and/or tester noise included. leakage worst case IOZL IOZH). more than output should shorted time. Duration short-circuit should exceed second. VOUT been chosen avoid test problems caused tester ground degradation. This parameter measured low-power mode with 16-bit up/down counter pattern. This pattern programmed each block capable being loaded, enabled reset. This parameter 100% tested, evaluated initial characterization time design modified where capacitance affected.
MACH111SP-12/14/18 (Ind)
CAPACITANCE (Note
Parameter Symbol COUT Parameter Description Input Capacitance Output Capacitance VOUT Test Conditions 25°C Unit
SWITCHING CHARACTERISTICS over INDUSTRIAL operating ranges (Note
Parameter Symbol External Feedback fMAX Maximum Frequency (Note 1/(tS tCO) Parameter Description Input, I/O, Feedback Combinatorial Output (Note Setup Time from Input, I/O, Feedback Clock Register Data Hold Time Clock Output (Note Clock Width (Note HIGH D-type T-type D-type Internal Feedback (fCNT) Feedback tARW tARR tAPW tAPR tLPS tLPCO tLPEA 1/(tWL tWH) T-type 66.7 62.5 76.9 71.4 83.3 14.5 14.5 14.5 14.5 19.5 61.5 83.3 19.5 61.5 D-type T-type 14.5 13.5 Unit
Asynchronous Reset Registered Output Asynchronous Reset Width (Note Asynchronous Reset Recovery Time Asynchronous Preset Registered Output Asynchronous Preset Width (Note Asynchronous Preset Recovery Time Input, I/O, Feedback Output Enable (Note Input, I/O, Feedback Output Disable (Note Increase Powered-down Macrocell (Note Increase Powered-down Macrocell (Note Increase Powered-down Macrocell (Note Increase Powered-down Macrocell (Note
Notes: These parameters 100% tested, evaluated initial characterization time design modified where capacitance affected. Switching Test Circuit test conditions. signal powered-down, this parameter must added respective high-speed parameter.
MACH111SP-12/14/18 (Ind)
TYPICAL CURRENT VOLTAGE (I-V) CHARACTERISTICS
25°C
(mA) -1.0 -0.8 -0.6 -0.4 -0.2 Output,
21120A-5
(mA) -100 -125 -150 Output, HIGH
21120A-6
(mA) -100 Input
21120A-7
MACH111SP-5/7/10/12/15
TYPICAL CHARACTERISTICS
25°C
High-Speed
(mA)
Low-Power
Frequency (MHz)
21120A-8
selected "typical" pattern 16-bit up/down counter. This pattern programmed each block capable being loaded, enabled, reset. Maximum frequency shown uses internal feedback D-type register.
MACH111SP-5/7/10/12/15
TYPICAL THERMAL CHARACTERISTICS
Measured 25°C ambient. These parameters tested.
Parameter Symbol Parameter Description Thermal impedance, junction case Thermal impedance, junction ambient lfpm Thermal impedance, junction ambient with flow lfpm lfpm lfpm TQFP 11.3 34.7 32.9 32.5 31.3 PLCC 53.2 Unit °C/W °C/W °C/W °C/W °C/W °C/W
Plastic Considerations
data listed plastic reference only recommended calculating junction temperatures. heat-flow paths plastic-encapsulated devices complex, making measurement relative specific location package surface. Tests indicate this measurement reference point directly below die-attach area bottom center package. Furthermore, tests packages performed constant-temperature bath, keeping package surface constant temperature. Therefore, measurements only used similar environment. TQFP thermal measurements taken with components six-layer printed circuit board.
MACH111SP-5/7/10/12/15
SWITCHING WAVEFORMS
Input, I/O, Feedback Combinatorial Output
21120A-9
Combinatorial Output
Input, I/O, Feedback Clock Registered Output
21120A-10
Registered Output
Clock
21120A-11
Clock Width
Notes: Input pulse amplitude Input rise fall times ns-4 typical.
MACH111SP-5/7/10/12/15
SWITCHING WAVEFORMS
tARW Input, I/O, Feedback Registered Output Registered Output tARR Clock Clock Input, I/O, Feedback
tAPW tAPR
21120A-12
21120A-13
Asynchronous Reset
Asynchronous Preset
Input, I/O, Feedback Outputs
21120A-14
Output Disable/Enable
Notes: Input pulse amplitude Input rise fall times ns-4 typical.
MACH111SP-5/7/10/12/15
SWITCHING WAVEFORMS
WAVEFORM INPUTS Must Steady Change from Change from Don't Care, Change Permitted Does Apply OUTPUTS Will Steady Will Changing from Will Changing from Changing, State Unknown Center Line HighImpedance "Off" State
KS000010-PAL
SWITCHING TEST CIRCUIT
Output Test Point
21120A-15
Commercial Specification tPD, Closed Open Closed Open Closed Measured Output Value
Switching several outputs simultaneously should avoided accurate measurement.
MACH111SP-5/7/10/12/15
FMAX PARAMETERS
parameter fMAX maximum clock rate which device guaranteed operate. Because flexibility inherent programmable logic devices offers choice clocked flip-flop designs, fMAX specified three types synchronous designs. first type design state machine with feedback signals sent off-chip. This external feedback could back device inputs, second device multi-chip state machine. slowest path defining period clock-to-output time input setup time external signals tCO). reciprocal, fMAX, maximum frequency with external feedback conjunction with equivalent speed device. This fMAX designated "fMAX external." second type design single-chip state machine with internal feedback only. this case, flip-flop inputs defined device inputs flip-flop outputs. Under these conditions, period limited
internal delay from flip-flop outputs through internal feedback logic flip-flop inputs. This fMAX designated "fMAX internal". simple internal counter good example this type design; therefore, this parameter sometimes called "fCNT." third type design simple data path application. this case, input data presented flip-flop clocked through; feedback employed. Under these conditions, period limited data setup time data hold time tH). However, lower limit period each fMAX type minimum clock period (tWH tWL). Usually, this minimum clock period determines period third fMAX, designated "fMAX feedback." frequencies except fMAX internal calculated from other measured parameters. fMAX internal measured directly.
(SECOND CHIP) LOGIC REGISTER LOGIC REGISTER
fMAX External; 1/(tS tCO)
fMAX Internal (fCNT)
LOGIC
REGISTER
fMAX Feedback; 1/(tS 1/(tWH tWL)
21120A-16
MACH111SP-5/7/10/12/15
ENDURANCE CHARACTERISTICS
MACH families manufactured using AMD's advanced Electrically Erasable process. This technology uses cell replace fuse link used bipolar parts. result, device erased reprogrammed, feature which allows 100% testing factory.
Endurance Characteristics
Parameter Symbol Parameter Description Pattern Data Retention Time Reprogramming Cycles Years Cycles Operating Temperature Normal Programming Conditions Units Years Test Conditions Storage Temperature
INPUT/OUTPUT EQUIVALENT SCHEMATICS
Protection
Input
Preload Circuitry
Feedback Input
21120A-17
MACH111SP-5/7/10/12/15
POWER-UP RESET
MACH devices have been designed with capability reset during system power-up. Following power-up, flip-flops will reset LOW. output state will depend logic polarity. This feature provides extra flexibility designer especially valuable simplifying state machine initialization. timing diagram parameter table shown below. synchronous operation power-up
Parameter Symbol Parameter Descriptions Power-Up Reset Time Input Feedback Setup Time Switching Characteristics Clock Width
reset wide range ways rise steady state, conditions required insure valid power-up reset. These conditions are: rise must monotonic. Following reset, clock input must driven from HIGH until applicable input feedback setup times met.
Unit
Power Registered Output Clock
21120A-18
Power-Up Reset Waveform
MACH111SP-5/7/10/12/15
DEVELOPMENT SYSTEMS (subject change)
more information products listed below, please consult FusionPLD Catalog.
MANUFACTURER Advanced Micro Devices, Inc. P.O. 3453, 1028 Sunnyvale, 94088-3543 (800) 222-9323 (408) 732-2400 Advanced Micro Devices, Inc. P.O. 3453, 1028 Sunnyvale, 94088-3543 (800) 222-9323 (408) 732-2400 Advanced Micro Devices, Inc. P.O. 3453, 1028 Sunnyvale, 94088-3543 (800) 222-9323 (408) 732-2400 Cadence Design Systems River Oaks Pkwy Jose, 95134 (408) 943-1234 Data Corporation 10525 Willows Road N.E. P.O. 97046 Redmond, 98073-9746 (800) 332-8246 (206) 881-6444 Mentor Graphics Corp. 8005 S.W. Boeckman Wilsonville, 97070-7777 (800) 547-3000 (503) 685-7000 MicroSim Corp. Fairbanks Irvine, 92718 (714) 770-3022 MINC Incorporated 6755 Earl Drive, Suite Colorado Springs, 80918 (800) 755-FPGA (719) 590-1155 SUSIE-CAD 10000 Nevada Highway, Suite Boulder City, 89005 (702) 293-2271 Synopsys Middlefield Mountain View, 94040 (415) 962-5000 Synopsys Logic Modeling 19500 Gibbs P.O. Beaverton, 97075 (503) 690-6900 SOFTWARE DEVELOPMENT SYSTEMS MACHXL® Software MACHPRO Software
MicroSim Design Center/AMD Software
AMD-ABEL Software Synario
PICDesigner Verilog, LeapFrog, RapidSim Simulators Ver. 9604
ABELSoftware SynarioSoftware
PLDSynthesisII, Autologic QuickSim Simulator, Design Architect, Quick Simulator
Design Center Software
PLDesignerTM-XL Software
SUSIESimulator
FPGA Design Compiler (Requires MINC PLDesigner-XL)
SmartModel® Library
MACH111SP-5/7/10/12/15
DEVELOPMENT SYSTEMS (subject change) (continued)
MANUFACTURER Viewlogic Systems, Inc. Boston Post Road West Marlboro, 01752 (800) 442-4660 (508) 480-0881 MANUFACTURER Acugen Software, Inc. 427-3 Amherst St., Suite Nashua, 03063 (603) 891-1995 GmbH Busenstrasse D-8033 Martinsried, Munich, Germany (87) 857-6667 SOFTWARE DEVELOPMENT SYSTEMS
ViewSim Simulator
TEST GENERATION SYSTEM
ATGENTest Generation Software
PLDCheck
Advanced Micro Devices responsible information relating products third parties. inclusion such information representation endorsement these products.
MACH111SP-5/7/10/12/15
APPROVED PROGRAMMERS (subject change)
more information products listed below, please consult FusionPLD Catalog.
MANUFACTURER Advin Systems, Inc. 1050-L East Duane Ave. Sunnyvale, 94086 (408) 243-7000 Microsystems Post Houston, 77055-7237 (800) 225-2102 (713) 688-4600 Data Corporation 10525 Willows Road N.E. P.O. 97046 Redmond, 98073-9746 (800) 332-8246 (206) 881-6444 Hi/Lo Sec. Ming Shoh Taipei, Taiwan 2-764-0215 Tribal Microsystems Hi-Lo Systems 44388 South Grimmer Blvd. Fremont, 94538 (510) 623-8859 Logical Devices Inc./Digelec Military Trail Deerfield Beach, 33442 (800) 331-7766 (305) 428-6868 Grund D-88239 Wangen Germany (49) 7522-9728 Stag House Martinfield, Welwyn Garden City Herfordshire 707-332148 System General 1603A South Main Street Milpitas, 95035 (408) 263-6667 Alley Lane Shing Road, Shin Diau Taipei, Taiwan 2-917-3005 PROGRAMMER CONFIGURATION
Pilot
BP1200
BP1400
BP2100
BP2200
UniSite
Model 2900
Model 3900
AutoSite
ALL-07
FLEX-700
ALLPROTM-88
Sprint
Expert
Multisite
Stag Quazar Stag Eclipse
Turpro-1
Turpro-1/FX
Turpro-1/TX
MACH111SP-5/7/10/12/15
APPROVED ON-BOARD PROGRAMMERS
MANUFACTURER Corelis, Inc. 12607 Hidden Creek Way, Suite Cerritos, California 70703 (310) 926-6727 Advanced Micro Devices P.O. 3453, MS-1028 Sunnyvale, 94088-3453 (800) 222-9323 PROGRAMMER CONFIGURATION
JTAG PROG
MACHpro
PROGRAMMER SOCKET ADAPTERS (subject change)
MANUFACTURER California Integration Technologies Main Street Placerville, 95667 (916) 626-6168 Emulation Technology 2344 Walsh Ave., Bldg. Santa Clara, 95051 (408) 982-0660 PART NUMBER
Contact Manufacturer
Contact Manufacturer
MACH111SP-5/7/10/12/15
PHYSICAL DIMENSIONS* 44-Pin Plastic Leaded Chip Carrier (measured inches)
.685 .695
.650 .656
.042 .056
.062 .083
I.D. .685 .695 .650 .656 .500 .590 .630
.013 .021
.026 .032
.050
.009 .015
.090 .120 .165 .180
SEATING PLANE
VIEW
SIDE VIEW
16-038-SQ DA78 6-28-94
reference only. ANSI standard Basic Space Centering.
MACH111SP-5/7/10/12/15
PHYSICAL DIMENSIONS PQT044 44-Pin Thin Quad Flat Pack (measured millimeters)
11.80 12.20 9.80 10.20
9.80 10.20 11.80 12.20
0.95 1.05 1.20
16-038-PQT-2 7-11-95
1.00 REF.
0.30 0.45
0.80
Trademarks Copyright 1996 Advanced Micro Devices, Inc. rights reserved. AMD, logo combinations thereof, Bus-Friendly trademarks Advanced Micro Devices, Inc. MACH registered trademarks Advanced Micro Devices, Inc. Product names used this publication identification purposes only trademarks their respective companies.
MACH111SP-5/7/10/12/15
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