HN58V1001 Series 131072-word 8-bit Electrically Erasable Programm

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HN58V1001 Series 131072-word 8-bit Electrically Erasable Programm

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ADE-203-314E
HN58V1001 Series
131072-word 8-bit Electrically Erasable Programmable CMOS
Rev. May. 1995
Hitachi HN58V1001 electrically erasable programmable EEPROM organized 131072-word 8-bit. realizes high speed, power consumption, high level reliability, employing advanced MNOS memory technology CMOS process circuitry technology. also 128-byte page programming function make erase write operations faster.
Ordering Information
Type HN58V1001P-25 Access time Package 32-pin plastic DIP(DP-32) 32-pin plastic (FP-32D) 32-pin plastic TSOP (TFP-32DA)
HN58V1001FP-25 HN58V1001T-25
Features
Single supply On-chip latches: address, data, Automatic byte write: Automatic page write (128 bytes): Fast access time: power dissipation: mW/MHz, (active) (standby) Data polling RDY/Busy Data protection circuit power on/off Conforms JEDEC byte-wide standard Reliable CMOS with MNOS cell technology 104erase/write cycles page mode) years data retention Software data protection Write protection
HN58V1001 Series
Arrangement
HN58V1001P/FP Series RDY/Busy I/O0 I/O1 I/O2 (Top View) HN58V1001T Series
I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 RDY/Busy
I/O7 I/O6 I/O5 I/O4 I/O3
(Top View)
Description
name A0-A16 I/O0-I/O7 Function Address inputs Data input/output Output enable Chip enable name RDY/Busy Function Write enable Power Ground Ready busy Reset
HN58V1001 Series
Block Diagram
I/O0 High Voltage Generator
I/O7
RDY/Busy
Buffer Input Latch Control Logic Timing
Decoder
Gating
Address Buffer Latch Decoder Memory Array
Data Latch
Mode Selection
Mode Read Standby Write Deselect Write Inhibit Data Polling Program reset Note: Don't care RDY/Busy High-Z High-Z High-Z High-Z High-Z Dout High-Z High-Z Data (I/O7) High-Z
HN58V1001 Series
Absolute Maximum Ratings
Parameter Supply voltage Input voltage
Symbol Topr Tstg
Value -0.6 +7.0 -0.5*2 +7.0
Unit
Operating temperature range Storage temperature range
+125
Notes: With respect -3.0 pulse width Including electrical characteristics data retention.
Recommended Operating Conditions
Parameter Supply voltage Input voltage Symbol Operating temperature Topr -0.3 Unit
Characteristics (Ta=0 +70°C,VCC
Parameter Input leakage current Symbol ICC1 ICC2 current (active) ICC3 Input voltage Input high voltage Output voltage Output high voltage Note: -0.3*2 1.9*3 VCC-0.5 Unit Test conditions -400 Vout 3.6/0.4 Iout Duty 100%, Cycle Iout Duty 100%, Cycle
Output leakage current current (standby)
-1.0 pulse width
HN58V1001 Series
Capacitance 25°C, MHz)
Parameter Input capacitance*1 capacitance*1 Symbol Cout Unit Test condition Vout
Output Note:
This parameter periodically sampled 100% tested.
Characteristics +70°C,
Test Conditions Input pulse levels (RES pin) Input rise fall time Output load 1TTL Gate +100 Reference levels measuring timing Read Cycle
Parameter Address output delay output delay output delay Address output hold (CE) high output output output delay Note: float*1 float*1 Symbol tACC tDFR Unit Test conditions VIL, VIL, VIL, VIL, VIL, VIL, VIL,
tDFR defined time which outputs achieve open circuit conditions longer driven.
HN58V1001 Series
Read Timing Waveform
Address High
Data
Data Valid
HN58V1001 Series
Write Cycle
Parameter Address setup time Address hold time write setup time controlled) hold time controlled) write setup time controlled) hold time controlled) write setup time hold time Data setup time Data hold time pulse width controlled) pulse width controlled) Data latch time Byte load cycle Byte load window Write cycle time Time device busy Write start time Reset protect time Reset time Note: Symbol tOES tOEH tBLC tRES Min*1 250*3 15*2 Unit Test conditions
this device longer cycle than this value. must longer than this value unless polling techniques RDY/Busy used. This device automatically completes internal write operation within this value. Next read write operation initiated after polling techniques RDY/Busy used.Read Timing Waveform (2)*3
HN58V1001 Series
Byte Write TimingWaveform(1) Controlled)
Address RDY/Busy High-Z High-Z
tRES
HN58V1001 Series
Byte Write TimingWaveform(2) Controlled)
Address High-Z High-Z
RDY/Busy
HN58V1001 Series
Page Write Timing Waveform Controlled)
Address
RDY/Busy High-Z High-Z
Note:1.A7 page addresses must same within page write operation.
HN58V1001 Series
Page Write Timing Waveform Controlled)
Address
RDY/Busy High-Z High-Z
Note:1.A7 page addresses must same within page write operation.
HN58V1001 Series
Data Polling Timing Waveform
Address
I/O7 Dout Dout
Toggle This device provide another function determine internal programming cycle. EEPROM read mode during internal programming Toggle Waveform
cycle, I/O6 will charge from (toggling) each read. When internal programming cycle finished, toggling I/O6 will stop device accessible next read program.
Next mode
Address
I/O6
Dout
Dout
Dout
Dout
Note: I/O6 begining state I/O6 ending state will vary
HN58V1001 Series
Software Data Protection Timing Waveform protection mode)
tBLC Address Data 5555 AAAA 2AAA 5555 Write Address Write Data
Software Data Protection Timing Waveform non-protection mode)
Normal active mode
Address Data
5555
AAAA 5555 2AAA
5555
AAAA 5555 2AAA
HN58V1001 Series
Functional Description
Automatic Page Write Page-mode write feature allows bytes data written into EEPROM single write cycle. Following initial byte cycle, additional bytes written same manner. Each additional byte load cycle must started within from preceding falling edge When kept high after data input, EEPROM enters write mode automatically input data written into EEPROM. Data Polling polling allows status EEPROM determined. EEPROM read mode during write cycle, inversion last byte data loaded outputs from I/O7 indicate that EEPROM performing write operartion.
Data
Operation During write cycle, addresses latched falling edge data latched rising edge Write/Erase Endurance Data Retention Time endurance cycles case page programming cycles case byte programming cumulative failure rate). data retention time more than years when device page-programmed less than cycles. Data Protection Data Protection against Noise Control Pins (CE, during Operation During readout standby, noise control pins trigger turn EEPROM programming mode mistake. prevent this phenomenon, this device noise cancelation function that cuts noise width less programming mode. careful allow noise width more than control pins.
RDY/Busy Signal RDY/ signal also allows status EEPROM determined. RDY/Busy signal high impedance except write cycle lowered after first write signal. write cycle, RDY/Busy signal changes state high impedance. Signal When low, EEPROMcannot read programmed. Therefore, data protected keeping when switched. should high during read programming because dosen't provide latch function.
Read inhibit
Read inhibit
Program inhibit
Program inhibit
HN58V1001 Series
Data protection on/off When turned off, noise control pins generated external circuits (CPU, etc) turn EEPROM programming mode mistake. prevent this unintentional programming, EEPROM must kept unprogrammable state using reset signal pin. should kept level when turned off. EEPROM breaks programming operation when becomes low, programming operation doesn't finish correctly case that falls during programming operation. should kept high after last data input. Software data protection mode canceled inputting following bytes. After that, this device turns non-protection mode write data normally. when data input canceling cycle, data cannot written.
Address 5555 AAAA 2AAA 5555 5555 AAAA 2AAA 5555
Data
Program inhibit Program inhibit
software data protection enabled shipment.
Software data protection prevent unintentional programming caused noise generated external circuits, This device software data protection function. software data protection mode, bytes data must input before write data follows. these bytes switch non-protection mode protection mode.
Address Data
5555 AAAA 2AAA 5555 Write address Write data Normal data input
HN58V1001 Series
Package Dimensions
HN58V1001P Series (DP-32) Unit
41.9 42.5
13.4 13.7
5.08
15.24
0.51 2.54
2.54 0.25
0.48 0.10
0.25 0.05
0.11
HN58V1001FP Series (FP-32D)
Unit
20.45 20.95 11.7
14.14 0.30
0.13 0.07
1.42
0.22
1.27
0.10 0.40 0.05
0.10 0.15
0.05
0-8°
HN58V1001 Series
Package Dimensions (cont)
HN58V1001T Series (TFP-32DA) Unit
0.50
0.20 0.10
0.08 0.17 0.05 0-5° 0.08 0.18
0.45
0.10
12.4
14.0
HN58V1001R Series (TFP-32DAR)
Unit
0.50
0.20 0.10
0.08 14.0
0.45
12.40
0.17 0.05
1.20
0.10
0.08 0.18
0-5°
0.50 0.10

HN58V1001 Series 131072-word 8-bit Electrically Erasable Programm

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