High Speed Standard Supply Voltage Dual Channels High Common-Mode Reje
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SN55107A, SN75107A, SN75107B, SN75108A DUAL LINE RECEIVERS
High Speed Standard Supply Voltage Dual Channels High Common-Mode Rejection Ratio High Input Impedance High Input Sensitivity Differential Common-Mode Input Voltage Range Strobe Inputs Receiver Selection Gate Inputs Logic Versatility Drive Capability High Noise Margin Totem-Pole Outputs Version Diode-Protected Input Power-Off Condition
SN55107A PACKAGE SN75107A, SN75107B, SN75108A PACKAGE (TOP VIEW)
SN55107A PACKAGE (TOP VIEW)
description
These circuits TTL-compatible, high-speed line receivers. Each monolithic dual circuit featuring independent channels. They designed general use, well such specific applications data comparators balanced, unbalanced, party-line transmission systems. These devices unilaterally interchangeable with replacements SN55107, SN75107, SN75108, offer diode-clamped strobe inputs simplify circuit design.
internal connection Input Version
Copyright 1998, Texas Instruments Incorporated
essential difference between versions seen schematics. Input-protection diodes series with collectors differential-input transistors versions. These diodes useful certain party-line systems that have multiple power supplies operated with some supplies turned off. such system, supply turned allowed ground, equivalent input circuit connected that supply would follows:
Input
Version
This would problem specific systems that might have transmission lines biased some potential greater than SN55107A characterized operation over full military temperature range 55°C 125°C. SN75107A, SN75107B, SN75108A characterized operation from 70°C.
Please aware that important notice concerning availability, standard warranty, critical applications Texas Instruments semiconductor products disclaimers thereto appears this data sheet.
PRODUCTION DATA information current publication date. Products conform specifications terms Texas Instruments standard warranty. Production processing does necessarily include testing parameters.
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FUNCTION TABLE DIFFERENTIAL INPUTS STROBES high level, level, irrelevant OUTPUT Indeterminate
logic symbol
SN55107A, SN75107A, SN75107B SN75108A
These symbols accordance with ANSI/IEEE 91-1984 Publication 617-12. numbers shown packages.
logic diagram (positive logic)
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schematic (each receiver)
Note Note
Output
Inputs
Strobe
4.25 Common Both Receivers
Strobe
Other Receiver numbers shown packages. '107A SN75107B, SN75108A. NOTES: Resistor values shown nominal. Components shown with dashed lines output circuitry applicable '107A SN75107B only. Diodes series with collectors differential input transistors short circuited '107A SN75108A.
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absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage, (see Note Supply voltage, Differential input voltage, (see Note Common-mode input voltage, (see Note Strobe input voltage Continuous total dissipation Dissipation Rating Table Storage temperature range, Tstg 65°C 150°C Case temperature seconds, package 260°C Lead temperature (1/16 inch) from case seconds: package 300°C Lead temperature (1/16 inch) from case seconds: package 260°C
Stresses beyond those listed under "absolute maximum ratings" cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those indicated under "recommended operating conditions" implied. Exposure absolute-maximum-rated conditions extended periods affect device reliability. NOTES: voltage values, except differential voltages, with respect network ground terminal. Differential voltage values noninverting terminal with respect inverting terminal. Common-mode input voltage average voltages inputs. DISSIPATION RATING TABLE PACKAGE 25°C POWER RATING 1375 1375 1150 1000 DERATING FACTOR ABOVE 25°C mW/°C 11.0 mW/°C 11.0 mW/°C mW/°C mW/°C 70°C POWER RATING 125°C POWER RATING
recommended operating conditions (see Note
SN55107A Supply voltage, Supply voltage, High-level input voltage between differential inputs, VIDH (see Note Low-level input voltage between differential inputs, VIDL (see Note Common-mode input voltage, (see Notes Input voltage, differential input (see Note High-level input voltage strobe inputs, VIH(S) Low-level input voltage strobe inputs, VIL(S) Low-level output current, 0.025 0.025 SN75107A, SN75107B, SN75108A 4.75 4.75 0.025 5.25 5.25 0.025 UNIT
Operating free-air temperature, algebraic convention, which less positive (more negative) limit designated minimum, used this data sheet input voltage levels only. NOTES: When using only channel line receiver, strobe input unused channel should grounded least differential inputs unused receiver should terminated some voltage between recommended combinations input voltages fall within shaded area Figure common-mode voltage provided that more positive inputs more negative than
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RECOMMENDED COMBINATIONS INPUT VOLTAGES Input Voltage
Input Voltage NOTE Recommended input-voltage combinations shaded area.
Figure Recommended Combinations Input Voltages
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electrical characteristics over recommended free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN, VIDH MIN, VIDL High-level input current into Low-level input current into High-level High level input current into Low-level input current into High-level output current Short-circuit output Supply current from outputs high Supply current from outputs high VIL(S) VIH(S) '107A, SN75107B SN75108A UNIT
High-level High level output voltage
Low-level level output voltage
ICCH ICCH
High level input current High-level Low-level input current
MAX, VIH(G) MAX, VIH(G) MAX, VIL(G)
MAX, VIH(S) MAX, VIH(S) MAX, VIL(S)= MIN, MAX, MAX, 25°C 25°C
conditions shown MAX, appropriate value specified under recommended operating conditions. typical values 25°C. more than output should shorted time.
switching characteristics, 25°C, (see Figure
PARAMETER tPLH(D) tPHL(D) tPLH(S) tPHL(S) Propagation delay time, low- high-level output, from differential inputs Propagation delay time, high- low-level output, from differential inputs Propagation delay time, low- high-level output, from strobe input Propagation delay time, high- low-level output, from strobe input TEST CONDITIONS '107A, SN75107B SN75108A UNIT
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PARAMETER MEASUREMENT INFORMATION
Differential Input Pulse Generator (see Note (see Note Output `107A, SN75107B
VCC+
(see Note
Output SN75108A, (see Note
Strobe Input (see Note
Pulse Generator (see Note TEST CIRCUIT
Input
Strobe Input PLH(D) PHL(D) PLH(S)
PHL(S)
Output
VOLTAGE WAVEFORMS NOTES: pulse generators have following characteristics: tpd1 MHz, tpd2 kHz. Strobe input pulse applied Strobe when inputs 1A-1B being tested, Strobe when inputs 1A-1B 2A-2B being tested, Strobe when inputs 2A-2B being tested. includes probe capacitance. diodes 1N916.
Figure Test Circuit Voltage Waveforms
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TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE DIFFERENTIAL INPUT VOLTAGE SN75108A Output Voltage Inverting Inputs Noninverting Inputs High-Level Input Current HIGH-LEVEL INPUT CURRENT FREE-AIR TEMPERATURE
'107A, SN75107B
Propagation Delay Time
Supply Current
Differential Input Voltage
Free-Air Temperature
Figure
Figure
PROPAGATION DELAY TIME (DIFFERENTIAL INPUTS) FREE-AIR TEMPERATURE tPHL(D) tPLH(D)
SUPPPLY CURRENT (OUTPUTS HIGH) FREE-AIR TEMPERATURE
Free-Air Temperature
Free-Air Temperature
Figure
Values below above 70°C apply SN55107A only.
Figure
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TYPICAL CHARACTERISTICS
PROPAGATION DELAY TIME (LOW-TO-HIGH LEVEL) (DIFFERENTIAL INPUTS) FREE-AIR TEMPERATURE 3900 PROPAGATION DELAY TIME (LOW-TO-HIGH LEVEL) (DIFFERENTIAL INPUTS) FREE-AIR TEMPERATURE tPLH(D) PLH(D) Propagation Delay Time
tPLH(D) PLH(D) Propagation Delay Time
1950
1950 3900
Free-Air Temperature
Free-Air Temperature
Figure
Figure
SN75108A PROPAGATION DELAY TIME (STROBE INPUTS) FREE-AIR TEMPERATURE tPLH(S) Propagation Delay Time
SN75108A PROPAGATION DELAY TIME (STROBE INPUTS) FREE-AIR TEMPERATURE
Propagation Delay Time
tPLH(S) tPHL(S)
tPHL(S)
Free-Air Temperature
Free-Air Temperature
Figure
Values below above 70°C apply SN55107A only.
Figure
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APPLICATION INFORMATION basic balanced-line transmission system
'107A, SN75107B, SN75108A dual line devices designed specifically high-speed data-transmission systems that utilize balanced terminated transmission lines, such twisted-pair lines. system operates balanced mode, noise induced line also induced other. noise appears common mode receiver input terminals, where rejected. ground connection between line driver receiver part signal circuit; therefore, system performance affected circulating ground currents. unique driver-output circuit allows terminated transmission lines driven normal line impedances. High-speed system operation ensured because line reflections virtually eliminated when terminated lines used. Crosstalk minimized signal amplitudes line impedances. typical data delay system approximately where distance feet separating driver receiver. This delay includes gate delay both driver receiver. Data impressed balanced-line system unbalancing line voltages with driver output current. driven line selected appropriate driver-input logic levels. voltage difference approximately: VDIFF 1/2IO(on) High series line resistance causes degradation signal. However, receivers detect signals normal line resistances, data recovered from lines several thousand feet length. Line-termination resistors (RT) required only extreme ends line. short lines, termination resistors receiver only adequate. signal amplitude then approximately: VDIFF IO(on)
Data Input Inhibit Driver SN55110A, SN75110A, SN75112
Transmission Line Having Characteristic Impedance ZO/2
Strobes Receiver `107A, SN75107B, SN75108A
Figure Typical Differential Data Line
data-bus party-line system
strobe feature receivers inhibit feature drivers allow these dual line devices used data-bus party-line systems. these applications, several drivers receivers share common transmission line. enabled driver transmits data enabled receivers line while other drivers receivers disabled. Data time multiplexed transmission line. device specifications allow widely varying thermal electrical environments various driver receiver locations. data-bus system offers maximum performance minimum cost.
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APPLICATION INFORMATION
Drivers SN55110A, SN75110A, SN75112
Receiver
Receiver Strobes
Receiver Strobes
Strobes
Location Data Input Inhibit Location Driver Location Driver Location Driver Receivers `107A, SN75107B, SN75108A
Figure Typical Differential Party Line
unbalanced single-line systems
These dual line circuits also used unbalanced single-line systems. Although these systems offer same performance balanced systems long lines, they adequate very short lines where environmental noise severe. receiver threshold level established applying reference voltage receiver input terminal. signal from transmission line applied remaining input. reference voltage should optimized that signal swing symmetrical about maximum noise margin. reference voltage should range provided voltage supply voltage divider from available supply voltage. single-ended output from driver used single-line systems. Coaxial shielded line preferred minimum noise crosstalk problems. large signal swings, high output current (typically SN75112 recommended. Drivers paralleled higher current. When using only channel line drivers, other channel should inhibited and/or have outputs grounded.
SN55110A, SN75110A, SN75112
Input Inhibit Output Input Vref
`107A, SN75107B, SN75108A
Output
Strobes
Figure Single-Ended Operation
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APPLICATION INFORMATION SN75108A dot-AND output connections
SN75108A line receiver features open-collector-output circuit that connected dot-AND logic configuration with other similar open-collector outputs. This allows level logic implemented without additional logic delay.
SN75108A
SN75108A Output SN5401/SN7401 Equivalent Dot-AND Connection
Figure Dot-AND Connection
increasing common-mode input voltage range receiver
common-mode voltage range (CMVR) defined range voltage applied simultaneously both input terminals that, exceeded, does allow normal operation receiver. recommended operating CMVR making useful noisiest environments. extremely noisy environments, common-mode voltage easily reach some precautions taken reduce ground power supply noise, well crosstalk problems. When receiver must operate such conditions, input attenuators should used decrease system common-mode noise tolerable level receiver inputs. Differential noise also reduced same ratio. These attenuators were omitted intentionally from receiver input terminals designer select resistors that compatible with particular application environment. Furthermore, attenuators adversely affects input sensitivity, propagation delay time, power dissipation, some cases (depending selected resistor values) input impedance; thereby reducing versatility receiver. ability receiver operate with approximately common-mode voltage inputs been checked using circuit shown Figure Resistors provide voltage-divider network. Dividers with three different values presenting 5-to-1 attenuation were used operate differential inputs approximately common-mode voltage. Careful matching attenuators needed balance overdrive input stage. resistors used shown Table Table
Attenuator Attenuator Attenuator
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APPLICATION INFORMATION increasing common-mode input voltage range receiver (continued)
Table shows some typical switching results obtained under such conditions. Table Typical Propagation Delays Receiver With Attenuator Test Circuit Shown Figure
DEVICE PARAMETERS INPUT ATTENUATOR tPLH '107A SN75107B tPHL tPLH SN75108A tPHL TYPICAL (NS) Attenuator Each Input Receiver
Figure Common-Mode Circuit Testing Input Attenuators With Results Shown Table
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methods terminating transmission line reduce reflections shown Figure first method uses resistors attenuation network line termination. second method uses additional resistors line terminations.
APPLICATION INFORMATION
(see Note Method (see Note Method (see Note
NOTE minimize loading, values should fairly large. Examples possible values shown Table
Figure Termination Techniques party-line operation, method should used shown Figure
Attenuation Network
Figure Party-Line Termination Technique
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APPLICATION INFORMATION furnace control using SN75108A
furnace control circuit Figure example possible SN75108A series areas other than what would normally considered electronic systems. description operation this control follows. When room temperature below desired level, resistance room temperature sensor high channel noninverting input below (less positive than) reference level input differential amplifier. This situation causes output, operating heat-on relay turning heat. channel noninverting input below reference level when bonnet temperature furnace reaches desired level. This causes output, thus operating blower relay. Normally furnace shut down when room temperature reaches desired level channel output goes high, turning heat off. blower remains long bonnet temperature high, even after heat-on relay off. There also safety switch bonnet that shuts down furnace temperature there exceeds desired limits. types temperature-sensing devices bias-resistor values used determined particular operating conditions encountered.
Bonnet Temp. Sensor Bonnet Upper Limit Switch
Room Temp. Sensor
Channel
Room Temp. Setting
Heat-on Relay Return
Blower Control Channel
Blower Relay Return
Figure Furnace Control Using SN75108A
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APPLICATION INFORMATION repeaters long lines
some cases, driven line long that noise level line reaches common-mode limits attenuation becomes large results poor reception. such case, simple application receiver driver repeaters [shown Figure 19(a)] restores signal level allows adequate signal level receiving end. multichannel operation desired, then proper gating each channel must sent through repeater station using another repeater Figure 19(b).
Repeaters Data Driver Receiver Driver Receiver Data
SINGLE-CHANNEL LINE
Data
Driver
Receiver
Driver
Receiver
Data
Clock
Strobe
Receiver
Driver
Receiver
MULTICHANNEL LINE WIDTH WITH STROBE
Figure Receiver-Driver Repeaters
receiver dual differential comparator
There many applications differential comparators, such voltage comparison, threshold detection, controlled Schmitt triggering, pulse-width control. differential comparator, '107A SN75108A connected compare noninverting input terminal with inverting input shown Figure output high low, resulting from input being greater less than reference. strobe inputs allow additional control over circuit that either output, both, inhibited.
Strobe
Reference Strobe Reference Strobe Output
Output
Figure SN75107A Series Receiver Dual Differential Comparator
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APPLICATION INFORMATION window detector
window detector circuit Figure large number applications test equipment determining upper limits, lower limits, both same time, such detecting whether voltage signal exceeded window limits. Illumination upper-limit (lower-limit) indicator shows that input voltage above (below) selected upper (lower) limit. mode selector provided selecting desired test. window detecting, upper-and-lower-limits test position used.
Upper Limit Input From Test Point Lower Limit Upper-Limit Indicator Lower-Limit Indicator Mode Selector MODE SELECTOR LEGEND POSITION CONDITION Test Upper Limit Test Lower Limit Test Upper Lower Limits
Figure Window Detector Using SN75108A
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APPLICATION INFORMATION temperature controller with zero-voltage switching
circuit Figure switches electric-resistive heater providing negative-going pulses gate triac during time interval when line voltage passing through zero. pulse generator 2N5447 four diodes. This portion circuit provides negative-going pulses during short time (approximately when line voltage near zero. These pulses inverting input channel SN75108A. room temperature below desired level, resistance thermistor high noninverting input channel above reference level determined thermostat setting. This provides high-level output from channel This output ANDed with positive-going pulses from output channel which reinverted 2N5449.
10-V Zener
Zener Channel Channel SN75108A Thermostat Setting
2N5447
2N5449
Heater Load
Figure Zero-Voltage Switching Temperature Controller
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PACKAGE OPTION ADDENDUM
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PACKAGING INFORMATION
Orderable Device 5962-9690301Q2A 5962-9690301QCA 5962-9690301QDA JM38510/10401BCA SN55107AJ SN75107AD SN75107ADE4 SN75107ADG4 SN75107ADR SN75107ADRE4 SN75107ADRG4 SN75107AN SN75107ANE4 SN75107ANSR SN75107ANSRE4 SN75107ANSRG4 SN75107BD SN75107BDE4 SN75107BDG4 SN75107BDR SN75107BDRE4 SN75107BDRG4 SN75107BN SN75107BNE4 SN75107BNSR SN75107BNSRE4 SN75107BNSRG4 Status ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE Package Type LCCC CDIP CDIP CDIP SOIC SOIC SOIC SOIC SOIC SOIC PDIP PDIP SOIC SOIC SOIC SOIC SOIC SOIC PDIP PDIP Package Drawing Pins Package Plan Green (RoHS Sb/Br) Green (RoHS Sb/Br) Green (RoHS Sb/Br) Lead/Ball Finish Peak Temp
POST-PLATE Type SNPB SNPB SNPB SNPB NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU Type Type Type Type Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Type Type Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Type Type Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM
2500 Green (RoHS Sb/Br) 2500 Green (RoHS Sb/Br) 2500 Green (RoHS Sb/Br) Pb-Free (RoHS) Pb-Free (RoHS)
2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) Green (RoHS Sb/Br) Green (RoHS Sb/Br) Green (RoHS Sb/Br)
2500 Green (RoHS Sb/Br) 2500 Green (RoHS Sb/Br) 2500 Green (RoHS Sb/Br) Pb-Free (RoHS) Pb-Free (RoHS)
2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br) 2000 Green (RoHS Sb/Br)
Addendum-Page
PACKAGE OPTION ADDENDUM
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Orderable Device SN75108AD SN75108ADE4 SN75108ADG4 SN75108ADR SN75108ADRE4 SN75108ADRG4 SN75108AN SNJ55107AFK SNJ55107AJ SNJ55107AW
Status ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE
Package Type SOIC SOIC SOIC SOIC SOIC SOIC PDIP LCCC CDIP
Package Drawing
Pins Package Plan Green (RoHS Sb/Br) Green (RoHS Sb/Br) Green (RoHS Sb/Br)
Lead/Ball Finish NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU NIPDAU
Peak Temp Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Type
2500 Green (RoHS Sb/Br) 2500 Green (RoHS Sb/Br) 2500 Green (RoHS Sb/Br) Pb-Free (RoHS)
POST-PLATE Type SNPB SNPB Type Type
marketing status values defined follows: ACTIVE: Product device recommended designs. LIFEBUY: announced that device will discontinued, lifetime-buy period effect. NRND: recommended designs. Device production support existing customers, does recommend using this part design. PREVIEW: Device been announced production. Samples available. OBSOLETE: discontinued production device.
Plan planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), Green (RoHS Sb/Br) please check latest availability information additional product content details. TBD: Pb-Free/Green conversion plan been defined. Pb-Free (RoHS): TI's terms "Lead-Free" "Pb-Free" mean semiconductor products that compatible with current RoHS requirements substances, including requirement that lead exceed 0.1% weight homogeneous materials. Where designed soldered high temperatures, Pb-Free products suitable specified lead-free processes. Pb-Free (RoHS Exempt): This component RoHS exemption either lead-based flip-chip solder bumps used between package, lead-based adhesive used between leadframe. component otherwise considered Pb-Free (RoHS compatible) defined above. Green (RoHS Sb/Br): defines "Green" mean Pb-Free (RoHS compatible), free Bromine (Br) Antimony (Sb) based flame retardants exceed 0.1% weight homogeneous material)
MSL, Peak Temp. Moisture Sensitivity Level rating according JEDEC industry standard classifications, peak solder temperature. Important Information Disclaimer:The information provided this page represents TI's knowledge belief date that provided. bases knowledge belief information provided third parties, makes representation warranty accuracy such information. Efforts underway better integrate information from third parties. taken continues take reasonable steps provide representative accurate information have conducted destructive testing chemical analysis incoming materials chemicals. suppliers consider certain information proprietary, thus numbers other limited information available release. event shall TI's liability arising such information exceed total purchase price part(s) issue this document sold Customer annual basis.
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PACKAGE MATERIALS INFORMATION
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TAPE REEL INFORMATION
*All dimensions nominal
Device
Package Package Pins Type Drawing SOIC SOIC SOIC
Reel Reel Diameter Width (mm) (mm) 330.0 330.0 330.0 330.0 330.0 16.4 16.4 16.4 16.4 16.4
(mm)
(mm)
(mm)
(mm) 12.0 12.0
Pin1 (mm) Quadrant 16.0 16.0 16.0 16.0 16.0
SN75107ADR SN75107ANSR SN75107BDR SN75107BNSR SN75108ADR
2500 2000 2500 2000 2500
10.5 10.5
Pack Materials-Page
PACKAGE MATERIALS INFORMATION
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*All dimensions nominal
Device SN75107ADR SN75107ANSR SN75107BDR SN75107BNSR SN75108ADR
Package Type SOIC SOIC SOIC
Package Drawing
Pins
2500 2000 2500 2000 2500
Length (mm) 346.0 346.0 346.0 346.0 346.0
Width (mm) 346.0 346.0 346.0 346.0 346.0
Height (mm) 33.0 33.0 33.0 33.0 33.0
Pack Materials-Page
MECHANICAL DATA
MLCC006B OCTOBER 1996
(S-CQCC-N**)
TERMINAL SHOWN
LEADLESS CERAMIC CHIP CARRIER
TERMINALS
0.342 (8,69) 0.442 (11,23) 0.640 (16,26) 0.739 (18,78) 0.938 (23,83) 1.141 (28,99) 0.358 (9,09) 0.458 (11,63) 0.660 (16,76) 0.761 (19,32) 0.962 (24,43) 1.165 (29,59) 0.307 (7,80) 0.406 (10,31) 0.495 (12,58) 0.495 (12,58) 0.850 (21,6) 1.047 (26,6)
0.358 (9,09) 0.458 (11,63) 0.560 (14,22) 0.560 (14,22) 0.858 (21,8) 1.063 (27,0)
0.080 (2,03) 0.064 (1,63) 0.020 (0,51) 0.010 (0,25)
0.020 (0,51) 0.010 (0,25)
0.055 (1,40) 0.045 (1,14)
0.045 (1,14) 0.035 (0,89)
0.028 (0,71) 0.022 (0,54) 0.050 (1,27)
0.045 (1,14) 0.035 (0,89)
4040140 10/96 NOTES: linear dimensions inches (millimeters). This drawing subject change without notice. This package hermetically sealed with metal lid. terminals gold plated. Falls within JEDEC MS-004
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