MC9S08AC128 8-Bit Microcontroller Data Sheet This document contai
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Document Number: MC9S08AC128 Rev. 9/2008
MC9S08AC128 8-Bit Microcontroller Data Sheet
This document contains information product. Specifications information herein subject change without notice.
8-Bit HCS08 Central Processor Unit (CPU) 40-MHz HCS08 (central processor unit) 20-MHz internal frequency HC08 instruction with added BGND, CALL instructions Memory Management Unit support paged memory. Linear Address Pointer allow direct page data accesses entire memory Development Support Background debugging system Breakpoint capability allow single breakpoint setting during in-circuit debugging (plus more breakpoints on-chip debug module) On-chip in-circuit emulator (ICE) Debug module containing three comparators nine trigger modes. Eight deep FIFO storing change-of-flow addresses event-only data. Supports both force breakpoints. Memory Options 128K FLASH read/program/erase over full operating voltage temperature Random-access memory (RAM) Security circuitry prevent unauthorized access FLASH contents Clock Source Options Clock source options include crystal, resonator, external clock, internally generated clock with precision trimming using module System Protection Optional computer operating properly (COP) reset with option from independent internal clock source clock module support fast cyclic redundancy checks system memory Low-voltage detection with reset interrupt Illegal opcode detection with reset Master reset power-on reset (POR)
MC9S08AC128
917A-03 840B-01 824D-02
Power-Saving Modes Wait plus stops Peripherals 16-channel, 10-bit resolution, conversion time, automatic compare function, temperature sensor, internal bandgap reference channel SCIx serial communications interface modules supporting Protocol J2602 protocols; Full duplex non-return zero (NRZ); Master extended break generation; Slave extended break detection; Wakeup active edge SPIx full master-only serial peripheral interface modules; Full-duplex single-wire bidirectional; Double-buffered transmit receive; Master Slave mode; MSB-first LSB-first shifting Inter-integrated circuit module; kbps with maximum loading; Multi-master operation; Programmable slave address; Interrupt driven byte-by-byte data transfer; supports broadcast mode addressing TPMx 2-channel 6-channel 16-bit timer/pulse-width modulator (TPM) modules: Selectable input capture, output compare, edge-aligned capability each channel. Each timer module configured buffered, centered (CPWM) channels 8-pin keyboard interrupt module Input/Output general-purpose input/output pins Software selectable pullups input port pins Software selectable drive strength slew rate control ports when used outputs Package Options 80-pin low-profile quad flat package (LQFP) 64-pin quad flat package (QFP) 44-pin low-profile quad flat package (LQFP)
This document contains information product. Specifications information herein subject change without notice. Freescale Semiconductor, Inc., 2007-2008. rights reserved.
Preliminary Subject Change
Table Contents
Chapter Device Overview Block Diagram Chapter Pins Connections. Device Assignment Chapter Electrical Characteristics Timing Specifications Introduction Parameter Classification Absolute Maximum Ratings Thermal Characteristics Protection Latch-Up Immunity Characteristics Supply Current Characteristics Characteristics Internal Clock Generation Module Characteristics 3.9.1 Frequency Specifications 3.10 Characteristics 3.10.1 Control Timing 3.10.2 Timer/PWM (TPM) Module Timing. 3.11 Characteristics 3.12 FLASH Specifications 3.13 Performance 3.13.1 Radiated Emissions 3.13.2 Conducted Transient Susceptibility Chapter Ordering Information Mechanical Drawings Ordering Information Orderable Part Numbering System Mechanical Drawings. Chapter Revision History
Related Documentation
MC9S08AC128 Series Reference Manual (MC9S08AC128RM) contains extensive product information including modes operartion, memory, resets interrupts, register definitions, port pins, CPU, peripheral module information. latest version documentation, check website http://www.freescale.com
MC9S08AC128 Series Data Sheet, Rev.
Preliminary Subject Change
Freescale Semiconductor
Chapter Device Overview
MC9S08AC128 member low-cost, high-performance HCS08 Family 8-bit microcontroller units (MCUs). MC9S08AC128 uses enhanced HCS08 core.
Block Diagram
block diagram Figure shows structure MC9S08AC128 Series MCU.
MC9S08AC128 Series Data Sheet, Rev. Freescale Semiconductor
Preliminary Subject Change
Chapter Device Overview
HCS08 CORE
DEBUG MODULE (DBG) PORT
BKGD/MS
CYCLIC REDUNDANCY CHECK MODULE (CRC)
HCS08 SYSTEM CONTROL RESET RESETS INTERRUPTS MODES OPERATION POWER MANAGEMENT VDDAD VSSAD VREFL VREFH USERMEMORY FLASH, (BYTES) (AW128 128K, (AW96 96K, PTJ7 PTJ6 PTJ5 PTJ4 PTJ3 PTJ2 PTJ1 PTJ0 PTH6/MISO2 PTH5/MOSI2 PTH4/SPSCK2 PTH3/TPM2CH5 PTH2/TPM2CH4 PTH1/TPM2CH3 PTH0/TPM2CH2 PTG6/EXTAL PTG5/XTAL PTG4/KBI1P4 PTG3/KBI1P3 PTG2/KBI1P2 PTG1/KBI1P1 PTG0/KBIP0
PTA7 PTA6 PTA5 PTA4 PTA3 PTA2 PTA1 PTA0 PTB7/AD1P7 PTB6/AD1P6 PTB5/AD1P5 PTB4/AD1P4 PTB3/AD1P3 PTB2/AD1P2 PTB1/TPM3CH1/AD1P1 PTB0/TPM3CH0/AD1P0 PTC6 PTC5/RxD2 PTC4 PTC3/TxD2 PTC2/MCLK PTC1/SDA1 PTC0/SCL1 PTD7/KBI1P7/AD1P15 PTD6/TPM1CLK/AD1P14 PTD5/AD1P13 PTD4/TPM2CLK/AD1P12 PTD3/KBI1P6/AD1P11 PTD2/KBI1P5/AD1P10 PTD1/AD1P9 PTD0/AD1P8 PTE7/SPSCK1 PTE6/MOSI1 PTE5/MISO1 PTE4/SS1
INTERNAL CLOCK GENERATOR (ICG) PORT PORT PORT PORT LOW-POWER EXTAL XTAL
RQ/TPMCLK
8-BIT KEYBOARD INTERRUPT MODULE (KBI1)
KBI1P7-KBI1P0
10-BIT ANALOG-TO-DIGITAL CONVERTER (ADC)
AD1P15-AD1P0
MODULE (IIC1)
SERIAL COMMUNICATIONS INTERFACE MODULE (SCI1)
RXD1 TXD1 RXD2 TXD2 SPSCK1 MOSI1
VOLTAGE REGULATOR SERIAL COMMUNICATIONS INTERFACE MODULE (SCI2) PORT
SERIAL PERIPHERAL INTERFACE MODULE (SPI1)
MISO1 SPSCK2 MOSI2 MISO2 TPM1CLK TPMCLK TPM1CH0-TPM1CH5 TPM2CLK TPMCLK PORT TPM2CH0-TPM2CH5 TPMCLK TPM3CH1 TPM3CH0
SERIAL PERIPHERAL INTERFACE MODULE (SPI2) PORT
6-CHANNEL TIMER/PWM MODULE (TPM1)
PTE3/TPM1CH1 PTE2/TPM1CH0 PTE1/RxD1 PTE0/TxD1 PTF7 PTF6 PTF5/TPM2CH1 PTF4/TPM2CH0 PTF3/TPM1CH5 PTF2/TPM1CH4 PTF1/TPM1CH3 PTF0/TPM1CH2
PORT
6-CHANNEL TIMER/PWM MODULE (TPM2) 2-CHANNEL TIMER/PWM MODULE (TPM3)
connected 64-pin 48-pin packages
connected 48-pin package
Figure 1-1. MC9S08AC128 Series Block Diagram
MC9S08AC128 Series Data Sheet, Rev.
Preliminary Subject Change
Freescale Semiconductor
Chapter Pins Connections
This section describes signals that connect package pins. includes pinout diagrams, recommended system connections, detailed discussions signals.
Device Assignment
PTC5/RxD2 PTC3/TxD2 PTC2/MCLK PTH6/MISO2 PTH5/MIOSI2 PTH4/SPCK2 PTC1/SDA1 PTC0/SCL1 (NC) PTG6/EXTAL PTG5/XTAL BKGD/MS VREFL VREFH PTD7/KBI1P7/AD1P15 PTD6/TPM1CLK/AD1P14 PTD5/AD1P13 PTD4/TPM2CLK/AD1P12 PTG4/KBI1P4
Figure shows 80-pin LQFP package assignments MC9S08AC128 Series device.
PTC4 IRQ/TPMCLK RESET PTF0/TPM1CH2 PTF1/TPM1CH3 PTF2/TPM1CH4 PTF3/TPM1CH5 PTF4/TPM2CH0 PTC6 PTF7 PTF5/TPM2CH1 PTF6 PTJ0 PTJ1 PTJ2 PTJ3 PTE0/TxD1 PTE1/RxD1 PTE2/TPM1CH0 PTE3/TPM1CH1
80-Pin LQFP
PTG3/KBI1P3 PTD3/KBI1P6/AD1P11 PTD2/KBI1P5/AD1P10 VSSAD VDDAD PTD1/AD1P9 PTD0/AD1P8 PTB7/AD1P7 PTB6/AD1P6 PTB5/AD1P5 PTB4/AD1P4 PTB3/AD1P3 PTB2/AD1P2 PTB1/TPM3CH1/AD1P1 PTB0/TPM3CH0/AD1P0 PTH3/TPM2CH5 PTH2/TPM2CH4 PTH1/TPM2CH3 PTH0/TPM2CH2 PTA7
Figure 2-1. MC9S08AC128 Series 80-Pin LQFP Package
Freescale Semiconductor
Preliminary Subject Change
PTE4/SS1 PTE5/MISO1 PTE6/MOSI1 PTE7/SPSCK1 PTJ4 PTJ5 PTJ6 PTJ7 PTG0/KBI1P0 PTG1/KBI1P1 PTG2/KBI1P2 PTA0 PTA1 PTA2 PTA3 PTA4 PTA5 PTA6
Note: names bold lost lower count packages.
MC9S08AC128 Series Data Sheet, Rev.
Chapter Pins Connections
Figure shows 64-pin package assignments MC9S08AC128 Series devices.
PTD4/AD1P12/TPM2CLK
PTD7/AD1P15/KBI1P7
PTD6//TPM1CLK
PTD5/AD1P13
PTC2/MCLK
PTC1/SDA1
PTC0/SCL1
PTC3/TxD2
PTC4 IRQ/TPMCLK RESET PTF0/TPM1CH2 PTF1/TPM1CH3 PTF2/TPM1CH4 PTF3/TPM1CH5 PTF4/TPM2CH0 PTC6 PTF7 PTF5/TPM2CH1 PTF6 PTE0/TxD1 PTE1/RxD1 PTE2/TPM1CH0 PTE3/TPM1CH1 PTA4 PTA5 PTG2/KBI1P2 PTE7/SPSCK1 PTG0/KBI1P0 PTG1/KBI1P1 PTE5/MISO1 PTE6/MOSI1 PTE4/SS1 PTA3 PTA0 PTA1 PTA2
PTG4/KBI1P4 PTG3/KBI1P3 PTD3/KBI1P6/AD1P11 PTD2KBI1P5/AD1P10 VSSAD VDDAD PTD1/AD1P9 PTD0/AD1P8 PTB7/AD1P7 PTB6/AD1P6 PTB5/AD1P5 PTB4/AD1P4 PTB3/AD1P3 PTB2/AD1P2 PTB1/TPM3CH1/AD1P1 PTB0/TPM3CH0/AD1P0 PTA7
PTG6/EXTAL
PTC5/RxD2
PTG5/XTAL
BKGD/MS
64-Pin
VREFH
VREFL
Note: names bold lost lower count packages.
Figure 2-2. MC9S08AC128 Series 64-Pin Package
MC9S08AC128 Series Data Sheet, Rev.
Preliminary Subject Change
PTA6
Freescale Semiconductor
Chapter Pins Connections
Figure shows 44-pin LQFP assignments MC9S08AC128 Series device.
PTC2/MCLK PTC1/SDA1 PTC0/SCL1 PTG6/EXTAL PTC5/RxD2 PTC3/TxD2 PTG5/XTAL
BKGD/MS
PTC4 IRQ/TPMCLK RESET PTF0/TPM1CH2 PTF1/TPM1CH3 PTF4/TPM2CH0 PTF5/TPM2CH1 PTE0/TxD1 PTE1/RxD1 PTE2/TPM1CH0 PTE3/TPM1CH1 PTE7/SPSCK1 PTG0/KBI1P0 PTG1/KBI1P1 PTG2/KBI1P2 PTE5/MISO1 PTE6/MOSI1 PTA0 PTE4/SS1
PTG3/KBI1P3 PTD3/KBI1P6/AD1P11 PTD2/KBI1P5/AD1P10 VSSAD VDDAD PTD1/AD1P9 PTD0/AD1P8 PTB3/AD1P3 PTB2/AD1P2 PTB1/TPM3CH1/AD1P1 PTB0/TPM3CH0/AD1P0 PTA1
44-Pin LQFP
Figure 2-3. MC9S08AC128 Series 44-Pin LQFP Package
Table 2-4. Availability Package Pin-Count
Number Lowest <-Port PTC4 RESET PTF0 PTF1 PTF2 PTF3 PTF4 TPM1CH2 TPM1CH3 TPM1CH4 TPM1CH5 TPM2CH0 TPMCLK1 Priority Highest
MC9S08AC128 Series Data Sheet, Rev. Freescale Semiconductor
Preliminary Subject Change
VREFH
VREFL
Chapter Pins Connections
Table 2-4. Availability Package Pin-Count (continued)
Number Lowest <-Port PTC6 PTF7 PTF5 PTF6 PTJ0 PTJ1 PTJ2 PTJ3 PTE0 PTE1 PTE2 PTE3 PTE4 PTE5 PTE6 PTE7 PTJ4 PTJ5 PTJ6 PTJ7 PTG0 PTG1 PTG2 PTA0 PTA1 PTA2 PTA3 PTA4 PTA5 PTA6 PTA7 PTH0 PTH1 PTH2 PTH3 PTB0 PTB1 PTB2 PTB3 TPM2CH2 TPM2CH3 TPM2CH4 TPM2CH5 TPM3CH0 AD1P0 TPM3CH1 AD1P1 AD1P2 AD1P3 KBI1P0 KBI1P1 KBI1P2 TxD1 RxD1 TPM1CH0 TPM1CH1 MISO1 MOSI1 SPSCK1 TPM2CH1 Priority Highest
MC9S08AC128 Series Data Sheet, Rev.
Preliminary Subject Change
Freescale Semiconductor
Chapter Pins Connections
Table 2-4. Availability Package Pin-Count (continued)
Number
Lowest <-Port PTB4 PTB5 PTB6 PTB7 PTD0 PTD1 VDDAD VSSAD PTD2 PTD3 PTG3 PTG4 PTD4 PTD5 PTD6 PTD7 VREFH VREFL BKGD PTG5 PTG6 VDD(NC) PTC0 PTC1 PTH4 PTH5 PTH6 PTC2 PTC3 PTC5
Priority AD1P4 AD1P5 AD1P6 AD1P7 AD1P8 AD1P9
Highest
KBI1P5 KBI1P6 KBI1P3 KBI1P4
AD1P10 AD1P11
TPM2CLK AD1P12 AD1P13 TPM1CLK AD1P14 KBI1P7 AD1P15
XTAL EXTAL
SCL1 SDA1 SPSCK2 MOSI2 MISO2 MCLK TxD2 RxD2
TPMCLK, TPM1CLK, TPM2CLK options configured software; reset, TPM1CLK, TPM2CLK, TPMCLK available TPM1, TPM2, TPM3 respectively.
MC9S08AC128 Series Data Sheet, Rev. Freescale Semiconductor
Preliminary Subject Change
Chapter Pins Connections
MC9S08AC128 Series Data Sheet, Rev.
Preliminary Subject Change
Freescale Semiconductor
Chapter Electrical Characteristics Timing Specifications
Introduction Parameter Classification
This section contains electrical timing specifications.
electrical parameters shown this supplement guaranteed various methods. give customer better understanding following classification used parameters tagged accordingly tables where appropriate: Table 3-1. Parameter Classifications
Those parameters guaranteed during production testing each individual device. Those parameters achieved design characterization measuring statistically relevant sample size across process variations. Those parameters achieved design characterization small sample size from typical devices under typical conditions unless otherwise noted. values shown typical column within this category. Those parameters derived mainly from simulations. NOTE
classification shown column labeled parameter tables where appropriate.
Absolute Maximum Ratings
Absolute maximum ratings stress ratings only, functional operation maxima guaranteed. Stress beyond limits specified Table affect device reliability cause permanent damage device. functional operating conditions, refer remaining tables this section. This device contains circuitry protecting against damage high static voltage electrical fields; however, advised that normal precautions taken avoid application voltages higher than maximum-rated voltages this high-impedance circuit. Reliability operation enhanced unused inputs tied appropriate logic voltage level (for instance, either VDD).
MC9S08AC128 Series Data Sheet, Rev. Freescale Semiconductor
Preliminary Subject Change
Chapter Electrical Characteristics Timing Specifications
Table 3-2. Absolute Maximum Ratings
Rating Supply voltage Input voltage Instantaneous maximum current Single limit (applies port pins)1, Maximum current into Storage temperature
Symbol Tstg
Value -0.3 +150
Unit
Input must current limited value specified. determine value required current-limiting resistor, calculate resistance values positive (VDD) negative (VSS) clamp voltages, then larger resistance values. functional non-supply pins internally clamped VDD. Power supply must maintain regulation within operating range during instantaneous operating maximum current conditions. positive injection current (VIn VDD) greater than IDD, injection current flow could result external power supply going regulation. Ensure external load will shunt current greater than maximum injection current. This will greatest risk when consuming power. Examples are: system clock present, clock rate very which would reduce overall power consumption.
MC9S08AC128 Series Data Sheet, Rev.
Preliminary Subject Change
Freescale Semiconductor
Chapter Electrical Characteristics Timing Specifications
Thermal Characteristics
This section provides information about operating temperature range, power dissipation, package thermal resistance. Power dissipation pins usually small compared power dissipation on-chip logic user-determined rather than being controlled design. order take PI/O into account power calculations, determine difference between actual voltage multiply current each pin. Except cases unusually high current (heavy loads), difference between voltage will very small. Table 3-3. Thermal Characteristics Rating
Operating temperature range (packaged)
Symbol
Value
Unit
Maximum junction temperature Thermal resistance 1,2,3,4 80-pin LQFP 2s2p 64-pin 2s2p 44-pin LQFP 2s2p
°C/W
Junction temperature function size, on-chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient temperature, flow, power dissipation other components board, board thermal resistance. Junction Ambient Natural Convection Single Layer Board, signal layer 2s2p Four Layer Board, signal power layers
average chip-junction temperature (TJ) obtained from: where: Eqn.
Ambient temperature, Package thermal resistance, junction-to-ambient, °C/W Pint PI/O Pint VDD, Watts chip internal power PI/O Power dissipation input output pins user determined
most applications, PI/O Pint neglected. approximate relationship between PI/O neglected) 273°C) Solving equations gives: Eqn.
MC9S08AC128 Series Data Sheet, Rev. Freescale Semiconductor
Preliminary Subject Change
Chapter Electrical Characteristics Timing Specifications
273°C) (PD)2
Eqn.
where constant pertaining particular part. determined from equation measuring equilibrium) known Using this value values obtained solving equations iteratively value
Protection Latch-Up Immunity
Although damage from electrostatic discharge (ESD) much less common these devices than early CMOS circuits, normal handling precautions should used avoid exposure static discharge. Qualification tests performed ensure that these devices withstand exposure reasonable levels static without suffering permanent damage. testing conformity with AEC-Q100 Stress Test Qualification Automotive Grade Integrated Circuits JEDEC Standard Non-Automotive Grade Integrated Circuits. During device qualification stresses were performed Human Body Model (HBM), Machine Model (MM) Charge Device Model (CDM). device defined failure after exposure pulses device longer meets device specification. Complete parametric functional testing performed applicable device specification room temperature followed temperature, unless specified otherwise device specification. Table 3-4. Latch-up Test Conditions Model
Series Resistance Human Body Storage Capacitance Number Pulse Series Resistance Machine Storage Capacitance Number Pulse Minimum input voltage limit Latch-up Maximum input voltage limit
Description
Symbol
Value
1500
Unit
Table 3-5. Latch-Up Protection Characteristics
Rating
Symbol
VHBM VCDM ILAT
2000
Unit
Human Body Model (HBM) Machine Model (MM) Charge Device Model (CDM) Latch-up Current 125°C
Characteristics
This section includes information about power supply requirements, characteristics, power supply current various operating modes.
MC9S08AC128 Series Data Sheet, Rev.
Preliminary Subject Change
Freescale Semiconductor
Chapter Electrical Characteristics Timing Specifications
Table 3-6. Characteristics
Operating Voltage Output high voltage Drive (PTxDSn ILoad ILoad -0.6 ILoad -0.4 ILoad -0.24 Output high voltage High Drive (PTxDSn ILoad ILoad ILoad ILoad -0.4 Output voltage Drive (PTxDSn ILoad ILoad ILoad ILoad 0.24 Output voltage High Drive (PTxDSn ILoad ILoad ILoad ILoad Output high current total ports Output current total ports Input high voltage; digital inputs 2.7v 4.5v 4.5v 5.5v IOLT Vhys
Parameter
Symbol
Typ1 2.56 2.62
Unit
IOHT 0.70xVDD 0.65xVDD 0.06 2.48 2.54 2.64 0.35
Input voltage; digital inputs Input hysteresis; digital inputs Input leakage current; input only pins Internal pullup resistors3 Internal pulldown resistors retention voltage rearm voltage rearm time Low-voltage detection threshold high range falling rising Low-voltage detection threshold range falling rising
|IIn| |IOZ| VRAM VPOR tPOR VLVDH
High Impedance (off-state) leakage current2
Input Capacitance; non-supply pins
VLVDL
MC9S08AC128 Series Data Sheet, Rev. Freescale Semiconductor
Preliminary Subject Change
Chapter Electrical Characteristics Timing Specifications
Table 3-6. Characteristics (continued)
Parameter Symbol 2.48 2.54 Typ1 2.56 2.62 2.64 Unit
Low-voltage warning threshold high range falling VLVWH rising Low-voltage warning threshold range VLVWL falling rising Low-voltage inhibit reset/recover hysteresis Vhys
Typical values based characterization data 25°C unless otherwise stated. Measured with VSS. Measured with Measured with
Average -6.0E-3 -5.0E-3 -4.0E-3 -3.0E-3 -2.0E-3 -1.0E-3 000E+0
VDD-VOH
-40°C 25°C 125°C VSupply-VOH
Figure 3-1. Typical (Low Drive) VDD-VOH
MC9S08AC128 Series Data Sheet, Rev.
Preliminary Subject Change
Freescale Semiconductor
Chapter Electrical Characteristics Timing Specifications
-20.0E-3 -18.0E-3 -16.0E-3 -14.0E-3 -12.0E-3 -10.0E-3 -8.0E-3 -6.0E-3 -4.0E-3 -2.0E-3 000.0E-3
Average
VDD-VOH
-40°C 25°C 125°C VSupply-VOH
Figure 3-2. Typical (High Drive) VDD-VOH
Average -7.0E-3 -6.0E-3 -5.0E-3 -4.0E-3 -3.0E-3 -2.0E-3 -1.0E-3 000E+0 0.00 0.30 0.50 0.80 VDD-VOH VSupply-VOH 1.00 1.30 2.00 -40°C 25°C 125°C
Figure 3-3. Typical (Low Drive) VDD-VOH
Average -30.0E-3 -25.0E-3 -20.0E-3 -15.0E-3 -10.0E-3 -5.0E-3 000.0E+3 0.00 0.30 0.50 0.80 VSupply-VOH 1.00 1.30 2.00 -40°C 25°C 125°C VDD-VOH
Figure 3-4. Typical (High Drive) VDD-VOH
MC9S08AC128 Series Data Sheet, Rev. Freescale Semiconductor
Preliminary Subject Change
Chapter Electrical Characteristics Timing Specifications
Supply Current Characteristics
Table 3-7. Supply Current Characteristics
Parameter supply current measured (CPU clock MHz, fBus MHz) supply current measured (CPU clock MHz, fBus MHz) Stop2 mode supply current S2IDD Stop3 mode supply current S3IDD adder stop2 stop36 S23IDDRTI adder stop3 (LVDE LVDSE S3IDDLVD
Symbol
Typ1 0.750 0.570
0.9503 0.770 5.105 3.70 1803
Unit
Temp (°C) 125°C
RIDD
RIDD
125°C 85°C 125°C 85°C 125°C 85°C 125°C 85°C 125°C 85°C 125°C 85°C 125°C 85°C 125°C 85°C 125°C 85°C 125°C
Adder stop3 oscillator enabled7 (OSCSTEN
S3IDDOSC
Typical values based characterization data 25°C unless otherwise stated. Figure through Figure typical curves across voltage/temperature. modules except active, configured FBE, does include loads port pins Every unit tested this parameter. other values column guaranteed characterization. modules except active, configured FBE, does include loads port pins Every unit tested this parameter. other values column guaranteed characterization. Most customers expected find that auto-wakeup from stop2 stop3 used instead higher current wait mode. Wait mode typical with fBus MHz. Values given under following conditions: range operation (RANGE with 32.768kHz crystal, power mode (HGO clock monitor disabled (LOCD
MC9S08AC128 Series Data Sheet, Rev.
Preliminary Subject Change
Freescale Semiconductor
Chapter Electrical Characteristics Timing Specifications
MHz, off, FEE, 25°C MHz, off, FBE, 25°C
MHz, off, FEE, 25°C MHz, off, FBE, 25°C
MHz, off, FEE, 25°C MHz, off, FBE, 25°C
Note: External clock square wave supplied function generator. mode, external reference frequency
Figure 3-5. Typical Modes,
MC9S08AC128 Series Data Sheet, Rev. Freescale Semiconductor
Preliminary Subject Change
Chapter Electrical Characteristics Timing Specifications
Stop2 Average Measurement -8.0E-3 -7.0E-3 -6.0E-3 -5.0E-3 -4.0E-3 -3.0E-3 -2.0E-3 -1.0E-3 000E+0
-40°C 25°C 55°C 85°C
Figure 3-6. Typical Stop
Stop3 Average Measurement -8.0E-3 -7.0E-3 -6.0E-3 -5.0E-3 -4.0E-3 -3.0E-3 -2.0E-3 -1.0E-3 000E+0
-40°C 25°C 55°C 85°C
Figure 3-7. Typical Stop3
MC9S08AC128 Series Data Sheet, Rev.
Preliminary Subject Change
Freescale Semiconductor
Chapter Electrical Characteristics Timing Specifications
Characteristics
Table 3-8. Volt 10-bit Operating Conditions
Characteristic Conditions Absolute Delta (VDD-VDDAD)2 Symb VDDAD VDDAD VSSAD VREFH VREFL Stop, reset, module IDDAD VADIN CADIN RADIN 10-bit mode fADCK 4MHz fADCK 4MHz 8-bit mode (all valid fADCK) -100 -100 VSSAD VREFL fADCK Typ1 VDDAD VSSAD 0.011 3.266
+100 +100 VDDAD VSSAD VREFH
Unit
Supply voltage
Ground voltage voltage high voltage Supply current Input voltage Input capacitance Input resistance Analog source resistance External
Delta (VSS-VSSAD)2
conversion clock frequency
High speed (ADLPC power (ADLPC
mV/°
Temp Sensor Slope Temp Sensor Voltage
3.638 1.396
VTEMP25
Typical values assume VDDAD Temp 25°C, fADCK 1.0MHz unless otherwise stated. Typical values reference only tested production. potential difference.
MC9S08AC128 Series Data Sheet, Rev. Freescale Semiconductor
Preliminary Subject Change
Chapter Electrical Characteristics Timing Specifications SIMPLIFIED INPUT EQUIVALENT CIRCUIT leakage input protection
ZADIN SIMPLIFIED CHANNEL SELECT CIRCUIT RADIN
ENGINE
VADIN
RADIN INPUT
RADIN
INPUT
RADIN CADIN
INPUT
Figure 3-8. Input Impedance Equivalency Diagram
MC9S08AC128 Series Data Sheet, Rev.
Preliminary Subject Change
Freescale Semiconductor
Chapter Electrical Characteristics Timing Specifications
Table 3-9. Volt 10-bit Characteristics (VREFH VDDAD, VREFL VSSAD)
Characteristic Supply current ADLPC ADLSMP ADCO Supply current ADLPC ADLSMP ADCO Supply current ADLPC ADLSMP ADCO Supply current ADLPC ADLSMP ADCO asynchronous clock source tADACK 1/fADACK Conversion time (Including sample time) Sample time Conditions Symb IDDAD Typ1 Unit
IDDAD
IDDAD
VDDAD
IDDAD
High speed (ADLPC power (ADLPC Short sample (ADLSMP Long sample (ADLSMP Short sample (ADLSMP Long sample (ADLSMP
fADACK
1.25
23.5 ±0.5 ±0.5 ±0.3
±2.5 ±1.0 ±1.0 ±0.5
tADC
ADCK cycles ADCK cycles LSB2
tADS
Total unadjusted error Includes quantization Differential non-linearity
10-bit mode 8-bit mode 10-bit mode 8-bit mode
ETUE
LSB2
Monotonicity no-missing-codes guaranteed Integral non-linearity 10-bit mode 8-bit mode Zero-scale error VADIN VSSA Full-scale error VADIN VDDA Quantization error 10-bit mode 8-bit mode 10-bit mode 8-bit mode 10-bit mode 8-bit mode
±0.5 ±0.3 ±0.5 ±0.5 ±0.5 ±0.5
±1.0 ±0.5 ±1.5 ±0.5 ±1.5 ±0.5 ±0.5 ±0.5
LSB2
LSB2
LSB2
LSB2
MC9S08AC128 Series Data Sheet, Rev. Freescale Semiconductor
Preliminary Subject Change
Chapter Electrical Characteristics Timing Specifications
Table 3-9. Volt 10-bit Characteristics (VREFH VDDAD, VREFL VSSAD)
Characteristic Input leakage error leakage3
Conditions 10-bit mode 8-bit mode
Symb
Typ1 ±0.2 ±0.1
±2.5
Unit LSB2
Typical values assume VDDAD 5.0V, Temp 25C, fADCK=1.0 unless otherwise stated. Typical values reference only tested production. (VREFH VREFL)/2N Based input leakage current. Refer electricals.
Internal Clock Generation Module Characteristics
EXTAL XTAL
Crystal Resonator
Table 3-10. Electrical Specifications (Temperature Range 125°C Ambient)
Characteristic Load capacitors Feedback resistor range (32k kHz) High range MHz) Series resistor range Gain (HGO High Gain (HGO High range Gain (HGO High Gain (HGO
Symbol
Typ1
Unit
Note
Typical values based characterization data 5.0V, 25°C typical recommended value. crystal resonator manufacturer's recommendation.
MC9S08AC128 Series Data Sheet, Rev.
Preliminary Subject Change
Freescale Semiconductor
Chapter Electrical Characteristics Timing Specifications
3.9.1
Frequency Specifications
Table 3-11. Frequency Specifications (VDDA VDDA (min) VDDA (max), Temperature Range 125°C Ambient)
Characteristic Oscillator crystal resonator (REFS (Fundamental mode crystal ceramic resonator) range High range High Gain, (HGO 1,CLKS High Gain, (HGO 1,CLKS Power, (HGO CLKS Power, (HGO CLKS Input clock frequency (CLKS REFS range High range
Symbol
Typ1
Unit
fhi_byp fhi_eng flp_byp flp_eng fhi_eng fExtal fICGIRCLK
182.25
303.75 fExtal (max) fICGDCLKmax( max) fICGDCLKmax
Input clock frequency (CLKS REFS Internal reference frequency (untrimmed) Duty cycle input clock (REFS Output clock ICGOUT frequency CLKS REFS other cases Minimum clock (ICGDCLK) frequency Maximum clock (ICGDCLK) frequency Self-clock mode (ICGOUT) frequency
fICGOUT
fExtal (min) (min) fICGDCLKmin -4*N -2*N
fICGDCLKmin fICGDCLKmax fSelf fSelf_reset fLOR fLOD
CSTL
Self-clock mode reset (ICGOUT) frequency Loss reference frequency range High range Loss frequency Crystal start-up time range High range lock time range High range frequency unlock range frequency lock range fICGOUT ICGOUT period jitter, Long term jitter (averaged over interval) Internal oscillator deviation from trimmed frequency9 (constant temperature) ±10%, -40° 125°C
measured
10.5
CSTH
counts counts fICG
tLockl tLockh nUnlock nLock CJitter
ACCint
±0.5
Typical values based characterization data 5.0V, 25°C unless otherwise stated. Self-clocked mode frequency frequency that generates when open-loop.
MC9S08AC128 Series Data Sheet, Rev. Freescale Semiconductor
Preliminary Subject Change
Chapter Electrical Characteristics Timing Specifications
Loss reference frequency reference frequency detected internally, which transitions into self-clocked mode desired range. Loss frequency frequency detected internally, which transitions into bypassed external mode external reference exists) desired range. This parameter characterized before qualification rather than 100% tested. Proper board layout procedures must followed achieve specifications. This specification applies period time required lock after entering engaged internal external modes. crystal/resonator being used reference, this specification assumes already running. Jitter average deviation from programmed frequency measured over specified interval maximum fICGOUT. Measurements made with device powered filtered supplies clocked stable external clock signal. Noise injected into circuitry VDDA VSSA variation crystal oscillator frequency increase CJitter percentage given interval. Figure
Average Percentage Error
Variable
Figure 3-9. Internal Oscillator Deviation from Trimmed Frequency
MC9S08AC128 Series Data Sheet, Rev.
Preliminary Subject Change
Freescale Semiconductor
Chapter Electrical Characteristics Timing Specifications
3.10
Characteristics
This section describes timing characteristics each peripheral system. detailed information about clocks generated, Chapter "Internal Clock Generator (S08ICGV4)."
3.10.1
Control Timing
Table 3-12. Control Timing
Parameter frequency (tcyc 1/fBus) Real-time interrupt internal oscillator period External reset pulse width2 (tcyc 1/fSelf_reset) Reset drive3 Active background debug mode latch setup time Active background debug mode latch hold time pulse width Asynchronous path2 Synchronous path4 KBIPx pulse width Asynchronous path2 Synchronous path3 Port rise fall time (load pF)5 Slew rate control disabled (PTxSE Slew rate control enabled (PTxSE Symbol fBus tRTI textrst trstdrv tMSSU tMSH tILIH, tIHIL tSelf_reset tcyc tcyc tcyc Typ1 1300 Unit
tILIH, tIHIL
tRise, tFall
Typical values based characterization data 5.0V, 25°C unless otherwise stated. This shortest pulse that guaranteed recognized reset request. Shorter pulses guaranteed override reset requests from internal sources. When reset initiated, internal circuitry drives reset about cycles then samples level reset about cycles later distinguish external reset requests from internal requests. This minimum pulse width that guaranteed pass through synchronization circuitry. Shorter pulses recognized. stop mode, synchronizer bypassed shorter pulses recognized that case. Timing shown with respect levels. Temperature range -40°C 125°C.
textrst RESET
Figure 3-10. Reset Timing
MC9S08AC128 Series Data Sheet, Rev. Freescale Semiconductor
Preliminary Subject Change
Chapter Electrical Characteristics Timing Specifications
BKGD/MS
RESET tMSH tMSSU
Figure 3-11. Active Background Debug Mode Latch Timing
tIHIL IRQ/KBIP7-KBIP4
IRQ/KBIPx tILIH
Figure 3-12. IRQ/KBIPx Timing
3.10.2
Timer/PWM (TPM) Module Timing
Synchronizer circuits determine shortest input pulses that recognized fastest clock that used optional external source timer counter. These synchronizers operate from current rate clock. Table 3-13. Input Timing
Function External clock frequency External clock period External clock high time External clock time Input capture pulse width Symbol fTPMext tTPMext tclkh tclkl tICPW fBus/4 Unit tcyc tcyc tcyc tcyc
MC9S08AC128 Series Data Sheet, Rev.
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Freescale Semiconductor
Chapter Electrical Characteristics Timing Specifications
tTPMext tclkh
TPMxCLK tclkl
Figure 3-13. Timer External Clock
tICPW TPMxCHn
TPMxCHn tICPW
Figure 3-14. Timer Input Capture Pulse
MC9S08AC128 Series Data Sheet, Rev. Freescale Semiconductor
Preliminary Subject Change
Chapter Electrical Characteristics Timing Specifications
3.11
Characteristics
Table 3-14. Electrical Characteristic
Num1 Characteristic2 Operating frequency3 Master Slave Cycle time Master Slave Enable lead time Master Slave Enable time Master Slave Clock (SPSCK) high time Master Slave Clock (SPSCK) time Master Slave Data setup time (inputs) Master Slave Data hold time (inputs) Master Slave Access time, slave4 Disable time, slave5 Data setup time (outputs) Master Slave Data hold time (outputs) Master Slave
Table 3-14 Figure 3-15 through Figure 3-18 describe timing requirements system.
Symbol
Unit
tSCK tSCK
fBus/2048
fBus/2 fBus/4
2048
tcyc tcyc
tLead tLead tLag tLag tSCKH tSCKL tSI(M) tSI(S) tHI(M) tHI(S) tdis
tSCK tSCK tSCK tSCK
tSCK tSCK
Refer Figure 3-15 through Figure 3-18. timing shown with respect VDD, unless noted; load pins. timing assumes slew rate control disabled high drive strength enabled output pins. Maximum baud rate must limited input characteristics. Time data active from high-impedance state. Hold time high-impedance state.
MC9S08AC128 Series Data Sheet, Rev.
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Chapter Electrical Characteristics Timing Specifications (OUTPUT) (CPOL (OUTPUT) (CPOL (OUTPUT) MISO (INPUT) MOSI (OUTPUT) OUT2
NOTES: output mode (MODFEN SSOE LSBF LSBF order LSB, MSB.
Figure 3-15. Master Timing (CPHA
SS(1) (OUTPUT) (CPOL (OUTPUT) (CPOL (OUTPUT) MISO (INPUT) MOSI (OUTPUT) OUT(2) IN(2)
NOTES: output mode (MODFEN SSOE LSBF LSBF order LSB, MSB.
Figure 3-16. Master Timing (CPHA
MC9S08AC128 Series Data Sheet, Rev. Freescale Semiconductor
Preliminary Subject Change
Chapter Electrical Characteristics Timing Specifications (INPUT) (CPOL (INPUT) (CPOL (INPUT) MISO (OUTPUT) SLAVE MOSI (INPUT)
NOTE:
SLAVE NOTE
defined normally character just received
Figure 3-17. Slave Timing (CPHA
(INPUT) (CPOL (INPUT) (CPOL (INPUT) MISO (OUTPUT) NOTE MOSI (INPUT) SLAVE SLAVE
NOTE: defined normally character just received
Figure 3-18. Slave Timing (CPHA
MC9S08AC128 Series Data Sheet, Rev.
Preliminary Subject Change
Freescale Semiconductor
Chapter Electrical Characteristics Timing Specifications
3.12
FLASH Specifications
This section provides details about program/erase times program-erase endurance Flash memory. Program erase operations require special power sources other than normal supply. more detailed information about program/erase operations, Chapter "Memory." Table 3-15. Flash Characteristics
Characteristic Supply voltage program/erase Supply voltage read operation Internal FCLK frequency2 Internal FCLK period (1/FCLK) Byte program time (random location)(2) Byte program time (burst mode)(2) Page erase time3 Mass erase time(2) Program/erase endurance4 -40°C 125°C 25°C Data retention5
Symbol Vprog/erase VRead fFCLK tFcyc tprog tBurst tPage tMass
Typ1
6.67
Unit tFcyc tFcyc tFcyc tFcyc
4000 20,000
10,000 tD_ret
100,000
cycles
years
Typical values based characterization data 25°C unless otherwise stated. frequency this clock controlled software setting. These values hardware state machine controlled. User code does need count cycles. This information supplied calculating approximate time program erase. Typical endurance Flash evaluated this product family 9S12Dx64. additional information Freescale Semiconductor defines typical endurance, please refer Engineering Bulletin EB619/D, Typical Endurance Nonvolatile Memory. Typical data retention values based intrinsic capability technology measured high temperature de-rated 25°C using Arrhenius equation. additional information Freescale Semiconductor defines typical data retention, please refer Engineering Bulletin EB618/D, Typical Data Retention Nonvolatile Memory.
MC9S08AC128 Series Data Sheet, Rev. Freescale Semiconductor
Preliminary Subject Change
Chapter Electrical Characteristics Timing Specifications
3.13
Performance
Electromagnetic compatibility (EMC) performance highly dependant environment which resides. Board design layout, circuit topology choices, location characteristics external components well software operation play significant role performance. system designer should consult Freescale applications notes such AN2321, AN1050, AN1263, AN2764, AN1259 advice guidance specifically targeted optimizing performance.
3.13.1
Radiated Emissions
Microcontroller radiated emissions measured from using TEM/GTEM Cell method accordance with 61967-2 J1752/3 standards. measurement performed with microcontroller installed custom evaluation board while running specialized test software. radiated emissions from microcontroller measured cell package orientations (North East). more detailed information concerning evaluation results, conditions setup, please refer Evaluation Report this device. maximum radiated emissions tested configuration orientations less than equal reported emissions levels. Table 3-16. Radiated Emissions
Parameter Symbol VRE_TEM Conditions +25oC package type LQFP Frequency 0.15 1000 Level Level
fOSC/fBUS 32kHz crystal 20MHz
Level1 (Max)
Unit
Radiated emissions, electric field
Data based qualification test results.
3.13.2
Conducted Transient Susceptibility
Microcontroller transient conducted susceptibility measured accordance with internal Freescale test method. measurement performed with microcontroller installed custom evaluation board running specialized test software designed compliance with test method. conducted susceptibility determined injecting transient susceptibility signal each microcontroller. transient waveform injection methodology based 61000-4-4 (EFT/B). transient voltage required cause performance degradation tested configuration greater than equal reported levels unless otherwise indicated footnotes below table.
MC9S08AC128 Series Data Sheet, Rev.
Preliminary Subject Change
Freescale Semiconductor
Chapter Electrical Characteristics Timing Specifications
Table 3-17.
Parameter Symbol Conditions fOSC/fBUS Result Conducted susceptibility, electrical fast transient/burst (EFT/B) 5.5V +25oC package type LQFP 4MHz crystal 20MHz
Amplitude1 (Min)
Unit
VCS_EFT
Data based qualification test results. tested production.
susceptibility performance classification described Table 3-18. Table 3-18. Susceptibility Performance Classification
Result failure Self-recovering failure Soft failure Performance Criteria performs designed during after exposure. does perform designed during exposure. returns automatically normal operation after exposure removed. does perform designed during exposure. does return normal operation until exposure removed RESET asserted. does perform designed during exposure. does return normal operation until exposure removed power cycled. does perform designed during after exposure. cannot returned proper operation physical damage other permanent performance degradation.
Hard failure
Damage
MC9S08AC128 Series Data Sheet, Rev. Freescale Semiconductor
Preliminary Subject Change
Chapter Electrical Characteristics Timing Specifications
MC9S08AC128 Series Data Sheet, Rev.
Preliminary Subject Change
Freescale Semiconductor
Chapter Ordering Information Mechanical Drawings
Ordering Information
Table 4-1. Device Numbering System
Device Number1 FLASH MC9S08AC128 MC9S08AC96
This section contains ordering numbers MC9S08AC128 Series devices. below example device numbering system.
Memory
Available Packages2 Type LQFP, QFP, 44-LQFP LQFP, QFP, 44-LQFP
128K
Table complete description modules included each device. Table package information.
Orderable Part Numbering System
Status Fully Qualified) Memory FLASH-based) Core Family free indicator Package designator (See Table 4-2) Temperature range -40°C 85°C) -40°C 125°C) Approximate memory size
Mechanical Drawings
Table provides available package types their document numbers. latest package outline/mechanical drawings available MC9S08AC128 Series Product Summary pages http://www.freescale.com. view latest drawing, either: Click appropriate link Table 4-2, Open browser Freescale® website (http://www.freescale.com), enter appropriate document number (from Table 4-2) "Enter Keyword" search page. Table 4-2. Package Information
Count Type LQFP LQFP Designator Document 98ASS23237W 98ASB42844B 98ASS23225W
MC9S08AC128 Series Data Sheet, Rev. Freescale Semiconductor
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MC9S08AC128 Series Data Sheet, Rev.
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Freescale Semiconductor
Chapter Revision History
provide most up-to-date information, version documents World Wide will most current. Your printed copy earlier revision. verify have latest information available, refer
http://freescale.com/ following revision history table summarizes changes contained this document.
Revision Number
Revision Date
Description Changes Initial release separate data sheet reference manual. Removed PTH7, clarified full master-only, added missing RoHS logo, updated back cover addresses, incorporated general release edits updates. Added some finalized electrical characteristics.
9/2008
MC9S08AC128 Series Data Sheet, Rev. Freescale Semiconductor
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Chapter Revision History
MC9S08AC128 Series Data Sheet, Rev.
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Reach
Home Page: www.freescale.com E-mail: support@freescale.com USA/Europe Locations Listed: Freescale Semiconductor Technical Information Center, CH370 1300 Alma School Road Chandler, Arizona 85224 +1-800-521-6274 +1-480-768-2130 support@freescale.com Europe, Middle East, Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 81829 Muenchen, Germany 1296 (English) 52200080 (English) 92103 (German) (French) support@freescale.com Japan: Freescale Semiconductor Japan Ltd. Headquarters ARCO Tower 1-8-1, Shimo-Meguro, Meguro-ku, Tokyo 153-0064 Japan 0120 191014 5437 9125 support.japan@freescale.com Asia/Pacific: Freescale Semiconductor China Ltd. Exchange Building Jianguo Road Chaoyang District Beijing 100022 China 5879 8000 support.asia@freescale.com Literature Requests Only: Freescale Semiconductor Literature Distribution Center P.O. 5405 Denver, Colorado 80217 1-800-441-2447 1-303-675-2140 Fax: 1-303-675-2150
Information this document provided solely enable system software implementers Freescale Semiconductor products. There express implied copyright licenses granted hereunder design fabricate integrated circuits integrated circuits based information this document. Freescale Semiconductor reserves right make changes without further notice products herein. Freescale Semiconductor makes warranty, representation guarantee regarding suitability products particular purpose, does Freescale Semiconductor assume liability arising application product circuit, specifically disclaims liability, including without limitation consequential incidental damages. "Typical" parameters which provided Freescale Semiconductor data sheets and/or specifications vary different applications actual performance vary over time. operating parameters, including "Typicals" must validated each customer application customer's technical experts. Freescale Semiconductor does convey license under patent rights rights others. Freescale Semiconductor products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure Freescale Semiconductor product could create situation where personal injury death occur. Should Buyer purchase Freescale Semiconductor products such unintended unauthorized application, Buyer shall indemnify hold Freescale Semiconductor officers, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that Freescale Semiconductor negligent regarding design manufacture part. Freescaleand Freescale logo trademarks Freescale Semiconductor, Inc. other product service names property their respective owners. Freescale Semiconductor, Inc. 2007-2008.
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