528-channel 6-bit Source Driver with System-on-chip Color Amorphous TF
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528-channel 6-bit Source Driver with System-on-chip Color Amorphous TFT-LCDs
SPFD54126B
Preliminary
NOV. 2006 Version
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Preliminary
SPFD54126B
Table Contents
PAGE TABLE CONTENTS GENERAL DESCRIPTION FEATURE ORDERING INFORMATION. BLOCK DIAGRAM 4.1. BLOCK FUNCTION 4.1.1. System Interface 4.1.2. External Display Interface
4.1.5. Grayscale Voltage Generating Circuit. 4.1.6. Timing Controller. 4.1.7. Oscillator (OSC) 4.1.8. Source Driver Circuit. 4.1.9. Gate Driver Circuit
INSTRUCTIONS
6.1.1. System Function Command List Description 6.1.2. Panel Function Command List Description.
6.2.1. (00h) 6.2.2. SWRESET (01h): Software Reset 6.2.3. RDDID (04H): Read Display 6.2.4. RDDST (09H): Read Display Status 6.2.5. RDDPM (0AH): Read Display Power Mode. 6.2.6. RDDMADCTR (0BH): Read Display MADCTR. 6.2.7. RDDCOLMOD (0CH): Read Display Pixel Format 6.2.8. RDDIM (0DH): Read Display Image Mode 6.2.9. RDDSM (0EH): Read Display Signal Mode 6.2.10. 6.2.11. 6.2.12. 6.2.13. 6.2.14. 6.2.15. 6.2.16. 6.2.17. 6.2.18. 6.2.19. 6.2.20. RDDSDR (0FH): Read Display Self-Diagnostic Result SLPIN (10H): Sleep SLPOUT (11H): Sleep PTLON (12H): Partial Display Mode NORON (13H): Normal Display Mode INVOFF (20H): Display Inversion INVON (21H): Display Inversion GAMSET (26H): Gamma DISPOFF (28H): Display DISPON (29H): Display CASET (2AH): Column Address
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6.2. SYSTEM COMMAND DESCRIPTION
6.1. OUTLINE
SIGNAL DESCRIPTIONS.
4.1.10.
Driving Power Supply Circuit.
4.1.4. Graphics (GRAM)
4.1.3. Address Counter (AC).
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Preliminary
SPFD54126B
6.2.21. 6.2.22. 6.2.23. 6.2.24. 6.2.25. 6.2.26. 6.2.27. 6.2.28. 6.2.29. 6.2.30. 6.2.31. 6.2.32. 6.2.33. 6.2.34. 6.2.35. 6.2.36. 6.2.37. 6.2.38. 6.2.39. 6.2.40. 6.2.41. RASET (2BH): Address Set. RAMWR (2CH): Memory Write. RGBSET (2DH): Colour Setting RAMHD (2EH): Memory Read PTLAR (30H): Partial Area SCRLAR (33H): Scroll Area. TEOFF (34H): Tearing Effect Line OFF. TEON (35H): Tearing Effect Line MADCTR (36H): Memory Data Access Control. VSCSAD (37H): Vertical Scroll Start Address IDMOFF (38H): Idle Mode IDMON (39H): Idle Mode
RDID1 (DAH): Read Value. RDID2 (DBH): Read Value. RDID3 (DCH): Read Value
SRGBOFF (ABH): Separate Gamma VSYNCOFF (ACH): VSYNC Interface
VSCTR1 (AEH): VSYNC Interface function control
6.3.1. RGBCTR (B0H): signal control 6.3.2. FRMCTR1 (B1h): Frame Rate Control normal mode/ Full colors).
6.3.4. FRMCTR3 (B3h): Frame Rate Control Partial mode/ full colors). 6.3.5. INVCTR (B4h): Display Inversion Control. 6.3.6. RGBBPCTR (B5h): Interface Blanking Porch setting. 6.3.7. DISSET5 (B6h): Display Function 6.3.8. PWCTR1 (C0H): Power Control 6.3.9. PWCTR2 (C1H): Power Control 6.3.10. 6.3.11. 6.3.12. 6.3.13. 6.3.14. 6.3.15. 6.3.16. 6.3.17. 6.3.18. 6.3.19. 6.3.20. 6.3.21. 6.3.22. 6.3.23. PWCTR3 (C2H): Power Control Normal mode/ Full colors). PWCTR4 (C3H): Power Control Idle mode/ 8-colors) PWCTR5 (C4H): Power Control Partial mode/ full-colors) VMCTR1 (C5H): VCOM Control VMCTR2 (C6H): VCOM Control RDVMOF (C8H): Read VCOM Offset Value memory WRID2 (D1h): Write Value WRID3 (D2h): Write Value RDID4 (D3h): Read value NVFCTR1 (D9h): Memory Function Controller NVFCTR2 (DEh): Memory Function Controller .110 NVFCTR3 (DFh): Memory Function Controller .111 GMCTRP1 (E0H): Gamma (`+'polarity color) Correction Characteristics Setting.112 GMCTRN1 (E1H): Gamma (`-'polarity color) Correction Characteristics Setting .114 NOV. 2006 Preliminary Version:
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6.3.3. FRMCTR2 (B2h): Frame Rate Control Idle mode/ 8-colors)
6.3. PANEL COMMAND DESCRIPTION
VSYNCON (ADH): VSYNC Interface
SRGBOFF (AAH): Separate Gamma
COLMOD (3AH): Interface Pixel Format
Preliminary
SPFD54126B
6.3.24. 6.3.25. 6.3.26. 6.3.27. GMCTRP2 (E2H): Gamma (`+'polarity) Green color Correction Characteristics Setting .116 GMCTRN2 (E3H): Gamma (`-'polarity) Green color Correction Characteristics Setting .118 GMCTRP3 (E4H): Gamma (`+'polarity) Blue color correction Characteristics Setting GMCTRN3 (E5H): Gamma (`-'polarity) Blue color Correction Characteristics Setting.
FUNCTION DESCRIPTION 7.1. INTERFACE 7.2. INTERFACE 7.2.1. Interface Type Selection. 7.2.2. 8080-Series Parallel interface(P68='0') 7.2.3. 6800-Series Parallel Interface (P68='1') 7.2.4. Serial Peripheral interface (SPI) 7.2.5. Data Transfer Break Recovery.
7.2.7. Data Transfer Modes 7.3. DATA COLOUR CODING 7.3.1. Data Colour Coding data Write.
7.3.3. Serial Interface (IM2 `0'). 7.4. INTERFACE
7.4.2. General Timing Diagram
7.4.5. Interface Mode Set. 7.4.6. Interface Timing Diagram 7.4.7. Data Color Coding. 7.5. DISPLAY DATA 7.5.1. Configuration. 7.5.2. Memory Display Address Mapping 7.5.3. Normal Display Partial Mode Vertical Scroll 7.5.4. Vertical Scroll Mode 7.5.5. Vertical Scroll Example 7.6. ADDRESS COUNTER. 7.7. MEMORY DATA WRITE/ READ DIRECTION 7.8. TEARING EFFECT OUTPUT LINE 7.8.1. Tearing Effect Line Modes 7.8.2. Tearing Effect Line Timings 7.8.3. Example Write faster than panel read. 7.8.4. Example write slower than panel read. 7.9. PRESET VALUES 7.10. POWER ON/OFF SEQUENCE 7.10.1. 7.10.2. 7.10.3. Case RESX Line held High Unstable Host Power Case RESX Line Held Host Power Uncontrolled Power
7.11. POWER LEVEL DEFINITION ORISE Technology Co., Ltd. Proprietary Confidential NOV. 2006 Preliminary Version:
7.4.4. Interface Width
7.4.3. Updating Order Display Active Area (Normal Display Mode Sleep Out).
7.4.1. General Description
7.3.2. Data Colour Coding data Read
7.2.6. Data Transfer Pause
Preliminary
SPFD54126B
7.11.1.Power Level 7.11.2.Power Flow Chart 7.12. GAMMA CURVES 7.13. RESET 7.13.1. 7.13.2. 7.13.3. Reset Value Module Input/Output Pins Reset Timing.
7.14. COLOUR DEPTH CONVERSION LOOK TABLES 7.14.1. 4096 65536 Colour 262,144 Colour
7.15. SLEEP OUT-COMMAND SELF-DIAGNOSTIC FUNCTIONS DISPLAY MODULE 7.15.1. 7.15.2. 7.15.3. 7.15.4. Register Loading Detection Functionality Detection
Display Glass Break Detection
7.16. OSCILLATOR .211 7.17. SYSTEM COLCK GENERATOR .211
7.19. SOURCE DRIVER.211 7.20. GATE DRIVER .211
7.21. -CORRECTION FUNCTION
8.1. CHARACTERISTICAC CHARACTERISTIC (VDD=2.6V~3.0V, VDDIO 1.6V~3.0V, 8.2. TIMING CHARACTERISTICS 8.2.1. Parallel Interface Characteristics 8-bits (8080-series MCU) 8.3. PARALLEL INTERFACE CHARACTERISTICS 8-BITS (6800-SERIES MCU) 8.4. SERIAL INTERFACE CHARACTERISTICS (3-PIN SERIAL). LOCATIONS 9.1. ASSIGNMENT 9.2. LOCATIONS 9.3. WIRING RESISTANCE. DISCLAIMER. REVISION HISTORY.
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ELECTRICAL SPECIFICATIONS
7.22. VSYNC INTERFACE
7.20.1.
Gate Driver .211
7.18. INSTRUCTION DECODER REGISTER .211
Chip Attachment Detection
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Preliminary
SPFD54126B
528-CHANNEL DRIVER WITH SYSTEM-ON-CHIP (SOC) COLOR AMORPHOUS
GENERAL DESCRIPTION
SPF54126B, 262144-color System-on-Chip (SoC) driver designed small medium sizes display, capable supporting 176xRGBx220 resolution which achieved designated graphic data. 528-channel source driver true 6-bit resolution, which generates Gamma-corrected values internal converter. source driver SPFD54126B adopts OP-AMP structure enhance display quality cooperates with advanced circuitry techniques reduce power consumption. SPFD54126B able operate with interface power supply 1.6V incorporate with several charge pumps generate various voltage levels that form on-chip power management system gate driver common driver. System interfaces High-speed interfaces 16-, 18-bit parallel ports Serial Peripheral Interface (SPI) Interfaces moving picture display 16-, 18-bit interfaces Diverse accessing functional display Window address function display area screen moving picture display interface Window address function limit data rewriting area reduce data transfer Moving still picture display same time Vertical scrolling function Partial screen display Power supply Logic power supply voltage (VDD): interface supply voltage (VDDI): On-chip power management system Power saving mode (standby 8-color mode, etc) power consumption OP-AMP structure source driver. Built-in Charge Pump circuits Source driver voltage level times (x2) Vci1 Gate driver voltage level (VGH, VGL) times (x6) minus times (x-5) Vci1 Built-in internal oscillator hardware reset Built-in One-Time-Programming (OTP) function VCOM amplitude VcomH voltage adjustment. Built-in separate three-gamma curves (RGB) controller fine tune display quality.
built-in timing controller SPFD54126B support several
display. SPFD54126B provides system interfaces, which include configure system. only system interfaces used configure system, they also access high speed still 18-bit interfaces picture movement display. SPFD54126B also supports function display eight colors standby mode power control consideration. picture display. addition, SPFD54126B incorporates
FEATURE
One-chip solution amorphous TFT-LCD. Supports resolution 176xRGBx220, incorporating 528-channel source driver 220-channel gate driver Outputs -corrected values using internal true 6-bit resolution converter achieve 262K colors 528-channel source driver adopts OP-AMP structure Built-in 87120 bytes internal Line Inversion drive frame inversion drive
8-/9-/16-/18-bit parallel interfaces 9-bit serial interface (SPI),
interfaces diverse request medium small size portable
ORDERING INFORMATION
Product Number SPFD54126B-C Package Type Chip Form With Gold Bump
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SPFD54126B
BLOCK DIAGRAM
4.1. Block Function
DCX/SCL IM[2:0] S527 S528
Memory System Interface
Source Driver (528 channels)
True 6-bit Converter
Level Shifter (528 6bits)
D[17:0] PCLK
RESX EXTC GM[1:0] LCM[1:0] RCM[1:0] SRGB SHUT
Interface
Graphics 87120 bytes
Data Latch (176 6bits
Shift Register (176 bits)
AVDD Gamma Voltage Generator GVDD
VREF
Timing Signal Generator
Regulator
VCI1
VCOMH
VCI1 C11P/N C12P/N Gate Power Charge Pump
AVDD
VCOM
VCOM VCOML
VDDI
Clock Generator
C21P/N C22P/N C23P/N
Gate Driver
G[220:1]
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SPFD54126B
4.1.1. System Interface
SPFD54126B supports three high-speed system interfaces: 80-system high-speed interfaces with 16-, 18-bit parallel ports. 68-system high-speed interfaces with 16-, 18-bit parallel ports. 3-pin 9-bits Serial Peripheral Interface (SPI). SPFD54126B 16-bit index register (IR) 18-bit data registers, write-data register (WDR) read-data register (RDR). register used store index information from control registers. register used temporarily store data written register control internal GRAM. register used temporarily store data read from GRAM. When graphic data written internal GRAM from MCU/graphic engine, data first written then automatically written internal GRAM internal operation. When graphic data read operation executed, graphic data read from internal GRAM. Therefore, SPFD54126B executes read operation.
4.1.2. External Display Interface
SPFD54126B supports external interface picture movement display. optimum interface selected still moving picture displayed screen.
SPFD54126B allows switching between external display interfaces system interface configuration that
When interface chosen, display operations synchronized with external supplied signals, VSYNC, HSYNC, DOTCLK.
SPFD54126B features Address Counter (AC) giving address internal GRAM. address automatically updated plus minus window address function enables writing data only rectangular area arbitrarily users GRAM.
4.1.4. Graphics (GRAM)
SPFD54126B features 87120-byte (176 220x 18/8) Graphic (GRAM).
4.1.5. Grayscale Voltage Generating Circuit
SPFD54126B true 6-bit resolution converter, which generates Gamma-corrected values cooperates with OP-AMP structure enhance display quality. grayscale voltage adjusted grayscale data -correction register. "-Correction Function" section. details,
4.1.6. Timing Controller
SPFD54126B timing controller which generate timing signal internal circuit operation such gate output timing, accessing timing, etc.
4.1.7. Oscillator (OSC)
SPFD54126B also features internal oscillator generate oscillation with internal resistor. standby mode, oscillation halted reduce power consumption. "Oscillator" details.
4.1.8. Source Driver Circuit
SPFD54126B consists 528-output source driver circuit S528). Data GRAM latched when data input.
latched data controls source driver generates drive waveform.
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4.1.3. Address Counter (AC)
Moreover, valid display data (DB17-0) written GRAM, which synchronized with signal (DE) enabling.
invalid data first read data when SPFD54126B executes read operation.
Thus, valid data read after
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SPFD54126B
4.1.9. Gate Driver Circuit
SPFD54126B consists 220-output gate driver circuit (G1~G220). gate driver circuit outputs gate driver signals either level.
4.1.10. Driving Power Supply Circuit
driving power supply circuit generates voltage levels AVDD, VGH, VCOM driving LCD. this voltages adjusted register setting.
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SPFD54126B
SIGNAL DESCRIPTIONS
Signal Connected with Function
System Configuration Input Signal P68, IM2~0 DGND/ VDDI Select system interface mode.
3-Pin Serial interface 8080 8-bits Parallel interface 8080 16-bits Parallel interface 8080 9-bits Parallel interface 8080 18-bits Parallel interface 3-Pin Serial interface 6800 8-bits Parallel interface 6800 16-bits Parallel interface 6800 9-bits Parallel interface 6800 18-bits Parallel interface
Must connect VDDI level when used. RESX external circuit EXTC DGND/ VDDI Reset pin. This active signal.
GM1~0
DGND/ VDDI
Extend command access
Low: Extend command accessible. High: Extend command accessible. this used. Open (This internally pull low). Resolution selection:
Resolution 176*RGB*220 176*RGB*176 Reserved 176*RGB*132
RCM1~0
DGND/ VDDI
Interface selection:
RCM1 RCM0 Interface Interface Interface Interface Interface
interface mode: Low: Normal Display. High: Idle Mode (8-color mode). This only used when mode selected.
DGND/ VDDI
Liquid Crystal Type selection:
LCM1 LCM0 type selection Normally black type1 Normally white type1
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SPFD54126B
Signal Connected with Function
Normally black type2 Normally white type2
SRGB
DGND/ VDDI
arrangement selection:
SRGB filter order default setting
`R', `G', `B', `G', `B', `G', `R', `G',
Command Low: Display High: Display Off. DGND/ VDDI
This only used when mode selected. Data reverse source driver selection when mode selected. Low: Reverse Off. High: Reserve DGND/ VDDI
This only used when mode selected. Source driver output direction selection:
Source output direction S528 S528=>S1
DGND/ VDDI
Gate driver output direction selection:
GM="00" =>G220 G220=>G1 GM="01" G1=>G176 G176=>G1 GM="11" G1=>G132 G132=>G1
DGND/ VDDI
Source driver output direction selection:
Source output direction S528 S528 S528 S528
This only used when mode selected. DGND/ VDDI Gate driver output direction selection:
GM="00" =>G220 G220 =>G1 G220 =>G1 =>G220 GM="01" G1=>G176 G176 =>G1 G176 =>G1 G1=>G176 GM="11" G1=>G132 G132=>G1 G132=>G1 G1=>G132
This only used when mode selected. Interface input Signals Chip select signal. Low: SPFD54126B accessible ORISE Technology Co., Ltd. Proprietary Confidential Apr. 2006 Preliminary Version:
SHUT
DGND/ VDDI
Display on/off selection when mode selected.
Preliminary
SPFD54126B
Signal Connected with Function High: SPFD54126B accessible This permanently fixed "Low" interface mode only. D/CX (SCL) Display data Command selection parallel interface Low: Command data High: Display data I/F, this used pin. Must connect VDDI level when used. (R/WX) 80-system interface mode, write strobe signal input this initializes write operation when signal low. 68-system interface mode, write read control signal input Must connect VDDI level when used. 80-system interface mode, read strobe signal input this initializes read operation when signal low. 68system interface mode, strobe signal input this initializes write read operation when signal low. SPI_CSX Must connect VDDI level when use. When [1:0] `01' Chip select (Low active) When [1:0] `00' `1X' this initializes write read operation.
DB0-DB17
2*18
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used, please this VDDI DGND level.
When [1:0] `01' Serial clock signal When [1:0] `00' `1X'
used, please this VDDI DGND level.
When [1:0] `01' `1X' Serial input/ output signal serial mode. data input rising edge signal. data output falling edge signal. When [1:0] `00'
used, please this VDDI DGND level.
When [1:0] `1X' (RGB I/F), D[17:0] used interface data When [1:0] `00' (MCU I/F), D[17:0] used parallel interface data I/F, used Serial input/ output signal. I/F, D[17:1] used, please this VDDI DGND level. When [1:0] `01' (MCU I/F), D[17:0] used interface data I/F, D[17:0] used, please this VDDI DGND level. VSYNC mode, served vertical synchronize signal input Must connect VDDI DGND level when use. mode, served horizontal synchronized signal input Must connect VDDI DGND level when use. mode, polarity signal synchronized with valid graphic data input. High: Valid data DB17-DB0 Low: Invalid data DB17-DB0 Apr. 2006 Preliminary Version:
This used, VDDI DGND level.
This used, VDDI DGND level.
This used, VDDI DGND level.
Preliminary
SPFD54126B
Signal Connected with Function Must connect VDDI DGND level when use. PCLK mode, served pixel clock signal. Must connect VDDI DGND level when use. Charge Pump Power Supply Signal C11P/N, C12P/N C21P/N, C22P/N C23P/N VCI1 Stabilizing capacitor AVDD Stabilizing capacitor Stabilizing capacitor Stabilizing capacitor Stabilizing capacitor Stabilizing capacitor VREF GVDD Stabilizing capacitor internal reference voltage level, which regulated from VDD. GND. amplitude VCI1 from VDD-GND. Place stabilizing capacitor between Output VCI1 voltage level from step-up circuit Place stabilizing capacitor between GND. AVDD 5.5V output voltage from step-up circuit VCI1 level. Connect with stabilizing capacitor. Connect with stabilizing capacitor. output voltage from step-up circuit VCI1 level. Connect with stabilizing capacitor. output voltage from step-up circuit -2x, VCI1 level. Step-up capacitor Connect boost capacitors internal DC/DC converter circuit these pins. Leave pins open when DC/DC converter circuits used.
Stabilizing
capacitor
Source/Gate Driver VCOM Signals G1~G220 S1~S528 panel common electrode VcomH VcomL Stabilizing capacitor Stabilizing capacitor open VDDIO DGNDO VDDI Stabilizing capacitor Stabilizing capacitor DGND Digital ground pin. Apr. 2006 Preliminary Version: Power supply Input system VDDI input voltage control pins using DGND input voltage control pins using Power supply Input analog booster system Output level VCOM voltage. Connect with capacitor stabilize. Output gate driver signals, which swing from Output source driver signals. converted 64-gray-scale analog voltage output. VCOM Output square wave signal with swing from VcomH VcomL common electrode panel. alternating cycle frame inversion 1-line inversion. Output high level VCOM voltage. Connect with capacitor stabilize.
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Reference voltage Internal logic block Connect with stabilizing capacitor Reference voltage power block Connect with stabilizing capacitor. Output source driver grayscale reference voltage level.
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SPFD54126B
Signal AGND Misc. Signal Drive signal power transistor booster converter booster regulator feedback input. Connect feedback resistive divider GND. threshold 0.6V normal. Tearing effect output synchronies frame writing, activated command. When this activated function OFF), this DGND level. Power supply input function This used glass break detection This used glass break detection Connected with Function Analog ground pin.
VOTP PADA0 PADB0 PADA1/PADB1 PADA2/PADB2 PADA3/PADB3 PADA4/PADB4 TEST Dummy PREG
Test pin. used, please open this pin. Dummy pin. used, please open this pin.
used, please open this pin.
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External oscillator frequency input oscillator testing
Dummy pin. used, please open this pin.
This used chip attachment detection
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SPFD54126B
INSTRUCTIONS
6.1. Outline
SPFD54126B supports 18-bit data interface configure system accessing command register. When command register executed, sending command information specify which index register would accessed following data that control register. Moreover, register accessing operation should cooperate with DC/X, WRX, signal SPFD54126B recognize control instruction. command instruction accomplished using system interfaces (18-bit, 16-bit, 9-bit, 8-bit 68-system SPI).
6.1.1. System Function Command List Description
Table 5.1.1 list system function command. After reset RESX reset SWRESET command, each internal register becomes default state (Refer "RESET TABLE" section). Commands 10h, 12h, 13h, 20h, 21h, 26h, 28h, 29h, 30h, 33h, parameter only), 37h, updated during V-sync when Module Sleep Mode avoid abnormal visual effects. During Sleep mode, these commands updated immediately. Read status (09h), Read Display Power Mode (0Ah), Read Display MADCTR Diagnostic Result (0Fh) these commands updated immediately both Sleep mode Sleep mode. (0Bh), Read Display Pixel Format (0Ch), Read Display Image Mode (0Dh), Read Display Signal Mode (0Eh) Read Display Self
Table 6.1.1 System Function command List
Instruction D/CX D17-8 SWRESET MADCTR COLMOD
(Hex)
RDDID
RDDST
RDDPM
(00h) Operation (01h) Software reset (04h) Read Display Dummy read ID17 ID16 ID15 ID14 ID13 ID12 ID11 ID10 read ID27 ID26 ID25 ID24 ID23 ID22 ID21 ID20 read ID37 ID36 ID35 ID34 ID33 ID32 ID31 ID30 read (09h) Read Display Status Dummy read BSTON ST25 ST24 ST23 IFPF2 IFPF1 IFPF0 IDMON PTLON SLOUT NORON VSSON ST14 INVON ST12 ST11 DISON TEON GCS2 GCS1 GCS0 TELOM HSON VSON PCKON DEON (0Ah) Read Display Power Mode Dummy read
Function
BSTON IDMON PTLON SLPOUT NORON DISON
RDDIM
RDDSM
RDDSDR
(0Bh) Read Display MADCTR Dummy read (0Ch) Read Display Pixel Format Dummy read IFPF2 IFPF1 IFPF0 (0Dh) Read Display Image Mode Dummy read VSSON INVON GCS2 GCS1 GCS0 (0Eh) Read Display Signal Mode Dummy read TEON TELOM HSON VSON PCKON DEON (0Fh) Read Display Self-diagnostic result Dummy read RELD FUND ATTD
"-": Dont care, VDDI DGND level
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SPFD54126B
Table 6.1.1 System Function command List
Instruction D/CX D17-8 SLPIN SLPOUT PTLON NORON INVOFF INVON GAMSET DISPOFF DISPON D17-8 D17-8 XS15 XE15 YS15 YE15 R007 G007 B007 XS14 XE14 YS14 YE14 R006 G006 B006 XS13 XE13 YS13 YE13 R005 G005 B005 XS12 XE12 YS12 YE12 XS11 XE11 YS11 YE11 XS10 XE10 YS10 YE10 R001 G001 B001 (Hex) (10h) (11h) (12h) (13h) (20h) (21h) (26h) Function Sleep booster Sleep booster Partial mode Partial (Normal) Display inversion (normal) Display inversion Gamma curve select (28h) Display (29h) Display (2Ah) Column address address start: 0xAF address end: 0xAF
R002 G002 B002
CASET
R003 G003 B003
RASET
R004 G004 B004
RAMWR
RGBSET
"-": Don't care, VDDI DGND level
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RAMHD
Write data (2Eh) Memory read Dummy read Read data (2Dh) 4k,65k 262K color display R000 tone tone "31" G000 Green tone Green tone "63" B000 Blue tone Blue tone "31"
(2Ch)
(2Bh) address address start: 0xDB address end: 0xDB Memory write
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SPFD54126B
Table 6.1.1 System Function command List
Instruction D/CX D17-8 (Hex) Function (30h) Partial start/end address PSL15 PSL14 PSL13 PSL12 PSL11 PSL10 PSL9 PSL8 Partial start address (0,1,2, 219)
PSL7 PSL6 PSL5 PSL4 PSL3 PSL2 PSL1 PSL0 PEL15 PEL14 PEL13 PEL12 PEL11 PEL10 PEL9 PEL8 PEL7 PEL6 PEL5 PEL4 PEL3 PEL2 PEL1 PEL0
PTLAR
Partial address (0,1,2, 219) (33h) Scroll area fixed area (0,1,2, 220) Vertical scroll area (0,1,2, .,220) Bottom fixed area (0,1,2, .,220)
TFA15 TFA14 TFA13 TFA12 TFA11 TFA10 TFA9 TFA8 TFA7 TFA6 TFA5 TFA4 TFA3 TFA2 TFA1 TFA0 VSA15 VSA14 VSA13 VSA12 VSA11 VSA10 VSA9 VSA8 VSA7 VSA6 VSA5 VSA4 VSA3 VSA2 VSA1 VSA0 BFA15 BFA14 BFA13 BFA12 BFA11 BFA10 BFA9 BFA8 BFA7 BFA6 BFA5 BFA4 BFA3 BFA2 BFA1 BFA0
SCRLAR
TEOFF TEON MADCTR
SSA7 SSA6 SSA5 SSA4 SSA3 SSA2 SSA1 SSA0
COLMOD
RDID1
RDID3 SRGBOFF SRGBON VSUNCOFF VDUNCON VSCTRI
RDID2
IDMOFF IDMON
(38h) Idle mode (39h) Idle mode (3Ah) Interface pixel format IFPF2 IFPF1 IFPF0 Interface format (DAh) Read Dummy read ID17 ID16 ID15 ID14 ID13 ID12 ID11 ID10 Read parameter (DBh) Read Dummy read ID27 ID26 ID25 ID24 ID23 ID22 ID21 ID20 Read parameter (DCh) Read Dummy read ID37 ID36 ID35 ID34 ID33 ID32 ID31 ID30 Read parameter (AAh) Separate function (ABh) Separate function
VSCSAD
(34h) Tearing effect line (35h) Tearing effect mode TELOM M="0": Mode1, M="1": Mode2 (36h) Memory data access control (37h) Scroll start address SSA15 SSA14 SSA13 SSA12 SSA11 SSA10 SSA9 SSA8
VSFP3 VSFP2VSFP1VSFP0 VSBP3 VSBP2 VSBP1 VSBP0
"-": Don't care, VDDI DGND level
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(ACh) VSYNC interace function (ADh) VSYNC interace function (AEh) VSYNC interace control porch setting
Apr. 2006 Preliminary Version:
Preliminary
SPFD54126B
6.1.2. Panel Function Command List Description
Table 6.1.2 list panel function command. Panel function command only accessible when EXTC pulled high state VDDIO).
Table 6.1.2 Panel Function command List
Instruction D/CX D17-8 RGBCTR FRMCTR1 FRMCTR2 FRMCTR3 INVCTR PRCTR (Hex) Function (B0h) signal control (B1h)
normal mode (Full colors) FP0: Front porch normal mode BP0: Back porch normal mode RTN0: Number clock line
ICM: data ascess select DP,HSP,VSP:PCLK,HS,VS polarity
DISSET5
RTN0 RTN0 RTN0 RTN0 RTN1 RTN1 RTN1 RTN1 RTN2 RTN2 RTN2 RTN2 SDT1 STD0
(B2h)
Idle mode (8-colors) FP1: Front porch idle mode BP1: Back porch idle mode RTN1: Number clock line
(B3h)
partial mode Full colors FP2: Front porch partial mode BP2: Back porch partial mode RTN2: Number clock line
(B4h) Display inversion control
NLA, NLB, NLC: inversion
(B5h)
Blanking porch setting Vertical back porch mode amount non-overlap SDT: amount source delay display area source/ VCOM/ Gate output control period
(B6h) Display function setting
PTG1 PTG0
"-": Don't care, VDDI DGND level
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SPFD54126B
Table 6.1.2 Panel Function Command List
Instruction D/CX D17-8 PWCTR1 PWCTR5 (Hex) VRH4 VRH3 VRH2 VRH1 VRH0 APA2 APA1 APA0 DCA2 DCA1 DCA0 APB2 APB1 APB0 Function (C0h) Power control setting
VRH: GVDD voltage VCI1 voltage Power control setting
(C1h) AVDD/VCL/ VGH/ voltage (C2h) normal mode (Full colors)
PWCTR2 PWCTR3
PWCTR4
VMCTR1
APA: adjust operational amplifier DCA: adjust booster circuit Idle mode (C3h) Idle mode (8-colors) APB: adjust operational amplifier DCB: adjust booster circuit Idle mode DCB2 DCB1 DCB0 (C4h) partial mode Full colors APC: adjust operational amplifier APC2 APC1 APC0 DCC: adjust booster circuit Idle mode DCC2 DCC1 DCC0 (C5h) VCOM control nVM: VCOM input select VMH: VCOMH voltage control VMH6 VMH4 VMH3 VMH2 VMH1 VMH0
(C6h) (Hex)
VMF6 VMF5 VMF4 VMF3 VMF2 VMF1 VMF0
"-": Don't care, VDDI DGND level
Instruction D/CX D17-8 WRID2 WRID3 NVCTR2 NVCTR3
Table 6.1.2 Panel Function Command List
RVMOF
(C8h) VCOM control RVMF RVMF RVMF RVMF RVMF RVMF RVMF Read VMOF value form memory
VMCTR2
VMA5 VMA4 VMA3 VMA2 VMA1 VMA0
VCOM control VMA: VCOMAC voltage control
Function (D1h) Panel version code
ID26 ID25 ID24 ID23 ID22 ID21 ID20
ID37 ID36 ID35 ID34 ID33 ID32 ID31 ID30
Write value memory version code (D2h) Driver maker Project code Write value memory project code
RDID4
NVCTR1
(D3h) Vender Coder Dummy read ID417 ID416 ID415 ID414 ID413 ID412 ID411 ID410 ID41:IC Vender Coder ID427 ID426 ID425 ID424 ID423 ID422 ID421 ID420 ID42: Part Number Coder ID43 ID44: Chip version coder ID437 ID436 ID435 ID434 ID43 ID432 ID431 ID430 ID447 ID446 ID445 ID444 ID443 ID442 ID441 ID440 (D9h) memory function controller
Please refer `OTP programming procedure' details. (DEh) memory function controller Please refer `OTP programming procedure' details. (DFh) memory function controller Please refer `OTP programming procedure' details.
"-": Don't care, VDDI DGND level
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SPFD54126B
Table 6.1.2 Panel Function Command List
Instruction D/CX D17-8
R_PVR1V1[5] R_PVR1V2[5] R_PVR1V61[5] R_PVR1V62[5]
R_PVR1V0[4] R_PVR1V1[4] R_PVR1V2[4] R_PVR1V61[4] R_PVR1V62[4] R_PVR1V63[4] R_PVR2V13[4] R_PVR2V50[4]
R_PVR1V0[3] R_PVR1V1[3] R_PVR1V2[3] R_PVR1V61[3] R_PVR1V62[3] R_PVR1V63[3] R_PVR2V13[3] R_PVR2V50[3] R_PVR3V4[3] R_PVR3V8[3] R_PVR3V20[3] R_PVR3V27[3] R_PVR3V36[3] R_PVR3V43[3] R_PVR3V55[3] R_PVR3V59[3]
R_PVR1V0[2] R_PVR1V1[2] R_PVR1V2[2] R_PVR1V61[2] R_PVR1V62[2] R_PVR1V63[2] R_PVR2V13[2] R_PVR2V50[2] R_PVR3V4[2] R_PVR3V8[2] R_PVR3V20[2] R_PVR3V27[2] R_PVR3V36[2] R_PVR3V43[2] R_PVR3V55[2] R_PVR3V59[2]
R_PVR1V0[1] R_PVR1V1[1] R_PVR1V2[1] R_PVR1V61[1] R_PVR1V62[1] R_PVR1V63[1] R_PVR2V13[1] R_PVR2V50[1] R_PVR3V4[1] R_PVR3V8[1] R_PVR3V20[1] R_PVR3V27[1] R_PVR3V36[1] R_PVR3V43[1] R_PVR3V55[1] R_PVR3V59[1]
R_PVR1V0[0] R_PVR1V1[0] R_PVR1V2[0] R_PVR1V61[0] R_PVR1V62[0] R_PVR1V63[0] R_PVR2V13[0] R_PVR2V50[0] R_PVR3V4[0] R_PVR3V8[0] R_PVR3V20[0] R_PVR3V27[0] R_PVR3V36[0] R_PVR3V43[0] R_PVR3V55[0] R_PVR3V59[0]
(Hex) Function
GAMCTRP1
Gamma (E0h) adjustment
"-": Don't care, VDDI DGND level
Instruction D/CX D17-8
Table 6.1.2 Panel Function Command List
R_NVR1V0[3] R_NVR1V1[3] R_NVR1V2[3] R_NVR1V61[3] R_NVR1V62[3] R_NVR1V63[3] R_NVR2V13[3] R_NVR2V50[3] R_NVR3V4[3] R_NVR3V8[3] R_NVR3V20[3] R_NVR3V27[3] R_NVR3V36[3] R_NVR3V43[3] R_NVR3V55[3] R_NVR3V59[3]
R_NVR1V0[2] R_NVR1V1[2] R_NVR1V2[2] R_NVR1V61[2] R_NVR1V62[2] R_NVR1V63[2] R_NVR2V13[2] R_NVR2V50[2] R_NVR3V4[2] R_NVR3V8[2] R_NVR3V20[2] R_NVR3V27[2] R_NVR3V36[2] R_NVR3V43[2] R_NVR3V55[2] R_NVR3V59[2]
R_NVR1V0[1] R_NVR1V1[1] R_NVR1V2[1] R_NVR1V61[1] R_NVR1V62[1] R_NVR1V63[1] R_NVR2V13[1] R_NVR2V50[1] R_NVR3V4[1] R_NVR3V8[1] R_NVR3V20[1] R_NVR3V27[1] R_NVR3V36[1] R_NVR3V43[1] R_NVR3V55[1] R_NVR3V59[1]
R_NVR1V0[0] R_NVR1V1[0] R_NVR1V2[0] R_NVR1V61[0] R_NVR1V62[0] R_NVR1V63[0] R_NVR2V13[0] R_NVR2V50[0] R_NVR3V4[0] R_NVR3V8[0] R_NVR3V20[0] R_NVR3V27[0] R_NVR3V36[0] R_NVR3V43[0] R_NVR3V55[0] R_NVR3V59[0]
(Hex) Function
R_NVR1V0[4]
R_NVR1V1[5] R_NVR1V2[5]
R_NVR1V1[4] R_NVR1V2[4] R_NVR1V61[4] R_NVR1V62[4] R_NVR1V63[4] R_NVR2V13[4] R_NVR2V50[4]
R_NVR1V61[5] R_NVR1V62[5]
GAMCTRN1
Gamma (E1h) adjustment
"-": Don't care, VDDI DGND level
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SPFD54126B
Table 6.1.2 Panel Function Command List
Instruction D/CX D17-8
G_PVR1V1[5] G_PVR1V2[5] G_PVR1V61[5] G_PVR1V62[5]
G_PVR1V0[4] G_PVR1V1[4] G_PVR1V2[4] G_PVR1V61[4] G_PVR1V62[4] G_PVR1V63[4] G_PVR2V13[4] G_PVR2V50[4]
G_PVR1V0[3] G_PVR1V1[3] G_PVR1V2[3] G_PVR1V61[3] G_PVR1V62[3] G_PVR1V63[3] G_PVR2V13[3] G_PVR2V50[3] G_PVR3V4[3] G_PVR3V8[3] G_PVR3V20[3] G_PVR3V27[3] G_PVR3V36[3] G_PVR3V43[3] G_PVR3V55[3] G_PVR3V59[3]
G_PVR1V0[2] G_PVR1V1[2] G_PVR1V2[2] G_PVR1V61[2] G_PVR1V62[2] G_PVR1V63[2] G_PVR2V13[2] G_PVR2V50[2] G_PVR3V4[2] G_PVR3V8[2] G_PVR3V20[2] G_PVR3V27[2] G_PVR3V36[2] G_PVR3V43[2] G_PVR3V55[2] G_PVR3V59[2]
G_PVR1V0[1] G_PVR1V1[1] G_PVR1V2[1] G_PVR1V61[1] G_PVR1V62[1] G_PVR1V63[1] G_PVR2V13[1] G_PVR2V50[1] G_PVR3V4[1] G_PVR3V8[1] G_PVR3V20[1] G_PVR3V27[1] G_PVR3V36[1] G_PVR3V43[1] G_PVR3V55[1] G_PVR3V59[1]
G_PVR1V0[0] G_PVR1V1[0] G_PVR1V2[0] G_PVR1V61[0] G_PVR1V62[0] G_PVR1V63[0] G_PVR2V13[0] G_PVR2V50[0] G_PVR3V4[0] G_PVR3V8[0] G_PVR3V20[0] G_PVR3V27[0] G_PVR3V36[0] G_PVR3V43[0] G_PVR3V55[0] G_PVR3V59[0]
(Hex) Function
GAMCTRP1
Gamma (E2h) adjustment
"-": Don't care, VDDI DGND level
Instruction D/CX D17-8
Table 6.1.2 Panel Function Command List
G_NVR1V0[3] G_NVR1V1[3] G_NVR1V2[3] G_NVR1V61[3] G_NVR1V62[3] G_NVR1V63[3] G_NVR2V13[3] G_NVR2V50[3] G_NVR3V4[3] G_NVR3V8[3] G_NVR3V20[3] G_NVR3V27[3] G_NVR3V36[3] G_NVR3V43[3] G_NVR3V55[3] G_NVR3V59[3]
G_NVR1V0[2] G_NVR1V1[2] G_NVR1V2[2] G_NVR1V61[2] G_NVR1V62[2] G_NVR1V63[2] G_NVR2V13[2] G_NVR2V50[2] G_NVR3V4[2] G_NVR3V8[2] G_NVR3V20[2] G_NVR3V27[2] G_NVR3V36[2] G_NVR3V43[2] G_NVR3V55[2] G_NVR3V59[2]
G_NVR1V0[1] G_NVR1V1[1] G_NVR1V2[1] G_NVR1V61[1] G_NVR1V62[1] G_NVR1V63[1] G_NVR2V13[1] G_NVR2V50[1] G_NVR3V4[1] G_NVR3V8[1] G_NVR3V20[1] G_NVR3V27[1] G_NVR3V36[1] G_NVR3V43[1] G_NVR3V55[1] G_NVR3V59[1]
G_NVR1V0[0] G_NVR1V1[0] G_NVR1V2[0] G_NVR1V61[0] G_NVR1V62[0] G_NVR1V63[0] G_NVR2V13[0] G_NVR2V50[0] G_NVR3V4[0] G_NVR3V8[0] G_NVR3V20[0] G_NVR3V27[0] G_NVR3V36[0] G_NVR3V43[0] G_NVR3V55[0] G_NVR3V59[0]
(Hex) Function
G_NVR1V1[5] G_NVR1V2[5]
G_NVR1V61[5] G_NVR1V62[5]
G_NVR1V0[4]
G_NVR1V1[4] G_NVR1V2[4]
G_NVR1V61[4] G_NVR1V62[4] G_NVR1V63[4] G_NVR2V13[4] G_NVR2V50[4]
GAMCTRN1
Gamma (E3h) adjustment
"-": Don't care, VDDI DGND level
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Preliminary
SPFD54126B
Table 6.1.2 Panel Function Command List
Instruction D/CX D17-8
B_PVR1V1[5] B_PVR1V2[5] B_PVR1V61[5] B_PVR1V62[5]
B_PVR1V0[4] B_PVR1V1[4] B_PVR1V2[4] B_PVR1V61[4] B_PVR1V62[4] B_PVR1V63[4] B_PVR2V13[4] B_PVR2V50[4]
B_PVR1V0[3] B_PVR1V1[3] B_PVR1V2[3] B_PVR1V61[3] B_PVR1V62[3] B_PVR1V63[3] B_PVR2V13[3] B_PVR2V50[3] B_PVR3V4[3] B_PVR3V8[3] B_PVR3V20[3] B_PVR3V27[3] B_PVR3V36[3] B_PVR3V43[3] B_PVR3V55[3] B_PVR3V59[3]
B_PVR1V0[2] B_PVR1V1[2] B_PVR1V2[2] B_PVR1V61[2] B_PVR1V62[2] B_PVR1V63[2] B_PVR2V13[2] B_PVR2V50[2] B_PVR3V4[2] B_PVR3V8[2] B_PVR3V20[2] B_PVR3V27[2] B_PVR3V36[2] B_PVR3V43[2] B_PVR3V55[2] B_PVR3V59[2]
B_PVR1V0[1] B_PVR1V1[1] B_PVR1V2[1] B_PVR1V61[1] B_PVR1V62[1] B_PVR1V63[1] B_PVR2V13[1] B_PVR2V50[1] B_PVR3V4[1] B_PVR3V8[1] B_PVR3V20[1] B_PVR3V27[1] B_PVR3V36[1] B_PVR3V43[1] B_PVR3V55[1] B_PVR3V59[1]
B_PVR1V0[0] B_PVR1V1[0] B_PVR1V2[0] B_PVR1V61[0] B_PVR1V62[0] B_PVR1V63[0] B_PVR2V13[0] B_PVR2V50[0] B_PVR3V4[0] B_PVR3V8[0] B_PVR3V20[0] B_PVR3V27[0] B_PVR3V36[0] B_PVR3V43[0] B_PVR3V55[0] B_PVR3V59[0]
(Hex) Function
GAMCTRP1
Gamma (E4h) adjustment
"-": Don't care, VDDI DGND level
Instruction D/CX D17-8
Table 6.1.2 Panel Function Command List
B_NVR1V0[3] B_NVR1V1[3] B_NVR1V2[3] B_NVR1V61[3] B_NVR1V62[3] B_NVR1V63[3] B_NVR2V13[3] B_NVR2V50[3] B_NVR3V4[3] B_NVR3V8[3] B_NVR3V20[3] B_NVR3V27[3] B_NVR3V36[3] B_NVR3V43[3] B_NVR3V55[3] B_NVR3V59[3]
B_NVR1V0[2] B_NVR1V1[2] B_NVR1V2[2] B_NVR1V61[2] B_NVR1V62[2] B_NVR1V63[2] B_NVR2V13[2] B_NVR2V50[2] B_NVR3V4[2] B_NVR3V8[2] B_NVR3V20[2] B_NVR3V27[2] B_NVR3V36[2] B_NVR3V43[2] B_NVR3V55[2] B_NVR3V59[2]
B_NVR1V0[1] B_NVR1V1[1] B_NVR1V2[1] B_NVR1V61[1] B_NVR1V62[1] B_NVR1V63[1] B_NVR2V13[1] B_NVR2V50[1] B_NVR3V4[1] B_NVR3V8[1] B_NVR3V20[1] B_NVR3V27[1] B_NVR3V36[1] B_NVR3V43[1] B_NVR3V55[1] B_NVR3V59[1]
B_NVR1V0[0] B_NVR1V1[0] B_NVR1V2[0] B_NVR1V61[0] B_NVR1V62[0] B_NVR1V63[0] B_NVR2V13[0] B_NVR2V50[0] B_NVR3V4[0] B_NVR3V8[0] B_NVR3V20[0] B_NVR3V27[0] B_NVR3V36[0] B_NVR3V43[0] B_NVR3V55[0] B_NVR3V59[0]
(Hex) Function
B_NVR1V1[5] B_NVR1V2[5]
B_NVR1V61[5] B_NVR1V62[5]
B_NVR1V0[4] B_NVR1V1[4] B_NVR1V2[4]
B_NVR1V61[4] B_NVR1V62[4] B_NVR1V63[4] B_NVR2V13[4] B_NVR2V50[4]
GAMCTRN1
Gamma (E5h) adjustment
"-": Don't care, VDDI DGND level
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SPFD54126B
6.2. System Command Description 6.2.1. (00h)
Inst Para D/CX D17-8 Operation) (Code) (00H)
Parameter NOTE: Don't care, VDDI DGND level
Parameter
-This command empty command. does have effect display module. Description Restriction -However used terminate data write read described RAMWR (Memory Write), RAMHD (Memory Read) parameter write commands. Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Register Availability
Default
Status Power Sequence Reset Reset
Flow Chart
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Availability
Default Value
Apr. 2006 Preliminary Version:
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SPFD54126B
6.2.2. SWRESET (01h): Software Reset
Inst Para SWRESET D/CX D17-8 SWRESET (Software Reset) (Code) (01H)
Parameter NOTE: Don't care, VDDI DGND level
Parameter
Description
-When Software Reset command written, causes software reset. resets commands parameters their Reset default values source gate outputs (display off). (See default tables each command description) Note: Frame Memory contents affected this command. will necessary wait 5msec before sending command following software reset.
Restriction
-Software Reset command cannot sent during Sleep sequence. Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Default
SWRESET (01H)
Status Power Sequence Reset Reset
Register Availability
Software Reset applied during Sleep mode, will necessary wait 120msec before sending Sleep command.
-The display module loads display supplier's factory default values registers during 5msec.
Availability
Default Value
Legend
Command
Display whole blank screen
Flow Chart
Parameter
Display
Commands Default Value
Action Mode Sequential transfer
Sleep Mode
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6.2.3. RDDID (04H): Read Display
Inst Para RDDID Parameter Parameter Parameter Parameter
RDDID (Read Display D/CX D17-8 ID17 ID27 ID37 ID16 ID26 ID36 ID15 ID25 ID35 ID14 ID24 ID34 ID13 ID23 ID33 ID12 ID22 ID32 ID11 ID21 ID31 ID10 ID20 ID30 (Code) (04H)
NOTE: Don't care, VDDI DGND level
-This read byte returns 18-bits display identification information. -The parameter (ID17 ID10): module's manufacturer -The parameter (ID27 ID20): module/driver version
Restriction
-The parameter (ID37 UD30): module/driver NOTE: Commands RDID1/2/3 (DAH, DBH, DCH) read data correspond parameters 2,3,4 command 04H, respectively. Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep Availability
Register Availability
Status Default
Description
Serial Mode
RDDID (04H)
Power Sequence Reset Reset
Default Value
-The parameter dummy data
Parallel
RDDID (04H) Host Driver Legend
Command
Dummy Clock
Flow Chart
Dummy Read
Parameter
Display
Send ID1[7:0]
Send ID1[7:0]
Action Mode
Send ID2[7:0]
Send ID2[7:0]
Sequential transfer Send ID3[7:0]
Send ID3[7:0]
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6.2.4. RDDST (09H): Read Display Status
Inst Para RDDST Parameter Parameter Parameter Parameter
RDDST (Read Display Status) D/CX D17-8 BSTON ST23 ST25 (Code) (09H)
VSSON ST14 INVON ST12 Parameter GCS1 GCS0 TELOM HSON NOTE: Don't care, VDDI DGND level BSTON ST25 ST24 ST23 IDMON PTLON SLPOUT NORON VSSON ST14 INVON ST12 ST11 DISON TEON GCSEL2 GCSEL1 GCSEL0 TELOM HSON VSON PCLKON DEON Tearing effect line mode Horizontal Sync. (HS) Vertical Sync, (VS, I/F) Pixel Clock (PCLK, I/F) Data Enable (DE, I/F) Future Description Booster Voltage Status Address Order (MY) Column Address Order (MX) Row/Column Exchange (MV) Vertical Refresh Order (ML) RGB/ Order (RGB) Future Future Future
ST24 NORO IDMON PTLON SLOUT ST11 DISON TEON GCS2 VSON PCKON DEON
This command indicates current status display described table below: Value =Booster =Booster =Decrement, (Bottom Top, when MADCTL (36H) D7='1') =Increment, (Top Bottom, when MADCTL (36H) D7='0') =Decrement, (Right Left, when MADCTL (36H) D6='1') =Increment, (Left Right, when MADCTL (36H) D6='0') Row/column exchange, (when MADCTL (36H) D5='1') Normal, (when MADCTL (36H) D5='0') =Decrement, (LCD refresh Bottom Top, when MADCTL (36H) D4='1') "0"=Increment, (LCD refresh Bottom, when MADCTL (36H) D4='0') =BGR, (When MADCTL (36H) D3='1') =RGB, (When MADCTL (36H) D3='0') "011" 12-bits pixel, "101" 16-bits pixel, "110" 18-bits pixel, others define Out, Normal Display, Partial Display Scroll on,"0" Scroll "000" "001" "010" "011" GC3, "100" "111" defined mode1, mode2
Color Pixel Format Definition Idle Mode On/Off Partial Mode On/Off Sleep In/Out Display Normal Mode On/Off Vertical Scrolling Status Future Inversion Status Future Future Display On/Off Tearing effect line on/off Gamma Curve Selection
Description
Note: ST0, ST11-ST12, ST14, ST23, ST24
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Restriction Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep Availability
Register Availability
Status Default Power Sequence Reset Reset ST[31-24] 0000-0000 0xxx-xx00 0000-0000
Default Value (ST31 ST0) ST[23-16] ST[15-8] ST[7-0] 0110-0001 0000-0000 0000-0000 0xxx-0001 0000-0000 0000-0000 0110-0001 0000-0000 0000-0000
RDDST (09H)
RDDST (09H)
Host Driver
Serial Mode
Parallel Mode
Legend
Command
Dummy Clock
Dummy Read
Flow Chart
Send ST[31:24]
Send ST[31:24]
Parameter
Display
Send ST[23:16]
Send ST[23:16]
Action Mode
Send ST[15:8]
Send ST[15:8]
Send ST[7:0]
Sequential transfer
Send ST[7:0]
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6.2.5. RDDPM (0AH): Read Display Power Mode
Inst Para RDDPM Parameter
RDDPM (Read Display Power Mode) D/CX D17-8 (Code) (0AH) 08h-
SLPOU NORO Parameter BSTON IDMON PTLON DISON NOTE: Don't care, VDDI DGND level
Description
Default
Status Power Sequence Reset Reset
Register Availability
Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Restriction
-This command indicates current status display described table below: Description Value "1"=Booster BSTON Booster Voltage Status "0"=Booster Idle Mode IDMON Idle Mode On/Off Idle Mode Partial Mode PTLON Partial Mode On/Off Partial Mode Sleep Out, SLPON Sleep In/Out Sleep Normal Display, NORON Display Normal Mode On/Off Partial Display Display DISON Display On/Off Display Used Used
Host Driver
Default Value 0000_1000 (08h) 0000_1000 (08h) 0000_1000 (08h)
Availability
Legend
Serial Mode
RDDPM (0AH)
Parallel Mode
RDDPM (0AH)
Command
Parameter
Display
Flow Chart
Send D[7:0]
Dummy Read
Action Mode
Send D[7:0] Sequential transfer
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6.2.6. RDDMADCTR (0BH): Read Display MADCTR
Inst Para RDDMADCTR Parameter
RDDMADCTR (Read Display MADCTR) D/CX D17-8 (Code) (0BH)
Parameter NOTE: Don't care, VDDI DGND level
Description
Restriction Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Status Power Sequence Reset Reset
Register Availability
Default
Host Driver
-This command indicates current status display described table below: Description Value Address Order =Decrement, "0"=Increment Column Address Order =Decrement, "0"=Increment Row/column exchange (MV=1) Row/Column Order (MV) Normal (MV=0) =LCD Refresh Bottom Vertical Refresh Order =LCD Refresh Bottom RGB/BGR Order =BGR, "0"=RGB Used Used Used
Default Value 0000_0000 (00h) change 0000_0000 (00h)
Availability
Serial Mode
RDDMADCTR (0BH)
Parallel Mode
RDDMADCTR (0BH)
Legend
Command
Parameter
Display
Flow Chart
Send D[7:0]
Dummy Read
Action Mode
Send D[7:0]
Sequential transfer
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6.2.7. RDDCOLMOD (0CH): Read Display Pixel Format
Inst Para RDDCOLMOD Parameter
RDDCOLMOD (Read Display Pixel Format) D/CX D17-8 VIPF2 VIPF1 VIPF0 IFPF2 IFPF1 IFPF0 (Code) (0CH)
Parameter VIPF3 NOTE: Don't care, VDDI DGND level
Restriction
Status
Register Availability
Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Availability Default Value IFPF[2:0] VIPF[3:0] 0101 (16-bits/pixel) 0110 (18-bits/pixel) Change Change 0101 (16-bits/pixel) 0110 (18-bits/pixel)
VIPF[3:0] 0101 0110 0111 1110 Others define invalid
Interface Color Format 16-bits/pixel (1-times data transfer) 18-bits/pixel (1-times data transfer) Reserved 18-bits/pixel (3-times data transfer)
Default
Power Sequence Reset Reset
Host Driver
Description
-This command indicates current status display described table below: IFPF[2:0] Interface Color Format 12-bits/pixel 16-bits/pixel 18-bits/pixel Reserved Others define invalid
Serial Mode
RDDCOLMOD (0CH)
Parallel Mode
RDDCOLMOD (0CH)
Legend
Command
Parameter
Display
Flow Chart
Send D[7:0]
Dummy Read
Action Mode
Send D[7:0]
Sequential transfer
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6.2.8. RDDIM (0DH): Read Display Image Mode
Inst Para RDDIM Parameter
RDDIM (Read Display Image Mode D/CX D17-8 INVON GCS2 GCS1 GCS0 (Code) (0DH)
Parameter VSSON NOTE: Don't care, VDDI DGND level
Restriction
Register Availability
Default
Status Power Sequence Reset Reset
Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Availability
Host Driver
Description
-This command indicates current status display described table below: Description Value Vertical scrolling VSSON Vertical Scrolling On/Off Vertical scrolling Future (Not used) Inversion INVON Inversion On/Off Inversion Future (Not used) Future (Not used) GCS2 "000" GC0, "001" GC1, GCS1 Gamma Curve Selection "010" GC2, GCS0 "011" GC3, "100" "111" defined
Default Value 0000_0000 (00h) 0000_0000 (00h) 0000_0000 (00h)
Serial Mode
RDDIM (0DH)
Parallel Mode
RDDIM (0DH)
Legend
Command
Parameter
Display
Flow Chart
Send D[7:0]
Dummy Read
Action Mode
Send D[7:0]
Sequential transfer
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6.2.9. RDDSM (0EH): Read Display Signal Mode
Inst Para RDDSM Parameter
RDDSM (Read Display Signal Mode) D/CX D17-8 (Code) (0EH)
Parameter TEON TELOM HSON NOTE: Don't care, VDDI DGND level
VSON PCKON DEON
-This command indicates current status display described table below: TEON TELOM Description HSON VSON PCKON DEON Description Tearing Effect Line On/Off Tearing effect line mode Horizontal Sync. (RGB I/F) On/Off Vertical Sync. (RGB I/F) On/Off Pixel Clock (PCLK, I/F) On/Off Data Enable (DE, I/F) On/Off Used Used Value mode1, mode2
Default
Status Power Sequence Reset Reset
Register Availability
Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Restriction
Availability Default Value 0000_0000 (00h) 0000_0000 (00h) 0000_0000 (00h)
Legend
Command
Serial Mode
RDDSM (0EH)
Parallel Mode
RDDSM (0EH)
Host Driver
Flow Chart Send D[7:0] Dummy Read
Parameter
Display
Action Mode
Send D[7:0]
Sequential transfer
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6.2.10. RDDSDR (0FH): Read Display Self-Diagnostic Result
Inst Para RDDSDR Parameter
RDDSDR (Read Display Self-Diagnostic Result) D/CX D17-8 FUND ATTD (Code) (0FH)
Parameter RELD NOTE: Don't care, VDDI DGND level
-This command indicates current status display described table below: RELD FUND ATTD Description Register Loading Detection Functionality Detection Chip Attachment Detection Display Glass Break Detection Used Used Used Used Value section 6.15.1 section 6.15.1 section 6.15.3 section 6.15.4
Description
Restriction Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Default
Status Power Sequence Reset Reset
Register Availability
Host Driver
Default Value 0000_0000 (00h) 0000_0000 (00h) 0000_0000 (00h)
Availability
Serial Mode
RDDSDR (0FH)
Parallel Mode
RDDSTR (0FH)
Legend
Command
Parameter
Display
Flow Chart
Send D[7:0]
Dummy Read
Action Mode
Send D[7:0]
Sequential transfer
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6.2.11. SLPIN (10H): Sleep
Inst Para SLPIN
SLPIN (Sleep D/CX D17-8 (Code) (10H)
Parameter NOTE: Don't care, VDDI DGND level
parameter
-This command causes module enter minimum power consumption mode. this mode DC/DC converter stopped, Internal display oscillator stopped, panel scanning stopped. Sleep VDDI 1.6V-3.6V
Blanking display (over 1frame display)
Gate Output Source Output VCOM Output Description Internal counter Internal Oscillator charge capacitors AVDD
2.6V-3.5V STOP
STOP STOP
DISCHARGE
Internal reset
Note: complete frame display (ex: continue 2-falling edges -MCU interface memory still working memory keeps contents -This command effect when module already sleep mode. Sleep Mode only exit Sleep Command (11H). Restriction will necessary wait 5msec before sending next command, this allow time supply voltages clock circuits stabilize. will necessary wait 120msec after sending Sleep command (when Sleep Mode) before Sleep command sent.
Register Availability
Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Availability Default Value Sleep mode Sleep mode Sleep mode
Default
Status Power Sequence Reset Reset
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takes about 120msec into Sleep mode (booster state) after SLPIN command issued. -The results booster check RDDST (09H) command Bit31.
SPLIN (10H)
Legend Stop DC/DC Converte Stop Internal Oscillator
Command
Flow Chart
Display whole blank screen (Automatic effect DISP ON/OFF Command)
Parameter
Display
Action Mode
Drain charge from panel
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Sleep
Sequential transfer
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6.2.12. SLPOUT (11H): Sleep
Inst Para SLPOUT
SLPOUT (Sleep Out) D/CX D17-8 (Code) (11H)
Parameter NOTE: Don't care, VDDI DGND level
Parameter
-This command turns sleep mode. this mode DC/DC converter enabled, Internal display oscillator started, panel scanning started. Sleep VDDI 1.6V-3.6V
STOP STOP
Internal Oscillator AVDD Description Internal counter Internal reset Gate Output Source Output VCOM Output Start
2.6V-3.5V
STOP
Start
Memory Contents Memory Contents
Blanking display (over 1frame display)
STOP
DISPON Availability Default Value Sleep mode Sleep mode Sleep mode
Note: complete frame display (ex: continue 2-falling edges -This command effect when module already sleep mode. Sleep Mode only exit Sleep Command (10H). will necessary wait 5msec before sending next command, this allow time supply voltages clock circuits stabilize. Restriction -DRIVER loads default values extended test command registers during this 5msec there cannot abnormal visual effect display image those default register values same when this load done when DRIVER already Sleep mode. -DRIVER doing self-diagnostic functions during this 5msec. also section 8.19. will necessary wait 120msec after sending Sleep command (when Sleep mode) before Sleep command sent
Register Availability
Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Default
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takes 120msec become Sleep mode (booster mode) after SLPOUT command issued. -The results booster checked RDDST (09H) command Bit31.
SLPOUT (11H) Start Internal Oscillator Start DC-DC Converter Charge Offset voltage Panel Display whole blank screen frames (Automatic effect DISP ON/OFF Display Memory contents accordance with current command
Legend
Command
Parameter
Display
Flow Chart
Action Mode Sequential transfer
Sleep
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6.2.13. PTLON (12H): Partial Display Mode
Inst Para PTLON
PTLON (Partial Display Mode D/CX D17-8 (Code) (12H)
Parameter NOTE: Don't care, VDDI DGND level
Parameter
-This command turns Partial mode. partial mode window described Partial Area command (30H) Description Restriction leave Partial mode, Normal Display Mode command (13H) should written. -There abnormal visual effect during mode change between Normal mode Partial mode This command effect when Partial mode active. Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep Availability
Default
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Flow Chart
Partial Area (30H)
Status Power Sequence Reset Reset
Register Availability
Default Value Normal Mode Normal Mode Normal Mode
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6.2.14. NORON (13H): Normal Display Mode
Inst Para NORON
NORON (Normal Display Mode D/CX D17-8 (Code) (13H)
Parameter NOTE: Don't care, VDDI DGND level
Parameter
-This command returns display normal mode. Description -Normal display mode means Partial mode off, Scroll mode Off. -Exit from NORON Partial mode command (12H) -There abnormal visual effect during mode change from Normal mode Partial mode Restriction -This command effect when Normal Display mode active. Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Register Availability
Flow Chart
-See Partial Area Vertical Scrolling Definition Descriptions details when this command
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Default
Status Power Sequence Reset Reset
Default Value Normal Mode Normal Mode Normal Mode
Availability
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6.2.15. INVOFF (20H): Display Inversion
Inst Para INVOFF
INVOFF (Display Inversion Off) D/CX D17-8 (Code) (20H)
Parameter NOTE: Don't care, VDDI DGND level
Parameter
-This command used recover from display inversion mode. -This command makes change contents frame memory. -This command does change other status.
Top-Left (0,0)
Description
Memory
Display
Restriction
-This command effect when module already inversion mode. Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Default Status Power Sequence Reset Reset
Register Availability
Availability Default Value Display Inversion Display Inversion Display Inversion
Legend
Command
(Example)
Display Inversion Mode
Parameter
Display
Flow Chart
INVOFF (20H)
Action Mode Sequential transfer
Display Inversion Mode
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6.2.16. INVON (21H): Display Inversion
Inst Para INVON
INVON (Display Inversion D/CX D17-8 (Code) (21H)
Parameter NOTE: Don't care, VDDI DGND level
Parameter
-This command used enter into display inversion mode -This command makes change contents frame memory. -This command does change other status. exit from Display Inversion Display Inversion command (20H) should written.
Memory
Restriction
-This command effect when module already Inversion mode. Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Register Availability Default Status Power Sequence Reset Reset
Display Availability Default Value Display Inversion Display Inversion Display Inversion
Description
Top-Left (0,0)
(Example)
Legend
Command
Display Inversion Mode
Parameter
Display
Flow Chart
INVON (21H)
Action Mode Sequential transfer
Display Inversion Mode
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6.2.17. GAMSET (26H): Gamma
Inst Para GAMSET
GAMSET (Gamma Set) D/CX D17-8 (Code) (26H)
Parameter NOTE: Don't care, VDDI DGND level
-This command used select desired Gamma curve current display. maximum curves selected. curves defined section 6.12. curve selected setting appropriate parameter described Table. [7:0] Description Parameter Curve Selected Gamma Curve (G2.2) Gamma Curve (G1.8) Gamma Curve (G2.5) Gamma Curve (G1.0)
Restriction
-Values [7:0] shown table above invalid will change current selected Gamma curve until valid received. Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep Availability
Default
Status Power Sequence Reset Reset
Register Availability
Note: other values undefined.
Default Value
-GAMSET (26H)
Legend
Command
Parameter
Display Flow Chart
Parameter: GC[7:0]
Action Mode Sequential transfer
Gamma Curve Loaded
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6.2.18. DISPOFF (28H): Display
Inst Para DISPOFF
DISPOFF (Display Off) D/CX D17-8 (Code) (28H)
Parameter NOTE: Don't care, VDDI DGND level
Parameter
-This command used enter into DISPLAY mode. this mode, output from Frame Memory disables blank page inserted. -This command makes change contents frame memory. -This command does change other status. -There will abnormal visible effect display. -Exit from this command Display (29H)
Top-Left (0,0)
Memory
Display Description VDDI Gate Output Source Output VCOM Output
Display 1.6V-3.6V 2.6V-3.5V STOP STOP Availability Default Value Display Display Display
(Example)
Blanking display (over frame display)
Internal counter Internal Oscillator AVDD Internal reset Note: complete frame display (ex: continue 2-falling edges Restriction -This command effect when module already Display mode. Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Register Availability
Default
Status Power Sequence Reset Reset
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Legend Display Mode
Command
Parameter DISPOFF (28H)
Display
Flow Chart
Action Mode Sequential transfer
Display Mode
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6.2.19. DISPON (29H): Display
Inst Para DISPON
DISPON (Display D/CX D17-8 (Code) (29H)
Parameter NOTE: Don't care, VDDI DGND level
Parameter
-This command used recover from DISPLAY mode. Output from Frame Memory enabled. -This command makes change contents frame memory. -This command does change other status.
Display
1.6V-3.6V 2.6V-3.5V
Memory Contents Memory Contents
Top-Left (0,0)
(Example)
Memory Display
Description Gate Output Source Output VCOM Output Internal counter
Blanking display (over frame display)
STOP Start STOP
Internal Oscillator AVDD Internal reset Note: complete frame display (ex: continue 2-falling edges
Restriction
-This command effect when module already Display mode. Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep Availability
Register Availability
Default
Status Power Sequence Reset Reset
VDDI
Default Value Display Display Display
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Legend Display Mode
Command
Parameter DISPON (29H)
Display
Flow Chart
Action Mode Sequential transfer
Display Mode
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6.2.20. CASET (2AH): Column Address
Inst Para CASET Parameter Parameter Parameter
CASET (Column Address Set) D/CX D17-8 XS15 XE15 XS14 XE14 XS13 XE13 XS12 XE12 XS11 XE11 XS10 XE10 (Code) (2AH)
Parameter NOTE: Don't care, VDDI DGND level
-This command used define area frame memory where access. -This command makes change other driver status. -Each value represents column line Frame Memory. -The value [15:0] [15:0] referred when RAMWR command comes.
(Example)
XS[15:0]
Description
[15:0] always must equal less than [15:0] 176x220 memory base (GM1, "00") (Parameter range: [15:0] [15:0] (00AFh)): MV="0" "XS" "XE" large then 175d, become 175d (Parameter range: [15:0] [15:0] 219d (00DBh)): MV="1" "XS" "XE" large then 219d, become 219d 176x176 memory base (GM1, "01") Restriction (Parameter range: [15:0] [15:0] (00AFh)): MV="0" "XS" "XE" large then 175d, become 175d (Parameter range: [15:0] [15:0] (00AFh)): MV="1" "XS" "XE" large then 175d, become 175d 176x132 memory base (GM1, "11") (Parameter range: [15:0] [15:0] (00AFh)): MV="0" "XS" "XE" large then 175d, become 175d (Parameter range: [15:0] [15:0] 131d (0083h)): MV="1" "XS" "XE" large then 131d, become 131d
Register Availability
Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
When [15:0] [15:0] greater than maximum address like below, data range will ignored.
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176x220 memory base (GM1, "00") Status Power Sequence Reset Reset [15:0] 0000h Default Value [15:0] (MV='0') [15:0] (MV='1') 00AFh (175d) 00AFh (175d) 00DBh (219d) 00AFh (175d) Default Value [15:0] (MV='0')
176x176 memory base (GM1, "01") Status Default Power Sequence Reset Reset [15:0] 0000h [15:0] (MV='1')
00AFh (175d)
176x132 memory base (GM1, "11") Status Power Sequence Reset Reset [15:0] 0000h Default Value [15:0] (MV='0') [15:0] (MV='1') 00AFh (175d) 00AFh (175d) 0083h (132d) 00AFh (175d)
Partial Mode
CASET (2AH)
Flow Chart
Parameter: YS[15:0]
RASET (2BH)
Parameter: XS[15:0]
Needed
Legend
Command
RAMWR (2CH)
Parameter
Display
Image Data D1[B:0],D2[B:0].Dn[B:0]
Action Mode
Note: B=17
Command
Sequential transfer
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6.2.21. RASET (2BH): Address
Inst Para RASET Parameter Parameter Parameter
RASET (Row Address Set) D/CX D17-8 YS15 YE15 YS14 YE14 YS13 YE13 YS12 YE12 YS11 YE11 YS10 YE10 (Code) (2BH)
Parameter NOTE: Don't care, VDDI DGND level
-This command used define area frame memory where access. -This command makes change other driver status. -Each value represents column line Frame Memory. -The value [15:0] [15:0] referred when RAMWR command comes.
Description
YS[15:0]
When [15:0] [15:0] greater than maximum address like below, data range will ignored. (Parameter range: [15:0] [15:0] (0DBh)): MV="0" "XS" "XE" large then 219d, become 219d (Parameter range: [15:0] [15:0] (00AFh)): MV="1" "XS" "XE" large then 175d, become 175d 176x176 memory base (GM1, "01") Restriction (Parameter range: [15:0] [15:0] (00AFh)): MV="0" "XS" "XE" large then 175d, become 175d (Parameter range: [15:0] [15:0] (00AFh)): MV="1" "XS" "XE" large then 175d, become 175d 176x132 memory base (GM1, "11") (Parameter range: [15:0] [15:0] (0083h)): MV="0" "XS" "XE" large then 131d, become 131d (Parameter range: [15:0] [15:0] (00AFh)): MV="1" "XS" "XE" large then 175d, become 175d
Register Availability
Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
176x220 memory base (GM1, "00")
[15:0] always must equal less than [15:0]
YE[15:0]
Availability
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(Example)
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176x220 memory base (GM1, "00") Status Power Sequence Reset Reset [15:0] 0000h Default Value [15:0] (MV='0') [15:0] (MV='1') 0DBh (219d) 0DBh (219d) 00AFh (175d) 0DBh (219d) Default Value [15:0] (MV='0')
176x176 memory base (GM1, "01") Status Default Power Sequence Reset Reset [15:0] 0000h [15:0] (MV='1')
00AFh (175d)
176x132 memory base (GM1, "11") Status Power Sequence Reset Reset [15:0] 0000h Default Value [15:0] (MV='0') [15:0] (MV='1') 0083h (131d) 0083h (131d) 00AFh (175d) 0083h (131d)
Partial Mode
CASET (2AH)
Needed
Flow Chart
Parameter: YS[15:0]
RASET (2BH)
Parameter: XS[15:0]
Needed
Legend RAMWR (2CH)
Command
Parameter Image Data D1[B:0],D2[B:0].Dn[B:0]
Display
Action Mode
Command
Note: B=17
Sequential transfer
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6.2.22. RAMWR (2CH): Memory Write
Inst Para RAMWR Parameter
RAMWR (Memory Write) D/CX D17-8 D17-8 (Code) (2CH)
Parameter D17-8 NOTE: Don't care, VDDI DGND level
-This command used transfer data from frame memory. -This command makes change other driver status. -When this command accepted, column register register reset Start Column/Start positions. -The Start Column/Start positions different accordance with MADCTR setting. (See section 6.6) -Then D[B:0] stored frame memory column register register incremented section 6.5.2. -Sending other command stop Frame Write.
Description
color modes, there restriction length parameters. 176x220 memory base (GM1, "00") 176x220x18-bits memory written this command Memory range: (0000h,0000h) (00AFh, 00DBh)
Register Availability
Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
176x132 memory base (GM1, "11") 176x220x18-bits memory written this command Memory range: (0000h,0000h) (00AFh, 0083h)
Restriction
176x176 memory base (GM1, "01") 176x220x18-bits memory written this command Memory range: (0000h,0000h) (00AFh, 00AFh)
Availability Default Value Contents memory randomly Contents memory cleared Contents memory cleared
Default
Status Power Sequence Reset Reset
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Legend RAMWR (2CH)
Command
Parameter
Flow Chart
Image Data D1[B:0],D2[B:0].Dn[B:0]
Display
Action Mode
Command
Sequential transfer
Note: B=17
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6.2.23. RGBSET (2DH): Colour Setting
Inst Para RGBSET Parameter
RGBSET (Colour Setting) D/CX D17-8 R007 Raa7 G007 Gbb7 B007 R006 Raa6 G006 Gbb6 B006 Bcc6 R005 Raa5 Gbb5 B005 Bcc5 R004 Raa4 G004 Gbb4 B004 Bcc4 R003 Raa3 G003 Gbb3 B003 Bcc3 R002 Raa2 G002 Gbb2 B002 Bcc2 R001 Raa1 G001 Gbb1 B001 Bcc1 R000 Raa0 G000 Gbb0 B000 Bcc0 (Code) (2DH)
-This command used define 12-bits-to-18-bits 16bits-to-18-bits colors depth conversations. -262K-colors used. -LUT total trough parameters. this condition, 4K-color (4-4-4) 65K-color(5-6-5) data input transferred 6(R)-6(G)-6(B) through table. (aa=31, bb=63, cc=31) -This command effect other commands/parameters Contents frame memory. Restriction send command before last data sent defined correctly. Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Description
-Visible change takes effect next time Frame Memory written
Default
Status Power Sequence Reset Reset
Register Availability
Default Value default value Contents look-up table protected default value
Availability
Parameter Bcc7 NOTE: Don't care, VDDI DGND level
Legend RGBSET (2DH)
Command
Parameter
Parameter: Flow Chart
Display
arameter:
Action Mode Sequential transfer
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6.2.24. RAMHD (2EH): Memory Read
Inst Para RAMHD Parameter Parameter
RAMHD (Memory Read) D/CX D17-8 D17-8 (Code) (2EH)
(N+1) Parameter D17-8 NOTE: Don't care, VDDI DGND level
-This command used transfer data from frame memory MCU. -This command makes change other driver status. -When this command accepted, column register register reset Start Column/Start positions. Description -Then D[B:0] read back from frame memory column register register incremented section 6.5.2. -Frame Read canceled sending other command. -See section "Data color coding" color coding (18-bits cases), when there used 18-bits data lines image data. -Memory read only possible parallel interface. Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Restriction
color modes, Frame Read always 18-bits there restriction length parameters.
Default
Status Power Sequence Reset Reset
Register Availability
Note: B=17
RAMRD (2EH) Legend Dummy Read
Flow Chart Command
-The Start Column/Start positions different accordance with MADCTR setting. (See section 6.7)
Default Value Contents memory randomly Contents memory cleared Contents memory cleared
Availability
Parameter
Display
Image Data D1[B:0],D2[B:0].Dn[B:0]
Action Mode Sequential transfer
Command
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6.2.25. PTLAR (30H): Partial Area
Inst Para PTLAR Parameter Parameter Parameter
PTLAR (Partial Area) D/CX D17-8 PSL15 PSL7 PEL15 PSL14 PSL6 PEL14 PEL6 PSL13 PSL5 PEL13 PEL5 PSL12 PSL4 PEL12 PEL4 PSL11 PSL3 PEL11 PEL3 PSL10 PSL2 PEL10 PEL2 PSL9 PSL1 PEL9 PEL1 PSL8 PSL0 PEL8 PEL0 (Code) (30H)
Parameter PEL7 NOTE: Don't care, VDDI DGND level
-This command defines partial mode's display area. -There parameters associated with this command, first defines Start (PSL) second (PEL), illustrated figures below. refer Frame Memory address counter.
Start [15:0]
Non-displaying Area
[15:0]
Non-displaying Area
Start Row, when MADCTL ML='1'
Description
[15:0]
Non-displaying Area Partial Display Area
[15:0]
Start
Non-displaying Area
Start Row, when MADCTL ML='0'
[15:0] Non-displaying Area [15:0] Start Partial Display Area Partial Display Area
Start then Partial Area will deep.
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Start Row, when MADCTL ML='0'
Partial Display Area
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-PEL [15:0] always must equal less than [15:0] -When [15:0] [15:0] greater than maximum address like below, data range will ignored. 176x220 memory base (GM1, "00") (Parameter range: [15:0] [15:0] (0DBh)) "PSL" "PEL" large then 219d, become 219d Restriction 176x176 memory base (GM1, "01") (Parameter range: [15:0] [15:0] (00AFh)) "PSL" "PEL" large then 176d, become 176d 176x132 memory base (GM1, "11") (Parameter range: [15:0] [15:0] (0083h)) "PSL" "PEL" large then 131d, become 131d
176x220 memory base (GM1, "00") Status Power Sequence Reset Reset
[15:0] 0000h [15:0] 0000h [15:0] 0000h
Register Availability
Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Availability
Default Value [15:0] 00DBh
176x176 memory base (GM1, "01") Status Default
Default Value [15:0] 00AFh
176x132 memory base (GM1, "11") Status Default Value [15:0] 0083h
Power Sequence Reset Reset
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Power Sequence Reset Reset
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Enter Partial Mode
PTLAR (30H)
Parameter: PSL[15:0] Parameter: PEL[15:0] Flow Chart
Exit Partial Mode
Partial Mode DISPOFF (28H) NORON (13H) Partial Mode Optional prevent tearing effect image display Legend
Command
PTLON (12H) RAMRW (2CH) Partial Mode
Parameter
Display
DISON (29H)
Image Data D1[B:0],D2[B:0]. .Dn[B:0]
Action Mode Sequential transfer
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Note: B=17
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6.2.26. SCRLAR (33H): Scroll Area
Inst Para SCRLAR Parameter Parameter Parameter Parameter Parameter
SCRLAR (Scroll Area) D/CX D17-8 TFA15 TFA7 VSA7 BFA15 TFA14 TFA6 VSA6 BFA14 BFA6 TFA13 TFA5 VSA5 BFA13 BFA5 TFA12 TFA4 VSA4 BFA12 BFA4 TFA11 TFA3 VSA3 BFA11 BFA3 TFA10 TFA2 VSA2 BFA10 BFA2 TFA9 TFA1 VSA9 VSA1 BFA9 BFA1 TFA8 TFA0 VSA8 VSA0 BFA8 BFA0 (Code) (33H)
VSA15 VSA14 VSA13 VSA12 VSA11 VSA10
Parameter BFA7 NOTE: Don't care, VDDI DGND level
-When MADCTR ML=0
Top-Left (0,0)
Fixed Area [15:0]
parameter [15:0] describes Bottom Fixed Area lines from Bottom Frame Memory Display). TFA, refer Frame Memory address.
Scroll Fixed Area
Description -When MADCTR ML=1 parameter [15:0] describes Fixed Area lines from Bottom Frame Memory Display). parameter [15:0] describes height Vertical Scrolling Area lines Frame Memory [not display] from Vertical Scrolling Start Address) first line appears immediately after most line Fixed Area. parameter [15:0] describes Bottom Fixed Area lines from Frame Memory Display).
Top-Left (0,0)
VSFA [15:0]
Bottom Fixed Area [15:0]
Bottom Fixed Area [15:0] Scroll Fixed Area VSFA [15:0] Fixed Area [15:0] First line read from frame memory
-See Section 6.5.4 details Memory Display Mapping.
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parameter [15:0] describes Fixed Area lines from Frame Memory Display). parameter [15:0] describes height Vertical Scrolling Area lines Frame Memory [not display] from Vertical Scrolling Start Address) first line appears immediately after bottom most line Fixed Area.
-This command defines Vertical Scrolling Area display.
First line read from frame memory
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176x220 memory base (GM1, "00") -The condition (TFA+VSA+BFA) 220, otherwise Scrolling mode undefined. 176x176 memory base (GM1, "01") Restriction -The condition (TFA+VSA+BFA) 176, otherwise Scrolling mode undefined. 176x132 memory base (GM1, "11") -The condition (TFA+VSA+BFA) 132, otherwise Scrolling mode undefined. Vertical Scroll Mode, MADCTR parameter should `0'-this only affects Frame Memory Write. Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep 176x220 memory base (GM1, "00") Status Power Sequence Reset Reset 176x176 memory base (GM1, "01") Status Default Power Sequence Reset Reset [15:0] 0000h Availability
Register Availability
[15:0] 0000h [15:0] 0000h
Default Value [15:0] 00DCh
[15:0] 0000h
Default Value [15:0] 00B0h
[15:0] 0000h
176x132 memory base (GM1, "11")
Status
Default Value [15:0] 0084h
[15:0] 0000h
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Power Sequence Reset Reset
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Enter Vertical Scroll Mode
Normal Mode SCRLAR (33H) Parameter: TFA[15:0] Parameter VSA[15:0] Parameter BFA[15:0] Legend
Command
Parameter
Display
Action Mode Sequential transfer
Parameter XS[15:0] Parameter XE[15:0] RASET (2BH)
Redefines Frame Memory Window that scroll data will written NOTE Optional necessary redefine Frame Memory Write Direction.
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Parameter YS[15:0] Parameter YE[15:0]
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Parameter: MY,MX,MV,ML,RGB RAMRW (2CH) Scroll Image Data VSCSAD (37H) Parameter SSA[15:0] Scroll Mode
NOTE: Frame Memory Window size must defined correctly otherwise undesirable image will displayed.
Flow Chart
Only required non-rolling scrolling
MADCTR (36H)
Preliminary
SPFD54126B
Continuous Scroll
Normal Mode CASET (2AH)
Legend
Command
Parameter
Display
Parameter XS[15:0]
Action Mode Sequential transfer
Parameter XE[15:0] RASET (2BH)
RAMRW (2CH) Only required non-rolling scrolling Scroll Image Data
Flow Chart
Parameter SSA[15:0]
Exit Vertical Scroll Mode
Scroll Mode DISOFF (28H) NORON (13H) PTLON (12H) Scroll Mode RAMRW (2CH) Image Data D1[B:0],D2[B:0]. .Dn[B:0] DISON (29H) OptionTo prevent Tearing Effect Image Display
Note: B=17 Note: Scroll Mode exit both Normal Display Mode (13H) Partial Mode (12H) commands.
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VSCSAD (37H)
Parameter YE[15:0]
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Parameter YS[15:0]
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SPFD54126B
6.2.27. TEOFF (34H): Tearing Effect Line
Inst Para TEOFF
TEOFF (Tearing Effect Line OFF) D/CX D17-8 (Code) (34H)
Parameter NOTE: Don't care, VDDI DGND level
Parameter
Description Restriction
-This command used turn (Active Low) Tearing Effect output signal from signal line. -This command effect when Tearing Effect output already OFF.
Status Default Power Sequence Reset Reset
Default Value RCM1, RCM0 "00", "1x" RCM1, RCM0 "01"
Register Availability
Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Availability
Legend
Command
Line Output
Parameter
Display
Flow Chart
TEOFF (34H)
Action Mode Sequential transfer
Line Output
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6.2.28. TEON (35H): Tearing Effect Line
Inst Para TEON
TEON (Tearing Effect Line D/CX D17-8 TELOM (Code) (35H)
Parameter NOTE: Don't care, VDDI DGND level
-This command used turn Tearing Effect output signal from signal line. -This output affected changing MADCTR -The Tearing Effect Line parameter, which describes mode Tearing Effect Output Line. ("-"=Don't Care). When M='0': Tearing Effect Output line consists V-Blanking information only.
Description
Vertical time scale
When M='1':
Tearing Effect Output line consists both V-Blanking H-Blinking information.
tvdl
tvdl
Availability
tvdh
tvdh
Note: During Sleep Mode with Tearing Effect Line Tearing Effect Output will active Low.
Register Availability
Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Status
Restriction
-This command effect when Tearing Effect output already OFF.
Vertical time scale
Default Value RCM1, RCM0 "00", "1x" RCM1, RCM0 "01" TELOM=0 TELOM=0
Default
Power Sequence Reset Reset
Legend Line Output
Command
Parameter
Flow Chart
TEON (35H) Parameter: TELOM
Display
Action Mode Sequential transfer
Line Output
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6.2.29. MADCTR (36H): Memory Data Access Control
Inst Para MADCTR
MADCTR (Memory Data Access Control) D/CX D17-8 (Code) (36H)
Parameter NOTE: Don't care, VDDI DGND level
-This command defines read/ write scanning direction frame memory. -This command makes change other driver status. -Bit Assignment NAME Address Order Column Address Order Row/Column Exchange Vertical Refresh Order RGB-BGR ORDER DESCRIPTION
Vertical Refresh Order
Top-Left (0,0)
Memory
Sent First Sent Sent Sent Last Sent Last Sent Sent Sent First
Description
Top-Left (0,0)
Memory
ML='0'
ML='1'
RGB: RGB-BGR Order RGB="0" Driver
vertical refresh direction control vertical refresh Bottom vertical refresh Bottom Color selector switch control =RGB color filter panel, =BGR color filter panel)
Display
Display
These 3bits controls memory write/read direction. (See Section 8.11)
RGB="1" Driver
Panel
Panel
Restriction
parameter "00" internally.
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Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep Availability
Register Availability
Default
Status Power Sequence Reset Reset
Default Value MY=0,MX=0,MV=0,ML=0,RGB=0, Change MY=0,MX=0,MV=0,ML=0,RGB=0,
Legend
Command
MADCTR (36H)
Flow Chart
Parameter
Display
Parameter:
Action Mode Sequential transfer
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6.2.30. VSCSAD (37H): Vertical Scroll Start Address
Inst Para VSCSAD Parameter
VSCSAD (Vertical Scroll Start Address RAM) D/CX D17-8 SSA6 SSA5 SSA4 SSA3 SSA2 SSA9 SSA1 SSA8 SSA0 (Code) (37h)
SSA15 SSA14 SSA13 SSA12 SSA11 SSA10
Parameter SSA7 NOTE: Don't care, VDDI DGND level
-This command used together with Vertical Scrolling Definition (33h). These commands describe scrolling area scrolling mode. -The Vertical Scrolling Start Address command parameter which describes which line Frame Memory will written first line after last line Fixed Area display illustrated below: -Exit from V-scrolling mode commands Partial mode (12h) Normal mode (13h).
(Example)
Memory
Top-Left (0,0)
Scan address Scan address
When MADCTR Example: When Fixed Area=Bottom Fixed Area=00, Vertical Scrolling Area=220 Vertical Scrolling Pointer SSA= '3'.
G159 G160 G159 G160
-This command Start scrolling.
Display
When MADCTR Example: When Fixed Area= Bottom Fixed Area=00, Vertical Scrolling Area=220 SSA=
(Example)
Top-Left (0,0)
Description
Memory
SSA[15:0] Scroll start address
Display
SSA[15:0] Scroll start address
NOTE: -When Pointer position Picture Data sent, result display will happen next Panel Scan avoid tearing effect. -SSA refers Frame Memory scan address.
-Since value Vertical Scrolling Start Address absolute (with reference Frame Memory), must enter fixed area (defined Vertical Scrolling Definition (33h)-otherwise undesirable image will displayed Panel. Restriction SSA[15:0] based 1-line unit. -SSA[15:0] 0000h, 0001h, 0002h, 0003h, 00A1h
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Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep Availability
Register Availability
Default
Status Power Sequence Reset Reset Vertical Scrolling Definition (33h) description.
Default Value 0000h 0000h 0000h
Flow Chart
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6.2.31. IDMOFF (38H): Idle Mode
Inst Para IDMOFF
IDMOFF (Idle Mode Off) D/CX D17-8 (Code) (38H)
Parameter NOTE: Don't care, VDDI DGND level
Parameter
-This command used recover from Idle mode -There will abnormal visible effect display mode change transition. Description idle mode, display 262k -colors. Normal frame frequency applied.
Register Availability
Default
Status Power Sequence Reset Reset
Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Restriction
-This command effect when module already idle mode.
Availability
Default Value Idle Mode Idle Mode Idle Mode
Legend
Command
Idle mode
Parameter
Display
Flow Chart
IDMOFF (38)
Action Idle mode Mode Sequential transfer
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6.2.32. IDMON (39H): Idle Mode
Inst Para IDMON
IDMON (Idle Mode D/CX D17-8 (Code) (39H)
Parameter NOTE: Don't care, VDDI DGND level
Parameter
-This command used enter into Idle mode -There will abnormal visible effect display mode change transition. idle mode, Color expression reduced. primary secondary colors using each Frame Memory, color depth data displayed. 8-Color mode frame frequency applied. Exit from IDMON Idle Mode (38H) command
Top-Left (0,0)
Memory
This command effect when module already idle mode. Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep Status Power Sequence Reset Reset Availability Default Value Idle Mode Idle Mode Idle Mode
Description
Display Don't care 0xxxxx 1xxxxx 0xxxxx 1xxxxx 0xxxxx 1xxxxx 0xxxxx 1xxxxx
(Example)
Restriction
Register Availability
Default
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Color Black Blue Magenta Green Cyan Yellow White
0xxxxx 0xxxxx 1xxxxx 1xxxxx 0xxxxx 0xxxxx 1xxxxx 1xxxxx
0xxxxx 0xxxxx 0xxxxx 0xxxxx 1xxxxx 1xxxxx 1xxxxx 1xxxxx
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Legend
Command
Idle mode
Parameter
Display
Flow Chart
IDMOFF (39)
Action Mode
Idle mode Sequential transfer
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6.2.33. COLMOD (3AH): Interface Pixel Format
Inst Para COLMOD
COLMOD (Interface Pixel Format) D/CX D17-8 VIPF2 VIPF1 VIPF0 IFPF2 IFPF1 IFPF0 (Code) (3AH)
Parameter VIPF3 NOTE: Don't care, VDDI DGND level Description
Register Availability
Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Restriction
There visible effect until Frame Memory written Availability
Status Default Power Sequence Reset Reset Example:
Interface Color Format 16-bits/pixel (1-times data transfer) 18-bits/pixel (1-times data transfer) Reserved 18-bits/pixel (3-times data transfer) Others define invalid Note1: 12-bits/Pixel, 16-bits/Pixel 18-bits/Pixel mode, applied transfer data into Frame Memory. Note2: When 12-bit/pixel don't care Note When VIPF[3:0]="1110",6-bits data width 3-times transfer used transmit pixel data with 18-bits color depth information.
VIPF[3:0] 0101 0110 0111 1110
Default Value IFPF[2:0] VIPF[3:0] 0101 (16-bits/pixel) 0110 (18-bits/pixel) Change Change 0101 (16-bits/pixel) 0110 (18-bits/pixel)
This command used define format picture data, which transferred interface interface. formats shown table: IFPF[2:0] Interface Color Format 12-bits/pixel 16-bits/pixel 18-bits/pixel Reserved Others define invalid
Legend 16-bits/Pixel Mode
Command
Parameter
COLMOD (3AH) Flow Chart Parameter
Display
Action Mode Sequential transfer
18-bits/Pixel Mode
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6.2.34. RDID1 (DAH): Read Value
Inst Para RDID1 Parameter
RDID1 (Read Value) D/CX D17-8 ID16 ID15 ID14 ID13 ID12 ID11 ID10 (Code) (DAH)
Parameter ID17 NOTE: Don't care, VDDI DGND level
-This read byte returns 8-bits module's manufacturer Description -The parameter dummy data -The parameter (ID17 ID10): module's manufacturer NOTE: command RDDID (04H), parameter.
Register Availability
Default
Status Power Sequence Reset Reset
RDID1 (DAH)
Dummy Read
Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Restriction
Availability
Default Value
Serial Mode
Partial Mode
Host Driver
Legend
Command
RDID1 (DAH)
Parameter
Display
Flow Chart
Send parameter: ID1[7:0]
Action Mode
Send parameter: ID1[7:0]
Sequential transfer
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6.2.35. RDID2 (DBH): Read Value
Inst Para RDID2 Parameter
RDID2 (Read Value) D/CX D17-8 ID26 ID25 ID24 ID23 ID22 ID21 ID20 (Code) (DBH)
Parameter ID27 NOTE: Don't care, VDDI DGND level
-This read byte returns 8-bits module/driver version Description -The parameter dummy data -The parameter (ID26 ID20): module/driver version NOTE: command RDDID (04H), parameter.
Register Availability
Default
Status Power Sequence Reset Reset
Partial Mode
RDID2 (DBH)
Dummy Read Send parameter: ID2[7:0]
Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Restriction
Availability
Default Value
Serial Mode
RDID2 (DBH)
Legend
Command
Host Driver
Parameter
Display
Flow Chart
Send parameter: ID2[7:0]
Action Mode Sequential transfer
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6.2.36. RDID3 (DCH): Read Value
Inst Para RDID3 Parameter
RDID3 (Read Value) D/CX D17-8 ID36 ID35 ID34 ID33 ID32 ID31 ID30 (Code) (DCH)
Parameter ID37 NOTE: Don't care, VDDI DGND level
-This read byte returns 8-bits module/driver Description -The parameter dummy data -The parameter (ID37 ID30): module/driver NOTE: command RDDID (04H), parameter.
Register Availability
Default
Status Power Sequence Reset Reset
RDID3 (DCH)
Dummy Read
Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Restriction
Availability
Default Value
Serial Mode
RDID3 (DCH)
Flow Chart
Partial Mode
Host Driver
Legend
Command
Parameter
Display
Send parameter: ID3[7:0]
Action Mode
Send parameter: ID3[7:0]
Sequential transfer
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6.2.37. SRGBOFF (AAH): Separate Gamma
Inst Para SRGBOFF
SRGBOFF (Separate Gamma OFF) D/CX D17-8 (Code) (AAH)
Parameter NOTE: Don't care, VDDI DGND level
Parameter
Description Restriction
-This command used turn separate gamma function. -This command effect when separate gamma function OFF.
Status Default Power Sequence Reset Reset
Default Value RCM1, RCM0 "00", "1x" RCM1, RCM0 "01"
Register Availability
Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Availability
Legend
Command
Separate gamma
Parameter
Display
Flow Chart
SRGBOFF (AAH)
Action Mode Sequential transfer
Separate gamma
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6.2.38. SRGBOFF (ABH): Separate Gamma
Inst Para SRGBON
SRGBOFF (Separate Gamma D/CX D17-8 (Code) (ABH)
Parameter NOTE: Don't care, VDDI DGND level
Parameter
Description Restriction
-This command used turn separate gamma function. this mode, only gamma curve (GC0) separated gamma curve -This command effect when separate gamma function
Status Default Power Sequence Reset Reset
Register Availability
Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Availability
Default Value RCM1, RCM0 "00", "1x" RCM1, RCM0 "01"
Separate gamma
Legend
Command
Parameter
Display
Flow Chart
SRGBON (ABH)
Action Separate gamma Mode Sequential transfer
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6.2.39. VSYNCOFF (ACH): VSYNC Interface
Inst Para VSYNCOFF
VSYNCOFF (VSYNC Interface OFF) D/CX D17-8 (Code) (ACH)
Parameter NOTE: Don't care, VDDI DGND level
Parameter
Description Restriction
-This command used turn VSYNC interface function. -This command effect when VSYNC interface OFF. -Input signal more than frame period after turn VSYNC
Status Default Power Sequence Reset Reset
Register Availability
Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Availability
Default Value RCM1, RCM0 "00", "1x" RCM1, RCM0 "01"
VSYNC Interface function
Legend
Command
VSYNCOFF (ACH) Wait more than frame
Parameter
Display
Flow Chart
Action Mode Sequential transfer
VSYNC Interface function
Input signal more than frame period after turn VSYNC
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6.2.40. VSYNCON (ADH): VSYNC Interface
Inst Para VSYNCON
VSYNCOFF (VSYNC Interface D/CX D17-8 (Code) (ADH)
Parameter NOTE: Don't care, VDDI DGND level
Parameter
Description Restriction
-This command used turn VSYNC interface function. -This command effect when VSYNC interface -Input signal before turn VSYNC
Status Default Power Sequence Reset Reset
Register Availability
Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Availability
Default Value RCM1, RCM0 "00", "1x" RCM1, RCM0 "01"
VSYNC Interface function
Legend
Command
VSYNCON (ADH) Wait more than frame
Parameter
Display
Flow Chart
Action Mode
VSYNC Interface function Sequential transfer
Note: Input signal before turn VSYNC
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6.2.41. VSCTR1 (AEH): VSYNC Interface function control
Inst Para VSCTR1
VSYNCTR1 (VSYNC Interface function control D/CX D17-8 (Code) (AEH)
Parameter VSFP3 VSFP2 VSFP1 VSFP0 VSBP3 VSBP2 VSBP1 VSBP0 NOTE: Don't care, VDDI DGND level
-Set back porch front porch VSYNC interface. setting becomes effective soon command received. -VSFP: Front porch VSYNC -VSBP: Back porch VSYNC VSBP[3:0] Front porch period (Line) VSFP[3:0] 0000 Setting inhibited 0001 Setting inhibited 0010 2-lines 0011 3-lines 0100 4-lines 0101 5-lines 0110 6-lines 0111 7-lines 1000 8-lines 1001 9-lines 1010 10-lines 1011 11-lines 1100 12-lines 1101 13-lines 1110 14-lines 1111 Setting inhibited
Description
Register Availability
Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Restriction
-The command enabled VSYNCON (ADH) Availability
Status Default Power Sequence Reset Reset VSFP[3:0] Change
Setting inhibited Setting inhibited 2-lines 3-lines 4-lines 5-lines 6-lines 7-lines 8-lines 9-lines 10-lines 11-lines 12-lines 13-lines 14-lines Setting inhibited
Default Value VSBP[3:0] Change
Back porch period (Line)
-VSCTR1 (AEH)
Legend
Command
Parameter
Display Flow Chart
Parameter: VSFP[3:0], VSBP[3:0]
Action Mode Sequential transfer
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6.3. Panel Command Description 6.3.1. RGBCTR (B0H): signal control
Inst Para RGBCTR
RGBCTR (RGB signal control) D/CX D17-8 (Code) (B0H)
Parameter NOTE: Don't care, VDDI DGND level
-Set operation status interface. setting becomes effective soon command received. -ICM: GRAM Write/Read frequency data input select interface Write/ Read frequency input data select Write cycle Read cycle Data input PCLK PCLK D[B:0] Internal oscillator B=17 Description Symbol Name PCLK polarity Enable polarity Hsync polarity Vsync polarity Clock polarity Interface data fetched falling edge data fetched rising edge enable interface High enable interface High level sync clock level sync clock High level sync clock level sync clock
this register using register need reserved. Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Restriction
Register Availability
Status Default Power Sequence Reset Reset
Default Value DP/EP/HSP/VSP 0d/0d/0d/0d 0d/0d/0d/0d 0d/0d/0d/0d
-RGBCTR (B0H)
Availability
Legend
Command
Parameter
Display Flow Chart
Parameter: ICM, HSP,
Action Mode Sequential transfer
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SPFD54126B
6.3.2. FRMCTR1 (B1h): Frame Rate Control normal mode/ Full colors)
Inst Para FRMCTR1 Parameter Parameter Parameter NOTE: Don't care
FRMCTR1 (Frame Rate Control) D/CX D17-8 FP0[3] BP0[3] RTN0 FP0[2] BP0[2] RTN0 FP0[1] BP0[1] RTN0 FP0[0] BP0[0] RTN0 (Code) (B1h)
-Set frame frequency full colors normal mode interface. -The default vaule BP0, FP0, RTN0 frame frequency 65Hz ±5%. FP0[3:0] BP0[3:0] Amount Front Porch
Description
RTN0[3:0] Restriction
this register using register need reserved. Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep Availability
Register Availability
Status Default Power Sequence Reset Reset
Amount Back Porch
clock line
Default Value RTN0
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Apr. 2006 Preliminary Version:
Preliminary
SPFD54126B
-FRMCTR1 (B1h) Legend
Command
Parameter
Display Flow Chart Parameter: [3:0] Parameter: [3:0] Parameter: RTN0 [3:0]
Action Mode Sequential transfer
ORISE Technology Co., Ltd. Proprietary Confidential
Apr. 2006 Preliminary Version:
Preliminary
SPFD54126B
6.3.3. FRMCTR2 (B2h): Frame Rate Control Idle mode/ 8-colors)
Inst Para FRMCTR2 Parameter Parameter Paramete NOTE: Don't care
FRMCTR2 (Frame Rate Control) D/CX D17-8 FP1[3] BP1[3] RTN1 FP1[2] BP1[2] RTN1 FP1[1] BP1[1] RTN1 FP1[0] BP1[0] RTN1 (Code) (B2h)
-Set frame frequency Idle mode interface. -The default vaule BP1, FP1, RTN1 frame frequency 70Hz ±5%. FP1[3:0] BP1[3:0] Amount Front Porch
Description
RTN1[3:0] Restriction
this register using register need reserved. Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep Availability
Register Availability
Status Default Power Sequence Reset Reset
Amount Back Porch
clock line
Default Value RTN1
ORISE Technology Co., Ltd. Proprietary Confidential
Apr. 2006 Preliminary Version:
Preliminary
SPFD54126B
-FRMCTR2 (B2h) Legend
Command
Parameter
Display Flow Chart Parameter: [3:0] Parameter: [3:0] Parameter: RTN1 [3:0]
Action Mode Sequential transfer
ORISE Technology Co., Ltd. Proprietary Confidential
Apr. 2006 Preliminary Version:
Preliminary
SPFD54126B
6.3.4. FRMCTR3 (B3h): Frame Rate Control Partial mode/ full colors)
Inst Para FRMCTR3 Parameter Parameter Parameter NOTE: Don't care
FRMCTR3 (Frame Rate Control) D/CX D17-8 FP2[3] BP2[3] RTN2 FP2[2] BP2[2] RTN2 FP2[1] BP2[1] RTN2 FP2[0] BP2[0] RTN2 (Code) (B3h)
-Set frame frequency Partial mode/ full colors interface. -The default vaule BP2, FP2, RTN2 frame frequency 70Hz with frame inversion
Description
BP2[3:0]
RTN2[3:0] Restriction
this register using register need reserved. Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep Availability
Register Availability
Status Default Power Sequence Reset Reset
FP2[3:0]
Amount Front Porch Amount Back Porch
clock line
Default Value RTN2
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Apr. 2006 Preliminary Version:
65Hz with line inversion this mode
Preliminary
SPFD54126B
-FRMCTR3 (B3h) Legend
Command
Parameter
Display Flow Chart Parameter: [3:0] Parameter: [3:0] Parameter: RTN2 [3:0]
Action Mode Sequential transfer
ORISE Technology Co., Ltd. Proprietary Confidential
Apr. 2006 Preliminary Version:
Preliminary
SPFD54126B
6.3.5. INVCTR (B4h): Display Inversion Control
Inst Para INVCTR
INVCTR (Display Inversion Control) D/CX D17-8 (Code) (B4h)
Parameter NOTE: Don't care, VDDI DGND level
-Display Inversion mode control -NLA: Inversion setting full colors normal mode (Normal mode Inversion setting full colours normal mode Line Inversion Frame Inversion -NLB: Inversion setting Idle mode (Idle mode Inversion setting Idle mode Line Inversion Frame Inversion
Description
Restriction
this register using register need reserved. Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep Availability
Status Default Power Sequence Reset Reset
Register Availability
-NLC: Inversion setting full colors partial mode (Partial mode Idle mode off) Inversion setting full colours partial mode Line Inversion Frame Inversion
Default Value
-INVCTR (B4h)
Legend
Command
Parameter
Display Flow Chart Parameter:
Action Mode Sequential transfer
NLA, NLB,
ORISE Technology Co., Ltd. Proprietary Confidential
Apr. 2006 Preliminary Version:
Preliminary
SPFD54126B
6.3.6. RGBBPCTR (B5h): Interface Blanking Porch setting
Inst Para RGBBPCTR Parameter NOTE: Don't care
RGBPSET (RGB Interface Blanking Porch setting) D/CX D17-8 (Code) (B5h)
VBP[3] VBP[2] VBP[1] VBP[0]
-Set blanking porch interface VBP[3:0] Amount Back Porch interface
Description
Restriction
this register using register need reserved. Status Normal Mode Idle Mode Off, Sleep Normal Mode Idle Mode Sleep Partial Mode Idle Mode Off, Sleep Partial Mode Idle Mode Sleep Sleep
Status Default Power Sequence Reset Reset
Register Availability
-RGBBPCTR (B3h)
Default Value
Availability
Legend
Command
Parameter
Display Flow Chart Parameter: [3:0]
Action Mode Sequential transfer
ORISE Technology Co., Ltd. Proprietary Confidential
Apr. 2006 Preliminary Version:
Preliminary
SPFD54126B
6.3.7. DISSET5 (B6h): Display Function
Inst Para DISSET5 Parameter Parameter NOTE: Don't care
DISSET (Display Function D/CX D17-8 SDT1 PTG1 STD0 PTG0 (Code) (B6h)
parameter: output waveform relation. -NO[1:0]: amount non-overlap gate output NO[1:0] Amount non-overlap gate output Refer Internal oscillator Refer PCLK clock cycle clock cycle clock cycle clock cycle clock cycle clock cycle clock cycle clock cycle -SDT[1:0]: delay amount from gate signal falling edge source output. SDT[1:0] Amount non-overlap source output Refer Internal oscillator Refer PCLK clock cycle clock cycle clock cycle clock cycle clock cycle clock cycle clock cycle clock cycle -EQ[1:0]: Equalizing period EQ[1:0] period Refer Internal oscillator clock cycle clock cycle clock cycle
Descr
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