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Kbit Kbit low-voltage EPROM supply voltage read operation Access


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M27W512
Kbit Kbit low-voltage EPROM
supply voltage read operation Access time: compatibility with M27C512 power consumption Standby current Active current Programming time µs/byte High reliability CMOS technology 2000 protection latch-up protection immunity Electronic signature Manufacturer code: Device code: ECOPACK® packages
PLCC32
June 2008
1/22
www.st.com
Contents
M27W512
Contents
Description Device operation
Read mode Standby mode line output control System considerations Programming PRESTO programming algorithm Program inhibit Program verify Electronic signature
Maximum rating parameters Package mechanical data Part numbering Revision history
2/22
M27W512
List tables
List tables
Table Table Table Table Table Table Table Table Table Table Table Table Table Table Signal names Operating modes Electronic signature Absolute maximum ratings measurement conditions. Capacitance Read mode characteristics Read mode characteristics Programming mode characteristics Margin mode characteristics Programming mode characteristics PLCC32 lead plastic leaded chip carrier, package mechanical data. Ordering information scheme Document revision history
3/22
List figures
M27W512
List figures
Figure Figure Figure Figure Figure Figure Figure Figure Figure Logic diagram connections Programming flowchart testing input output waveform testing load circuit Read mode waveforms Margin mode waveforms Programming verify mode waveforms PLCC32 lead plastic leaded chip carrier, package outline
4/22
M27W512
Description
Description
M27W512 low-voltage, Kbit (one-time programmable) EPROM. ideally suited microprocessor systems organized 65536 bits. M27W512 operates read mode with supply voltage temperature range. decrease operating power allows either reduction size battery increase time between battery recharges. applications where content programmed only time erasure required, M27W512 offered PLCC32 packages. Figure Logic diagram
A0-A15
Q0-Q7
GVPP
M27W512
AI01584
5/22
Description Table Signal names
Function Address inputs Data outputs Chip Enable Output Enable Program supply Supply voltage Ground connected internally Don't
M27W512
Signal names A0-A15 Q0-Q7 GVPP
Figure
connections
GVPP M27W512
AI01585
6/22
M27W512
Device operation
Device operation
modes operations M27W512 listed Table Operating modes. single power supply required read mode. inputs levels except GVPP Electronic Signature.
Read mode
M27W512 control functions, both which must logically active order obtain data outputs. Chip Enable power control should used device selection. Output Enable output control should used gate data output pins, independent device selection. Assuming that addresses stable, address access time (tAVQV) equal delay from output (tELQV). Data available output after delay tGLQV from falling edge assuming that been addresses have been stable least tAVQV-tGLQV.
Standby mode
M27W512 standby mode which reduces supply current from 15mA 15µA with voltage operation 3.6V, Table Read mode characteristics. Characteristics table details. M27W512 placed standby mode applying CMOS high signal input. When standby mode, outputs high impedance state, independent GVPP input. Table Operating modes(1)
Mode Read Output Disable Program Program Inhibit Standby Electronic Signature
VIL, 0.5V.
Pulse
GVPP
Q7-Q0 Data Hi-Z Data Hi-Z Hi-Z Codes
Table
Electronic signature
data
Identifier Manufacturer code Device code
7/22
Device operation
M27W512
line output control
Because EPROMs usually used larger memory arrays, product features line control function which accommodates multiple memory connection. line control function allows:
lowest possible memory power dissipation Complete assurance that output contention will occur.
most efficient these control lines, should decoded used primary device selecting function, while should made common connection devices array connected READ line from system control bus. This ensures that deselected memory devices their power standby mode that output pins only active when data required from particular memory device.
System considerations
power switching characteristics Advanced CMOS EPROMs require careful decoupling devices. supply current, ICC, three segments that interest system designer: standby current level, active current level, transient current peaks that produced falling rising edges magnitude transient current peaks dependent capacitive inductive loading device output. associated transient voltage peaks suppressed complying with line output control properly selected decoupling capacitors. recommended that 0.1µF ceramic capacitor used every device between VSS. This should high frequency capacitor inherent inductance should placed close device possible. addition, 4.7µF bulk electrolytic capacitor should used between every eight devices. bulk capacitor should located near power supply connection point.The purpose bulk capacitor overcome voltage drop caused inductive effects traces.
8/22
M27W512 Figure Programming flowchart
6.25V, 12.75V MARGIN MODE
Device operation
100s Pulse VERIFY Last Addr Addr
FAIL
RESET MARGIN MODE CHECK BYTES 1st: 2nd: 2.7V
AI00738C
Programming
M27W512 been designed fully compatible with M27C512 same electronic signature. result, M27W512 programmed M27C512 same programming equipment applying 12.75V 6.25V VCC. M27W512 PRESTO Programming Algorithm that drastically reduces programming time. Nevertheless achieve compatibility with programming equipment, PRESTO Programming Algorithm used well. When delivered, bits M27W512 state. Data introduced selectively programming '0's into desired locations. Although only '0's will programmed, both '1's '0's present data word. M27W512 programming mode when input 12.75V pulsed VIL. data programmed applied bits parallel data output pins. levels required address data inputs TTL. specified 6.25V 0.25V.
9/22
Device operation
M27W512
PRESTO programming algorithm
PRESTO programming algorithm allows whole array programmed with guaranteed margin, typical time seconds. This achieved with STMicroelectronics M27W512 several design innovations described M27W512 datasheet improve programming efficiency provide adequate margin reliability. Before starting programming internal MARGIN MODE circuit must order guarantee that each cell programmed with enough margin. Then sequence 100µs program pulses applied each byte until correct verify occurs (see Figure overprogram pulses applied since verify MARGIN MODE much higher than 3.6V, provides necessary margin.
Program inhibit
Programming multiple devices parallel with different data also easily accomplished. Except like inputs including GVPP parallel M27W512 common. level pulse applied M27W512 input, with 12.75V, will program this device. high level input inhibits other M27W512 from being programmed.
Program verify
verify (read) should performed programmed bits determine that they were correctly programmed. verify accomplished with VIL. Data should verified with tELQV after falling edge
Electronic signature
Electronic Signature (ES) mode allows reading binary code from EPROM that will identify manufacturer type. This mode intended programming equipment automatically match device programmed with corresponding programming algorithm. mode functional 25°C ambient temperature range that required when programming M27W512. activate mode, programming equipment must force 11.5V 12.5V address line M27W512. identifier bytes then sequenced from device outputs toggling address line from VIH. other address lines must held during Electronic Signature mode. Byte VIL) represents manufacturer code byte VIH) device identifier code. STMicroelectronics M27W512, these identifier bytes given Table read-out outputs Note that M27W512 M27C512 have same identifier byte.
10/22
M27W512
Maximum rating
Maximum rating
Stressing device outside ratings listed Table cause permanent damage device. These stress ratings only, operation device these, other conditions outside those indicated operating sections this specification, implied. Exposure absolute maximum rating conditions extended periods affect device reliability. Refer also STMicroelectronics SURE Program other relevant quality documents. Table
Symbol TBIAS TSTG VIO(2) VA9(2) Ambient operating
Absolute maximum ratings
Parameter temperature(1) Value 13.5 Unit
Temperature under bias Storage temperature Input output voltage (except Supply voltage voltage Program supply voltage
Depends range. Minimum voltage input output -0.5V with possible undershoot -2.0V period less than 20ns. Maximum voltage Output +0.5V with possible overshoot period less than 20ns.
11/22
parameters
M27W512
parameters
This section summarizes operating measurement conditions, characteristics device. parameters Characteristic tables that follow derived from tests performed under Measurement Conditions summarized relevant tables. Designers should check that operating conditions their circuit match measurement conditions when relying quoted parameters. Table measurement conditions
High speed Input rise fall times Input pulse voltages Input output timing ref. voltages 10ns 1.5V Standard 20ns 0.4V 2.4V 0.8V
Figure
testing input output waveform
High Speed 1.5V
Standard 2.4V 2.0V 0.8V
AI01822
0.4V
Figure
testing load circuit
1.3V
1N914
3.3k DEVICE UNDER TEST
30pF High Speed 100pF Standard includes capacitance
AI01823B
12/22
M27W512 Table
Symbol COUT
parameters Capacitance
Parameter Input capacitance Output capacitance Test condition(1)(2) VOUT Unit
25°C, 1MHz Sampled only, 100% tested.
Table
Symbol ICC1 ICC2
Read mode characteristics
Parameter Input leakage current Output leakage current Supply current Supply current (Standby) Supply current (Standby) CMOS Program current Input voltage Input high voltage Output voltage Output high voltage 2.1mA -1mA Test condition(1) VOUT VIL, VIL, IOUT 0mA, 5MHz 3.6V 0.2V, 3.6V -0.6 Unit
must applied simultaneously with before removed simultaneously after VPP. Maximum voltage Output +0.5V.
13/22
parameters Table Read mode characteristics
M27W512 Test condition
M27W512
-70(2) 3.6V
-80(2) 3.6V
-100 3.6V Unit
Symbol
Parameter
tAVQV tELQV tGLQV tEHQZ(3) tGHQZ(3) tAXQX
tACC
Address valid output valid Chip Enable output valid Output Enable output valid Chip Enable high output Hi-Z Output Enable high output Hi-Z Address transition output transition
VIL, VIL,
must applied simultaneously with before removed simultaneously after VPP. Speed obtained with High Speed measurement conditions. Sampled only, 100% tested.
Figure
Read mode waveforms
A0-A15
VALID tAVQV tAXQX
VALID
tGLQV tELQV Q0-Q7 tGHQZ Hi-Z tEHQZ
AI00735B
14/22
M27W512 Table
Symbol
parameters Programming mode characteristics
Parameter Input leakage current Supply current Program current Input voltage Input high voltage Output voltage Output high voltage voltage 2.1mA -1mA 11.5 12.5 -0.3 Test condition(1)(2) Unit
6.25V 0.25V; 12.75V 0.25V must applied simultaneously with before removed simultaneously after VPP.
Table
Symbol tA9HVPH tVPHEL tA10HEH tA10LEH tEXA10X tEXVPX tVPXA9X
Margin mode characteristics
tAS9 tVPS tAS10 tAS10 tAH10 tVPH tAH9 Parameter high high high Chip Enable VA10 high Chip Enable high (set) VA10 Chip Enable high (reset) Chip Enable transition VA10 transition Chip Enable transition transition transition transition Test condition(1)(2) Unit
6.25V 0.25V; 12.75V 0.25V must applied simultaneously with before removed simultaneously after VPP.
15/22
parameters Figure Margin mode waveforms
M27W512
tA9HVPH GVPP tVPHEL tA10HEH tEXA10X tEXVPX tVPXA9X
Reset tA10LEH
AI00736B
High level High level 12V.
Table
Symbol tAVEL tQVEL tVCHEL tVPHEL tVPLVPH tELEH tEHQX tEHVPX tVPLEL tELQV tEHQZ(3) tEHAX
Programming mode characteristics
tVCS tOES tPRT tOEH tDFP Parameter Address valid Chip Enable Input Valid Chip Enable high Chip Enable high Chip Enable rise time Chip Enable program pulse width (Initial) Chip Enable high input transition Chip Enable high transition Chip Enable Chip Enable output valid Chip Enable high output Hi-Z Chip Enable high address transition Test condition(1)(2) Unit
6.25V 0.25V; 12.75V 0.25V must applied simultaneously with before removed simultaneously after VPP. Sampled only, 100% tested.
16/22
M27W512 Figure
A0-A15 tAVEL Q0-Q7 tQVEL tVCHEL GVPP tVPHEL tELEH PROGRAM tVPLEL tEHVPX DATA tEHQX
parameters Programming verify mode waveforms
VALID tEHAX DATA tEHQZ tELQV
VERIFY
AI00737
17/22
Package mechanical data
M27W512
Package mechanical data
order meet environmental requirements, offers M27W512 ECOPACK® packages. These packages have lead-free second level interconnect. category second level interconnect marked package inner label, compliance with JEDEC Standard JESD97. maximum ratings related soldering conditions also marked inner label. ECOPACK trademark. ECOPACK specifications available www.st.com.
18/22
M27W512 Figure
Package mechanical data PLCC32 lead plastic leaded chip carrier, package outline
0.51 (.020) 1.14 (.045)
PLCC-A
Drawing scale.
Table
PLCC32 lead plastic leaded chip carrier, package mechanical data
millimeters inches(1) 3.556 2.413 0.533 0.813 0.100 12.319 11.354 4.780 7.620 14.859 13.894 6.050 10.160 1.270 0.000 0.889 12.573 11.506 5.660 15.113 14.046 6.930 0.127 0.0350 0.4000 0.0500 0.3000 0.4850 0.4470 0.1882 0.5850 0.5470 0.2382 0.0000 0.1250 0.0602 0.0150 0.0130 0.0260 0.1400 0.0950 0.0210 0.0320 0.0039 0.4950 0.4530 0.2228 0.5950 0.5530 0.2728 0.0050
Symbol (number pins) 3.175 1.530 0.381 0.330 0.660
Values inches converted from rounded decimal digits.
19/22
Part numbering
M27W512
Part numbering
Table
Example:
Ordering information scheme
M27W512 -100
Device type
Supply voltage
Device function Kbit
Speed -100=
Package PLCC32
Temperature range
Options Blank Standard packing Tape reel packing
list available options (speed, package, etc.) further information aspect this device, please contact your nearest sales office.
20/22
M27W512
Revision history
Revision history
Table
Date
Document revision history
Revision Changes FDIP28W Package Dimension, added (Table TSOP32 Package Dimension changed (Table 70°C Temperature Range deleted Speed Classes changed Typing error (Table Package mechanical data clarified FDIP28W (Table 12), PDIP28 (Table 13), PLCC32 (Table Figure TSOP28 (Table Figure Details ECOPACK lead-free package options added Document reformatted. FDIP28W PDIP28 packages removed. 120, 200ns access times removed from Table Ordering information scheme. Small text changes. range longer offered (references removed). TSOP28 package removed. Package mechanical data inches calculated from millimeters rounded three decimals (see Table PLCC32 lead plastic leaded chip carrier, package mechanical data). options speed class removed from Table Ordering information scheme.
20-Mar-2000
15-Jun-2001 30-Aug-2002 08-Nov-2004
27-Apr-2007
09-Jun-2008
21/22
M27W512
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