forward voltage TransilTM, transient voltage suppressor forward v

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LFTVS7-1F3
forward voltage TransilTM, transient voltage suppressor
forward voltage: 1.05 Peak pulse power (8/20 µs): Very clamping factor VCL/VBR Unidirectional device Fast response time Very thin package: 0.605 RoHS compliant Figure configuration (bump side)
Flip Chip bumps)
Complies with following standards:
61000-4-2 level (air discharge) (contact discharge)
Description
LFTVS7-1F3 single line diode designed specifically protection integrated circuits portable equipment miniaturized electronics devices subject transient overvoltages. Figure
Device configuration
Transil trademark STMicroelectronics
April 2008
www.st.com
Characteristics
LFTVS7-1F3
Characteristics
Table
Symbol
Absolute maximum ratings (Tamb
Parameter Peak pulse power dissipation (10/1000 pulse) Test condition Value initial Tamb initial Tamb +150 Unit
Peak pulse power dissipation (8/20 pulse) repetitive surge peak forward current Maximum operating junction temperature Storage temperature range
IFSM Tstg
Table
Symbol Symbol Cline
Electrical characteristics (Tamb
Parameter Breakdown voltage
Leakage current Stand-off voltage Clamping voltage Dynamic impedance Peak pulse current Voltage temperature coefficient Forward voltage drop Test conditions 5.5V A(1) Min. 1.05 VOSC Typ.
Slope 1/Rd
Max.
Unit 10-4
pulse waveform
LFTVS7-1F3
Characteristics
Figure
Relative variation peak pulse power versus initial junction temperature
Figure
Peak pulse power versus exponential pulse duration (typical value)
initial
PPP[Tj initial] PPP[Tj initial=25°C]
1000 10000
PPP(W)
Tj(°C)
tp(µs)
1000
Figure
Clamping voltage versus peak pulse current (typical values)
Figure
Relative variation leakage current versus junction temperature (typical values)
IPP(A)
10.0
10/1000 initial -30° initial initial
IR[Tj] IR[Tj=25°C]
VCL(V)
Tj(°C)
Figure
Forward voltage drop versus peak forward current (typical values)
Figure
Junction capacitance versus reverse voltage applied (typical values)
IFM(A)
1.E+02
Capacitance(pF)
initial
1.E+01
initial
1.E+00
initial -30°
1.E-01
VFM(V)
1.E-02
Voltage(V)
Application information Figure
VBR(V)
LFTVS7-1F3
Breakdown voltage versus initial Figure Frequency response junction temperature (typical value)
Tj(°
100k
F/Hz
100M
Figure response 61000-4-2 contact discharge)
20ns/div 10V/div
Figure response 61000-4-2 contact discharge)
20ns/div 10V/div
Application information
Figure Application schematic
VBUS CONNECTOR
LFVS7-1F3
LFTVS7-1F3
Ordering information scheme
Ordering information scheme
Figure Ordering information scheme
forward voltage Transient voltage suppressor Breakdown voltage VMIN Number lines single line Package Flip Chip lead free, pitch
Package information
order meet environmental requirements, offers these devices ECOPACK® packages. These packages have lead-free second level interconnect. category second level interconnect marked inner label, compliance with JEDEC Standard JESD97. maximum ratings related soldering conditions also marked inner label. ECOPACK trademark. ECOPACK specifications available www.st.com. Figure Flip Chip dimensions
0.77
0.77
Package information
LFTVS7-1F3
Figure Foot print recommendations Figure Marking
Copper Diameter: recommended maximum Solder mask opening: minimum
marking manufacturing location datecode year week)
Solder stencil opening: recommended
Figure Flip Chip tape reel specifications
identifying location
1.75
0.87
0.71 0.05
dimensions
User direction unreeling
0.87
Note:
More information available application notes: AN2348: "400 Flip Chip: Package description recommendations use" AN1751: "EMI Filters: Recommendations measurements"
LFTVS7-1F3
Ordering information
Ordering information
Table Ordering information
Marking Package Flip Chip Weight 0.86 Base 5000 Delivery mode Tape reel (7")
Order code LFTVS7-1F3
Revision history
Table
Date 01-Mar-2007 16-Apr-2008
Document revision history
Revision Initial release. Updated ECOPACK statement. Updated Figure Figure Reformatted current standards. Changed from 1.05 Changes
LFTVS7-1F3
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