voltage CMOS inverter (open drain) with tolerant inputs tolerant

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voltage CMOS inverter (open drain) with tolerant inputs tolerant

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74LCX05
voltage CMOS inverter (open drain) with tolerant inputs
tolerant inputs High speed: 5.2ns (Max) Power down protection inputs outputs Symmetrical output impedance: |IOH| 24mA (Min) levels guaranteed 24mA Operating voltage range: (Opr) 2.0V 3.6V function compatible with series Latch-up performance exceeds 500mA (JESD performance: 2000V (MIL method 3015); 200V
SO-14 TSSOP14
Description
74LCX05 voltage CMOS open drain inverter fabricated with sub-micron silicon gate double-layer metal wiring C2MOS technology. ideal power high speed 3.3V applications. interfaced signal environment inputs. internal circuit composed stages including buffer output, which provides high noise immunity stable output. same speed performance 3.3V than AC/ACT family, combined with lower power consumption. inputs outputs equipped with protection circuits against static discharge, giving them immunity transient excess voltage.
Order codes
Part number 74LCX05MTR 74LCX05TTR Package SO-14 TSSOP14 Packaging Tape reel Tape reel
July 2006
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www.st.com
Contents
74LCX05
Contents
Logic symbols equivalent circuit settings
connection description Truth table
Maximum rating
Recommended operating conditions
Electrical characteristics Test circuit Waveforms Package mechanical data Revision history
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74LCX05
Logic symbols equivalent circuit
Logic symbols equivalent circuit
Figure logic symbols
Figure
Input output equivalent circuit
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settings
74LCX05
settings
connection
Figure connection (top through view)
description
Table description
Symbol Data inputs data outputs Ground (0V) Positive supply voltage Name function
Truth table
Table Truth table
Inputs
High impedance
Output
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74LCX05
Maximum rating
Maximum rating
stressing device above rating listed "absolute maximum ratings" table cause permanent damage device. these stress ratings only operation device these other conditions above those indicated operating sections this specification implied. exposure absolute maximum rating conditions extended periods affect device reliability. refer also STMicroelectronics sure program other relevant quality documents. Table Absolute maximum ratings
Symbol IGND Tstg Supply voltage input voltage output voltage (VCC output voltage (high state) input diode current output diode current output current supply current supply ground current supply Storage temperature Lead temperature sec) Parameter Value -0.5 +7.0 -0.5 +7.0 -0.5 +7.0 -0.5 +150 Unit
absolute maximum rating must observed
Recommended operating conditions
Table Recommended operating conditions
Symbol IOH, IOH, dt/dv Supply voltage Input voltage Output voltage (VCC Output voltage (high state) High level output current (VCC 3.6V) High level output current (VCC 2.7V) Operating temperature Input rise fall time
Parameter
Value
Unit ns/V
Truth Table guaranteed: 1.5V 3.6V from 0.8V 3.0V
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Electrical characteristics
74LCX05
Electrical characteristics
Table specifications
Test condition Symbol Parameter Value 85°C level input voltage level output voltage Ioff Input leakage current Power leakage current High impedance output leakage current Quiescent supply current incr. Input IO=100 IO=12 IO=16 IO=24 5.5V 5.5V 5.5V 0.6V 0.55 Unit
High level input voltage
Table Dynamic switching characteristics
Test condition Symbol Parameter 3.3V Value -0.8 Unit
VOLP VOLV
Dynamic level quiet output
Number outputs defined "n". Measured with "n-1" outputs switching from HIGH HIGH. remaining output measured state.
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74LCX05
Electrical characteristics
Table electrical characteristics
Test condition Symbol Parameter (pF) (ns) Value Unit
tPLZ tPZL tOSLH tOSHL
Propagation delay time Propagation delay time Output output skew time
Skew defined absolute value difference between actual propagation delay outputs same device switching same direction, either HIGH (tOSLH tPLHm tPLHn|, tOSHL tPHLm tPHLn|) Parameter guaranteed design
Table Capacitive characteristics
Test condition Symbol Parameter 10MHz Value Unit
COUT
Input capacitance Output Capacitance Power dissipation capacitance
defined value IC's internal equivalent capacitance which calculated from operating current consumption without load. (Refer Test Circuit). Average operating current obtained following equation. ICC(opr) ICC/6 (per gate)
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Test circuit
74LCX05
Test circuit
Figure Test circuit
Table Test circuit
Test tPLH, tPHL tPZL, tPLZ tPZH, tPHZ Switch Open
50pF equivalent (includes probe capacitance) equivalent ZOUT pulse generator (typically
Waveforms
Figure Waveform propagation delay 1MHz; duty cycle)
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74LCX05
Package mechanical data
Package mechanical data
order meet environmental requirements, offers these devices ECOPACK® packages. These packages have Lead-free second level interconnect category second level interconnect marked package inner label, compliance with JEDEC Standard JESD97. maximum ratings related soldering conditions also marked inner label. ECOPACK trademark. ECOPACK specifications available www.st.com
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Package mechanical data
74LCX05
SO-14 MECHANICAL DATA
DIM. 0.25 MIN. 1.35 1.10 0.33 0.19 8.55 1.27 0.50 1.27 0.100 0.228 0.010 0.016 MAX. 1.75 0.25 1.65 0.51 0.25 8.75 MIN. 0.053 0.004 0.043 0.013 0.007 0.337 0.150 0.050 0.244 0.020 0.050 0.004 inch TYP. MAX. 0.069 0.010 0.065 0.020 0.010 0.344 0.157
0016019D
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74LCX05
Package mechanical data
TSSOP14 MECHANICAL DATA
DIM. MIN. 0.45 0.60 0.05 0.19 0.09 0.65 0.75 0.018 0.024 MAX. 0.15 1.05 0.30 0.20 4.48 0.002 0.031 0.007 0.004 0.193 0.244 0.169 0.197 0.252 0.173 0.0256 0.030 0.004 0.039 MIN. TYP. MAX. 0.047 0.006 0.041 0.012 0.0089 0.201 0.260 0.176 inch
IDENTIFICATION
0080337D
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Package mechanical data
74LCX05
Tape Reel SO-14 MECHANICAL DATA
DIM. MIN. 12.8 20.2 22.4 0.252 0.354 0.082 0.153 0.311 MAX. 13.2 0.504 0.795 2.362 0.882 0.260 0.362 0.090 0.161 0.319 MIN. TYP. MAX. 12.992 0.519 inch
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74LCX05
Package mechanical data
Tape Reel TSSOP14 MECHANICAL DATA
DIM. MIN. 12.8 20.2 22.4 0.264 0.209 0.063 0.153 0.311 MAX. 13.2 0.504 0.795 2.362 0.882 0.272 0.217 0.071 0.161 0.319 MIN. TYP. MAX. 12.992 0.519 inch
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Revision history
74LCX05
Revision history
Table Revision history
Date 15-Sep-2004 06-Jul-2006 Revision Changes Ordering codes revision pag. template, temperature ranges updated
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74LCX05
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voltage CMOS inverter (open drain) with tolerant inputs tolerant

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