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Martin Staebler Digital Signal Processoring Solutions Abstract


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TMS320F240 DSP-Solution HighResolution Position with Sin/CosEncoders
Martin Staebler Digital Signal Processoring Solutions
Abstract
This application report offers solution obtaining high-resolution position with sin/cosencoders using Texas Instrument TMS320F240 digital signal processor (DSP) controller. This achieved with minimum glue logic software overhead, since TMS320C24x controller already incorporates on-chip quadrature encoder pulse (QEP) circuit well analog-to-digital converters (ADCs). circuit provides glueless interface TTLencoders. analog-to-digital converters provide simultaneous sampling sinusoidal output signals sin/cos-encoders. software package includes functions required initialization position interpolation with sin/cos-encoders. subroutines ANSI C-compatible called from program. Position interpolation requires 15ms execution time. resolution achieved approximately times better than with TTL-encoders equivalent line count. This gives user advantage having either higher position resolution reduced sensor cost, since sin/cos-encoders require less line counts than equivalent TTL-encoders achieve same resolution.
Contents
Introduction Incremental Rotary Encoders Implementation TMS320F240 Results Conclusion
Figures
Figure Figure Figure Figure Figure Output Voltage Signals (±A, sin/cos-Encoders with Line Counts Revolution Function Mechanical Position Phase Shift Adigitized Hysteresis High-Resolution Position Measurement Algorithm Module Timing Diagram (ADC Clock 1MHz) TMS320F240 Interface sin/cos-Encoder.11
Digital Signal Processing Solutions
December 1998
Figure Figure Figure Figure Figure Figure Figure Figure
Software Organization.12 Flow Chart Encoder_ZeroPostion() Flow Chart Encoder_MatchIncrPhase().15 Flow Chart Encoder_CalcPosition() TMS320F240 Monitor Communications Interface Maximum Absolute Phase Error over Incremental Step Absolute Phase Error over Quadrant Gain Errors ±1%.24 Maximum Rotation Speed allowing High-Resolution Position Determination Function Delay Time Ddelay
Tables
Table Table Table Table Table Table Initialization Functions Functions Obtaining High-Resolution Position Software Organization.20 TMS320F240 Utilization ENCODER.LIB.21 TMS320F240 Utilization Functional Level Minimum Position Resolution with TMS320F240 10-bit Encoders with Different Line Count.23
Introduction
Incremental rotary encoders used many applications measure angular position and/or speed. Depending application, TTL-encoders with TTL-output signals sin/cos-encoders with analog sinusoidal output signals (which allow higher resolution) used. TMS320F240 controller designed meet wide range digital motor control applications thus incorporates peripherals support TTL-encoders well sin/cos encoders. section, Incremental Rotary Encoders, describes principle sin/cos-encoders method obtain high-resolution position. section, Implementation TMS320F240, explains implementation TMS320F240 with respect on-chip unit dual analog-to-digital converters. This includes proposal hardware interface, description software routines, which initialize handle sin/cos-encoder interface, usage these functions other application programs. section, Results, shows memory requirements loading discusses position accuracy achieved.
Incremental Rotary Encoders
Output Signals
Incremental rotary encoders operate principle photo-electrically scanning very fine gratings forming incremental track. When rotating, encoders modulate beam light whose intensity sensed photo-electrical cells, producing (el.) phase-shifted sinusoidal signals lags with clockwise rotation viewed from shaft side encoder. number periods over mechanical revolution equals line count encoder. frequency proportional revolution speed line count encoder. second track carries reference mark that modulates reference mark signal maximum once (mech.) revolution. Sin/cos-encoders provide differential analog output signals (±A, shown Figure TTL-encoders already incorporate circuit that digitizes sinusoidal scanning signals provides phase-shifted square-wave pulse trains reference pulse
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
Figure Output Voltage Signals (±A, sin/cos-Encoders with Line Counts Revolution Function Mechanical Position
ignal period 360° uadrant
Trac
rack
eferenc
Increm Line
osition ech.)
High-Resolution Position Determination
Rotation direction determined detecting which quadrature encoded signals, leading sequence. Rotation speed determined frequency sinusoidal signals, with respect line count encoder. According Figure angular position determined knowing incremental count line count and, when between consecutive increments lines, deriving phase from analog signals reference mark signal provides absolute position determination, angle which encoder mounted known.
Incremental Position/Count
incremental count hence incremental position determined timer that counts when leading sequence counts down when leading sequence. When digitized, both edges counted, thus incremental position Fincr given
360° incr incr
where [incr] timer count incremental count line count encoder
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
zero position.
incremental step equivalent (el.) phase shift signals,
Phase
phase sinusoidal signals used interpolate position between consecutive line counts four incremental steps, which equivalent each other. calculated
(2.1)
which advantage that absolute amplitudes which common function encoder's rotation speed supply voltage, affect result. Since arctan-function ambiguous, check sign sinusoidal signals identify correct quadrant.
Interpolated High-Resolution Position
When incremental count [incr] matched phase according incr 90°, incr 180°, etc., high-resolution position/angle then derived
incr
360° incr 360°
(2.2)
Note that sinusoidal signals incremental count [incr] must sampled simultaneously. Practically, digitized signals Adigitized, Bdigitized, which edges counted incremental counter, have phase shift compared analog signals hysteresis propagation delay digitizing circuit. transition next quadrant, incremental counter updated immediately because phase lag, e.g., shown first quadrant Figure
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
Figure Phase Shift Adigitized Hysteresis
itize
osition
However, equation (2.2) applied long that phase shift less than ±90° (el.), which equivalent incremental count. Since only phase information used identify quadrant, there only exceptions (which occur close transition next line) consider when applying equation (2.2): incr Here phase obviously sampled before incremental count updated hysteresis and/or propagation delay. [incr] points wrong line count. that case incremental count [incr] increased compensate that (known) error. 360° incr that case, incremental count [incr] decreased compensate that (known) error. Figure shows flow chart position measurement algorithm, utilizing equations (2.1) (2.2).
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
Figure High-Resolution Position Measurement Algorithm
Start synchronously sample A,B,incr
(2.1) 90o) (incr%4 ==3)
incr incr
incr incr
(270o 360o) (incr%4 ==0)
,incr)
(2.1)
Maximum Tracking Speed nmax
maximum revolution speed which algorithm tracks high resolution position depends following:
Line count, encoder Hysteresis angle digitizing circuit Propagation delay between analog digitized signals Delay time between sampling analog signals capturing incremental counter
[rpm]
90°-a Hysteresis 360° delay
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
Implementation TMS320F240
TMS320F240 QEP-Unit Module
TMS320F240 incorporates circuit well 10-bit analog-to-digital converters with built-in sample hold circuits. This minimizes glue logic required interface incremental encoders with analog sin/cos-output TMS320F240. circuit decodes counts quadrature encoded input pulses TTLcompatible input pins, CAP1/QEP1 CAP2/QEP2. selected timer counts CAP1/QEP1 leading sequence, counts down, CAP2/QEP2 leading sequence. Both edges counted. However, synchronization circuit suppresses spikes, since input sampled twice consecutive falling edges instruction clock only recognized when level constant during that time. Hence, nominal instruction cycle time tc(CO) 50ns, spike with pulse width less than 50ns suppressed. maximum input frequency given
max(
quite enough meet maximum output frequency incremental rotary encoders. module comprises 10-bit analog-to-digital converters with eight multiplexed analog input channels converter minimum conversion time tW(SHC) 6.2us. Both ADCs started simultaneously software, external hardware pin, event manager, allowing synchronization, e.g., PWM.
Figure Module Timing Diagram (ADC Clock 1MHz)
td(SOC-SH) 300ns
tw(SH))=1us
Conversion (SAR)
Hold Sample 500ns 800ns
starts conversion
analog input sampling finished
After ADCs started, e.g., software, sampling selected input channels starts with delay td(SOC-SH) tc(SYS) 300ns @SYSCLK MHz.
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
sample-and-hold time tw(SH) (ADC clock 1MHz), where internal switched capacitor samples analog input 500ns holds another 500ns before starting successive approximation conversion. Note that external circuitry should capable charging capacitor within ±1/2 during sampling time. achieve simultaneous sampling sinusoidal input signals, (ADC module) incremental counter (QEP module), incremental counter read/captured software with delay td(SOC-SH) tw(SH) 800ns instruction cycles), after writing start command control register. more information TMS320F240 peripherals, refer [1],[2].
Hardware Interface
sin/cos-encoder, with analog output signals shown Figure interfaced TMS320F240 controller shown Figure Note that components values used applicable incremental encoder with line count 2048 maximum speed 12000 rpm, hence maximum frequency fA,B,max kHz. main aspects circuit discussed below.
Supply Voltage
total circuit supplied with only single supply analog (VCCA) digital part (VCC), respectively. Analog digital ground should connected close TMS320F240 AGND input pins. AGND used shield differential signals incremental rotary encoder.
Virtual Ground
TL2425, precision by-two voltage divider, generates virtual ground VREFH/2, which exactly mid-voltage input interpreted digital offset 0x8000. This eliminates influence reference voltage that digital offset.
Input Voltage Range
TMS320F240 VREFH input connected VCCA +5V. VREFL connected AGND decoupled with 10uF tantalum capacitor. resistor inserted filter high frequency noise. input range VREFL VREFH.
Driving Input
differential input signals first pass through high impedance unity-gain buffer (TLV2772) eliminate influence line impedance. buffered differential signals input differential amplifier (TLV2772) with gain 22/10. resistors, which non-inverting inverting gain, should keep common mode rejection CMRR 60dB. non-inverting input network referenced virtual ground VREFH/2 2.5V, hence output voltage swing
0.3V 4.7V
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
output differential amplifier filtered with network, providing good noise rejection accuracy lower revolution speeds, where precise analog phase information required increase position and/or speed resolution. cut-off frequency approximately 40kHz, which sin/cos-encoder, used that report, with line count 2048, equivalent rotation speed approximately 1200rpm, changed according encoders parameter other requirements. However, capacitor should close possible ADC's input will charge ADC's internal switched-capacitor rather than amp, which increases noise immunity relaxes requirements settling time output current capability. TLV2772 LinCMOS dual rail-to-rail used because allows single-supply operation provides gain bandwidth 5MHz slew rate 9V/us, hence operating maximum encoders frequency fA,B,max kHz. Since 2.5mV, offset voltage drift over temperature 2uV/K does affect system accuracy. initial offset voltage removed digitally software.
Driving Unit
sinusoidal output differential amplifier also input high-speed comparator (TLC3702). threshold voltage adjusted 2.5V hysteresis approximately ±0.6V increase noise immunity prevent comparator from toggling. hysteresis ±0.6V equivalent phase hysteresis ±15°. TLC3702 LinCMOS dual-voltage comparator allows single-supply operation provides TTL-compatible outputs with rise time 50ns; thus, directly interfaced TMS320F240 QEP1,2 inputs without additional Schmitt-trigger. propagation delay [tP] 40mV overdrive typically 1us.
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
Figure TMS320F240 Interface sin/cos-Encoder
VCCA 220k
shield
TLV2772 VCCA
CAP3/IOPC6 TL3702
TLV2772 COS(PHI) ADCIN13 15p* VCCA TLV2772 15p* VCCA
2.5V
330k
shield
2.5V
0.1u
QEP2 TL3702
TLV2772
TLV2772
0.1u
SIN(PHI)
ADCIN5
VCCA
15p*
330k
shield
TLV2772 15p* VCCA
2.5V
2.5V
0.1u VCCA
QEP1 TL3702
TLV2772
VCCA 0.1u VREFH 0.1u VREFL
TLV2772
0.1u
VCCA
TL2425
VREFH AGND AGND
2.5V
AGND
0.1u
SIN/COS-Encoder
TMS320F240
Software Implementation
Overview
main part application software written ANSI language provide wellstructured readable software ease usage subroutines applications. However, time critical functions, such fractional division arctanfunction written assembler provide C-compatible interface, thus called from program.
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
Figure gives overview software modules, which structured into four directories. Each source module header file, declaring global variables, functions constants.
Figure Software Organization
source
encoder.c evm_qep.c q15_atan.asm q15_div.asm
include
encoder.h evm_qep.h q15_atan.h q15_div.h adc.h c240.h
build
source files provide following functions:
encoder.lib lib.bat lib.bat
encoder.c contains subroutines initialization position determination added sin/cos-encoders. evm_qep.c contains functions initialize serve TMS320F240 unit. q15_atan.asm q15_div.asm provide fractional math functions tangents division, respectively, called from
include directory contains header files (which declare global variables, functions, constants) TMS320F240 memory-mapped register well Cmacros serve TMS320F240 module. batch file lib.bat used compile source files build object library encoder.lib.
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
Functional Description
Global Variables
qep_diff; unsigned qep_rollover; unsigned encoder_position[2];
encoder's incremental count revolution held qep_rollover; qep_diff used incremental offset. Both variables required handle QEP-unit. array encoder_position[] used store actual high-resolution position sin/cos-encoder. 16-bit integer array used rather than 32-bit long variable because better fits architecture results lower code size. encoder_position[0] equals (scaled) phase, 360°, between consecutive incremental lines (four incremental steps); encoder_position[1] equals then incremental line position. high-resolution position angle given
encoder position[ 360° encoder position[1] rollover
Initialization Routines
following functions used initialization. Note that functions level called from `higher' level functions level respectively.
Table Initialization Functions
Function Declaration void Encoder_Init(unsigned encoder_rollover) void QEP_Init(void) void Encoder_ZeroPosition(void) void Encoder_MatchIncrPhase(void) void QEP_GetIncr(void) Level
void Encoder_Init(unsigned encoder_rollover)
This main (level initialization routine, which calls other initialization functions level initialize module,
enable both ADCs, clock MHz, 16-bit timer counter, enable inputs
unit,
global variables, where qep_rollover initialized with parameter encoder_rollover, explained above. void Encoder_ZeroPosition(void), shown Figure called obtain absolute encoder position information.
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
encoder turned until reference mark signal gets high, indicating zero position. void Encoder_MatchIncrPhase(void) (see Figure then modifies variable qep_diff, that phase information, stored encoder_position[0] incremental count, which returned from function unsigned QEP_GetIncr(void), explained later, match according equation (3.1):
QEP_ GetIncr()
0x0000 encoder_ position[ 0x4000 0x4000 encoder_ position[ 0x8000 0x8000 encoder_ position[ 0xC000 0xC000 encoder_ position[ 0xFFFF
(3.1)
void Encoder_ZeroPosition(void)
obtain absolute encoder position, encoder turned until reference index gets high. reference index high only within zero line, which equal incremental counts 0,1,2 transition high software immediately initializes timer counter T2CNT indicating it's `zero' line. quadrant information adjusted later function Encoder_MatchIncrPhase(). second method would turning encoder into zero position, lock then initialize timer accordingly. advantage first method that encoder does have locked, thus turned during initialization, since quadrant offset error compensated later.
Figure Flow Chart Encoder_ZeroPostion()
tart
turn encoder reference pulse high
void Encoder_MatchIncrPhase(void)
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
This function aligns incremental count phase according equation (3.1). Therefore, encoder turned slowly. Matching done only `middle' quadrant exclude hysteresis effects.
Figure Flow Chart Encoder_MatchIncrPhase()
tart
turn encoder
incr etIncr() qep_dif ((in quadrant arctan(|A |/|B
Routines Obtaining Incremental Position
Obtaining encoder's incremental position requires global variables, qep_rollover qep_diff, which derived from sinusoidal signals described earlier. qep_rollover equal incremental counts revolution. qep_diff used match incremental position phase well handle rollover. Here Timer selected counter. Since wraps 0xFFFF 0x0000, software take care wrapping desired number, which corresponds number incremental counts revolution. methods used, depending whether encoder with counts, integer, revolution used not.
encoders with counts, done simply masking upper 16-n unwanted bits timer counter:
(T2CNT qep_diff) (qep_increments-1).
non-2n encoders function:
unsigned QEP_GetIncr(void)
returns (absolute) incremental count position.
unsigned QEP_GetIncr(void).
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
This function checks timer counter [T2CNT] upper lower limit, where qep_diff points lower qep_diff qep_rollover upper limit. limit qep_diff incremented decremented qep_rollover, shown below:
volatile unsigned buffer; buffer T2CNT qep_diff; while(buffer buffer qep_rollover; qep_diff qep_rollover; while(buffer qep_rollover) buffer qep_rollover; qep_diff qep_rollover; return buffer; buffer qep_rollover
Note: subroutine written assembler optimize speed guarantee simultaneous capturing timer counter (T2CNT) sinusoidal signals,
Routines High-Resolution Position Interpolation
following functions used obtain high-resolution position, which stored array encoder_position[]. There only level functions, which call functions level
Table Functions Obtaining High-Resolution Position
Function Declaration Level unsigned Encoder_SamplePosition(void) void Encoder_CalcPosition(unsigned incr) unsigned Encoder_CalcPhase(int sin, neg_cos) unsigned QEP_GetIncr(void) unsigned q15p_atan(unsigned) unsigned q15_div(unsigned nom, unsigned denom) unsigned Encoder_SamplePosition(void),
This command initiates analog-to-digital conversion sinusoidal input signals TMS320F240 analog input pins, ADCIN5 ADCIN13. command calls QEP_GetIncr(), which returns modified incremental count [incr] that sampled same time inputs, hence simultaneously. This achieved reading timer counter (T2CNT), which holds (not processed) incremental count exactly sixteen clock cycles after writing start command control register. During that time slot interrupts must disabled. (Refer section, TMS320F240 QEP-Unit Module.)
void Encoder_CalcPosition(unsigned incr).
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
This function calculates interpolated high-resolution position stores global array encoder_position[] defined section, Global Variables. flow chart outlined Figure
Figure Flow Chart Encoder_CalcPosition()
Start
End-of-conversion
ADC0 Offset ncos ADC1 Offset encoder_position[0] Encoder_CalcPhase(sin,ncos) encoder_position 0x0.0xFFFF incr 0x0.qep_rollover
incr incr
(encoder_position[0]>>14 (incr
incr incr
(encoder_position[0]>>14 (incr
encoder_position[1] incr
Start
function passes incremental count, which sampled same time analog signals polls end-of-conversion, reads FIFOs adds offset complement signals sin(j) -cos(j). Optionally, software performs gain compensation. variables sin(j) -cos(j) passed function unsigned Encoder_CalcPhase(), which returns scaled phase encoder_position[0].
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
next step ensure that incremental count (the LSBs, least significant bits) phase (the MSBs, most significant bits) match outlined section, High-Resolution Position Determination. This done compensate hysteresis propagation delay digitizing circuit, shown Figure This required only quadrant. algorithm checks these cases compensates incremental count, required. After that performs by-two rightshift incremental count (removing redundant information) before storing correct incremental position encoder_position[1]. (Refer also High-Resolution Position Determination.)
unsigned Encoder_CalcPhase(int sin, negcos)
This function returns scaled phase jscaled, which derived from quotient arguments sin(j) negcos -cos(j). First checks sign identify correct quadrant then utilizes fractional division arctan routines derive scaled phase according 360°.
Fractional Math Routines
mathematical routines division inverse tangents support (positive) fractional numbers (Q15).
unsigned _q15_div(unsigned nom, unsigned denom),
with [0.+1], denom [0.+1] nom, return value nom/denom [0.+1].
unsigned q15p_atan(unsigned arg)
with [0.+1] return value scaled angle according 0x2000 PI/4 45°]. function uses point lookup table with interpolation, error scaled angle less that 2LSBs.
Application Interface (API)
subroutines discussed previous paragraph archived object library ENCODER.LIB called from program. following steps required when using sin/cos-encoders interfaced TMS320F240, shown Figure
Step Modify ENCODER.H
encoder's incremental count revolution analog input offset voltage sinusoidal signals, defined header file ENCODER.H, shown below sin/cos-encoder with line count N=2048, equal incremental count 8192. Note that interfaced ADCIN5 ADCIN13, respectively.
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
#define QEP_ROLLOVER 8192 /*incremental counts/rev.*/ asm("QEP_ROLLOVER .set 8192 /*dito, assembler support #define QEP_POWER2 /*undefine incremental*/ /*count isn't power #define ENC_U0_OFFSET (0x8000 (sin) offset*/ #define ENC_U90_OFFSET (0x8000 300) (-cos) offset*/
Step LIB.BAT
This recompiles library ENCODER.LIB
dspcl -v2xx .\source\*.asm dspcl -v2xx -i.\include dspar encoder.lib *.obj copy *.lib .\lib
.\source\*.c
Step Calling Conventions when Using Sin/Cos-Encoders
Three function calls local variable required within your application software initialize TMS320F240 sin/cos-encoder interface obtain highresolution position, stored into global array encoder_position[], declared ENCODER.H.
#include "encoder.h" /*-*/ Initialize TMS320F240 sin/cos-encoder interface /*-*/ Encoder_Init(QEP_ROLLOVER);
functions required obtaining high-resolution position called from program, many cases interrupt service routine, e.g., current controller fieldoriented controlled drives.
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
#include "encoder.h" volatile unsigned buffer; local variable /*-*/ /*Get position: encoder_position[0]= FFFFh 0°.360°*/ encoder_position[1]= 0.QEP_ROLLOVER/4 /*-*/ buffer Encoder_SamplePosition(); insert signal processing during conversion time Encoder_CalcPosition(buffer); writes encoder_position*/
Step Include Library ENCODER.LIB Your Linker Command File
.\encoder\lib encoder.lib library search path
Step Compile
Monitor Test Program
monitor program allows testing sin/cos-encoders interfaced shown schematics, Figure VT100 terminal program, without need writing your application software. files necessary packed into file, ENCODER.ZIP, which downloaded from Internet [8]. After unzipping will following structure:
Table Software Organization
File/Directory MAIN.C MONITOR.C MONITOR.H RS232\LIB\RS323.LIB RS232\INCLUDE ENCODER\LIB\ENCODER.LIB ENCODER\INCLUDE LINK.CMD CC.BAT ENCODER.TRM Description Main program, TMS320F240 initialization Monitor program Terminal settings (Baudrate) RS232 terminal handler object library Directory header files RS232.LIB Encoder functions object library Directory header files ENCODER.LIB TMS320F240 Linker command file compiler linker batch file Windows terminal settings (TERMINAL.EXE)
have external oscillator (such TI's EVM-240), open MAIN.C modify clock option shown MAIN.C
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
Modify ENCODER.LIB according steps section, Application Interface (API). CC.BAT, make sure you've path code generation tools. Load MAIN.OUT with JTAG emulator your target program into on-chip flash memory. Open VT100 terminal program, e.g., terminal.exe, where encoder.trm defines terminal settings: 9600 baud, data bits, parity, append CR/LF). program.
will following communication interface.
Figure TMS320F240 Monitor Communications Interface
Results
Processor Utilization
following benchmarking results, files compiled with Texas Instruments Fixed-Point Compiler 6.60, optimization level Table shows required program data memory library ENCODER.LIB cycle time required obtaining high-resolution position.
Table TMS320F240 Utilization ENCODER.LIB
Program memory (ROM) Data memory cycles time 2ABh (stack) 16.25
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
Table shows cycles memory requirements subroutines, which calculate sin/cos-encoders high-resolution position. Note that functions with level called functions level respectively.
Table TMS320F240 Utilization Functional Level
Function Encoder_SamplePosition() Encoder_CalcPosition() Encoder_CalcPhase() QEP_GetIncr() q15p_atan() q15_div() Level Program Memory (FLASH) Data Memory Cycles
NOTE: cycles expected reduced 20-50% when software routines written assembler language calls minimized.
Accuracy Analysis
Parameters that influence position resolution accuracy besides encoders accuracy itself especially rotation speed, analog gain offset (signal conditioning) quantization (ADC, DSP), equation below shows absolute phase error function quantization, gain offset errors.
GAIN OFFSET GAIN OFFSET
Quantization
Quantization limited TMS320F240 10-bit converter, which total error less than ±1.5LSB. Digital truncation rounding errors, well accuracy inverse tangent function negligible. Figure shows maximum absolute phase error degrees) within incremental step TMS320F240 implementation, which independent sin/cos-encoders line count. x-axis corresponds (el.) phase over incremental step, y-axis absolute phase error. error shows maximum repeats each incremental step, respectively.
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
Figure Maximum Absolute Phase Error over Incremental Step
Absolute (Incremetal) Phase Error [Degrees]
0.25 0.15 0.05 -0.05 -0.1 -0.15 -0.2 -0.25 (Incremental) Phase [Degrees] ±1.5LSB quantization error
accuracy ±1.5LSB ADC, minimum position resolution sin/cosencoders shown Table Compared TTL-encoders with identical line count resolution achieved approximately 400-times better.
Table Minimum Position Resolution with TMS320F240 10-bit Encoders with Different Line Count
Line count
Min. position resolution [arc seconds]
1.75
1024
0.87
1024
0.43
Signal Conditioning
Signal conditioning should introduce additional error, therefore, hardware parameter's accuracy should within LSB, equivalent 5mV. initial offset voltage corrected software amps offset voltage temperature drift 50uV/K neglected, since 5mV. gain accuracy amps, amplifying sinusoidal signals, naturally affects position accuracy, shown Figure where absolute phase error shown over quadrant gain errors
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
Figure Absolute Phase Error over Quadrant Gain Errors
Absolute (Incremetal) Phase Error [Degrees]
-0.1 -0.2 -0.3 (Incremental) Phase [Degrees] gain error
error maximum range ADC. Therefore either resistors, which gain, must match better than software correct gain accordingly, which preferred method. recommended place resistors close together, however even with resistors' temperature drifts 50ppm, gain keeps within ±0.1% temperature drop. Thus, this effect neglected.
Rotation Speed
Rotation speed does affect high-resolution position determination, long phase shift between analog sinusoidal signals digitized signals, triggering incremental counter less than ±90°. analog signals incremental counter sampled with delay, this does increase decrease phase shift, respectively, considered. maximum rotation speed allowing high-resolution position determination given
[rpm]
90°-a Hysteresis 360° delay
where hysteresis comparator [tdelay] propagation delay between analog digitized signal plus delay time between sampling analog signals capturing incremental counter. Figure shows maximum speed determine high-resolution position according above equation hysteresis function delay time, tdelay, encoders with different line count achieve these maximum ratings, filter analog input `F240 modified accordingly. Note that `F240 incremental counter runs 9MHz, thus there speed limitation regarding incremental resolution.
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
Figure Maximum Rotation Speed allowing High-Resolution Position Determination Function Delay Time Ddelay
15000 N=2048 12500 10000 7500 5000 2500 N=1024 N=500
Max. high-resultion speed [rpm]
tdelay [us]
Conclusion
TMS320F240 controller designed meet wide range digital motor control applications, thus also incorporates peripherals support TTL-encoders well sin/cos encoders. This application report should help user sin/cos-encoders interfaced TMS320F240 controller, which have advantage either higher position resolution reduced sensor cost, since sin/cos-encoders require less line counts equivalent TTL-encoders achieve same resolution. sin/cos-encoder hardware interface requires only active components. careful hardware design also important, shown previous section, achieve optimum results. software initialize TMS320F240 obtain high-resolution position fully C-compatible allows quick easy implementation within digital control application programs, shown section, Implementation TMS320F240. position resolution achieved approximately times better than with TTLencoders identical line count. execution time obtaining high-resolution position approximately 15us. total program code size approximately words. Note cycles expected reduced 30-50%, when software routines written assembler language calls minimized.
References
TMS320C24x Controllers Reference Set: Vol.1 Texas Instruments Inc., 1997. TMS320F240 Data Sheet, Texas Instruments Inc., 1997.
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
TMS320C2x/C2xx/C5x Optimizing Compiler User's Guide, Texas Instruments Inc., 1995. Obtaining Absolute Encoder Position TMS320F240, Designer's Notebook #82, Texas Instruments Inc.,1997. TLV2772 Advanced LinCMOS Rail-to-Rail Dual Data Sheet, Texas Instruments Inc.,1998. TLC3702 Dual Micropower LinCMOS Voltage Comparator Data Sheet, Texas Instruments Inc.,1991. Selection Guide Incremental Rotary Encoders, Heidenhain GmbH, 1997. INTERNET: http://www.ti.com Server: ftp://ftp.ti.com/pub/tms320bbs
Appendix Source Code
Appendix provides listing assembler source code discussed section, Software Implementation. ENCODER.C
Name: ENCODER.C Project: ENCODER Originator: Martin Staebler Description: Provides functions handling incremental encoder with analog sin/cos output signal achieve higher position resolution Function List: void Encoder_Init(unsigned rollover) void Encoder_ZeroPosition(void) void Encoder_MatchIncrPhase(void) void Encoder_CalcPhase(int sin,int ncos) unsigned Encoder_SamplePosition(void) void Encoder_CalcPosition(unsigned
qep_incr_sample) Status: Target: TMS320C240
History: (Date, Revision, Who, What) -02/11/97 STAE Preliminary /*-*/ Header Files /*-*/ #include <stdlib.h> #include <math.h> #include <q15_div.h> q15.lib #include <q15_atan.h> q15.lib #include "c240.h" TMS320C240 memory mapped registers
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
#include #include #include #include
"adc.h" "evm_qep.h" "monitor.h" "encoder.h"
macros unit test program monitor encoder definition
/*-*/ Variable Declaration /*-*/ volatile unsigned encoder_position[2];
void Encoder_Init(unsigned rollover) Function: Incremental encoder initialization Arguments: Incremental counts/revolution 4-times line count Return value: None void Encoder_Init(unsigned rollover) /*-*/ Initialize F240 /*-*/ ADCTRL1 0x1800; enable both ADC's ADCTRL1 0x0100; clear interrupt flag ADCTRL2 0x0003; ADC_CLOCK SYSCLK/10 1MHz /*-*/ Initialize F240 Circuit /*-*/ QEP_Init(0x0,rollover); counts Timer /*-*/ zero incremental position (via index) synchronize incremental count phase /*-*/ Encoder_MSG(); turn encoder into zero position Encoder_ZeroPosition(); detect zero position adjust counter Encoder_MatchIncrPhase();/* match counter (quadrant) phase Encoder_Init
void Encoder_ZeroPosition(void) Function: Modify/adjust qep_diff, that incremental count encoder (using function QEP_GetIncr() matches with*/ phase derived from analog sin/-cos signal, shown below. void Encoder_ZeroPosition(void) Configure IOPC6/CAP3 detect level OCRB 0xFFBF; clear PCDATDIR 0xBFFF; clear
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
while !(PCDATDIR 0x0040)); T2CNT 0x0;
poll
void Encoder_MatchIncrPhase(void) Function: Modify/adjust qep_diff, that incremental count*/ encoder (using function QEP_GetIncr() matches with phase derived from analog sin/-cos signal, shown below. void Encoder_MatchIncrPhase(void) /*-*/ local variables /*-*/ char volatile buffer[2]; volatile unsigned ubuffer[2]; /*-*/ Synchronize incremental count encoder phase /*-*/ Assumption: ADCIN5 QEP1/sin(x) ADCIN13 QEP2/negcos(x) (T2CNT QEP_ENCODER) qep_diff Quadrant 0,1,2,3 /*-*/ /*-*/ aquire encoder signals /*-*/ ubuffer[1] Encoder_SamplePosition(); ADC_READ2(buffer[0],buffer[1]); Correct input signals offset buffer[0] buffer[0] ENC_U0_OFFSET; buffer[1] buffer[1] ENC_U90_OFFSET; /*-*/ check, nearly middle quadrant /*-*/ while 0x4000);
/*-*/ init qep_diff phase/count matching /*-*/ ubuffer[0] ubuffer[0] (ubuffer[0] 0x0003; extract quadrant ubuffer[1] ubuffer[1] 0x0003; qep_diff qep_diff ((int) ubuffer[1] (int) ubuffer[0]);
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
unsigned Encoder_SamplePosition(void); Function: Sample encoder signals SIMULTANEOUSLY SIN, -COS Channel (hardcoded) INCREMENTS Timer counter (T2CNT) Arguments: Buffer increments sample Return value: Incremental count asm("ADCTRL1 .set 7032h asm("T2CNT .set 7405h asm(" .ref _qep_diff asm(" .ref _QEP_GetIncr asm(" .def _Encoder_SamplePosition asm("_Encoder_SamplePosition: asm(" #ADCTRL1/128 asm(" lacl ADCTRL1 asm(" #0FF81h ;clear channels asm(" #005Bh ;select channel 13"); asm(" sacl ADCTRL1 ;(1) start ADC's #ifdef QEP_POWER2 asm(" #_qep_diff asm(" lacl asm(" _qep_diff asm(" #(T2CNT/128) asm(" asm(" asm(" ;capture Timer 800ns after start asm(" ;-asm(" T2CNT asm(" #(QEP_ROLLOVER-1) asm(" #else asm(" asm(" asm(" asm(" asm(" asm(" asm(" #endif
;capture Timer 800ns after start ;-"); call _QEP_GetIncr 500ns (NOP) 200ns (call) 100ns subroutine
void Encoder_CalcPosition(unsigned qep_incr_sample); Function: Calc encoder position increments (Timer Arguments: increments sample Global var's: unsigned qep_position[2]
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
Return value: None void Encoder_CalcPosition(unsigned qep_incr_sample) /*-*/ locals var's /*-*/ volatile sin_sample; volatile ncos_sample; volatile unsigned incr; volatile unsigned buffer; incr qep_incr_sample; /*-*/ read converted -cos encoder signals /*-*/ Correct (sin_sample (ncos_sample) offset sin_sample sin_sample ENC_U0_OFFSET; ncos_sample ncos_sample ENC_U90_OFFSET; /*-*/ phase calculation /*-*/ encoder_position[0] Encoder_CalcPhase(sin_sample, ncos_sample); /*-*/ correct incremental steps according phase information /*-*/ buffer ((encoder_position[0] 0x0003); switch (buffer) case ((incr 0x0003) incr (incr (qep_rollover-1); break; ((incr 0x0003) incr (incr (qep_rollover-1); break; switch remove (redundant) quadrant information (last bits) encoder_position[1] (incr Encoder_CalcPhase(int qep_sin,int qep_negcos); Function: Incremental encoder initialization Arguments: None Return value: None Encoder_CalcPhase(int qep_sin, qep_negcos) case
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
phase; buffer; /*-*/ general calculation, within quadrant /*-*/ (abs(qep_sin) abs(qep_negcos)) phase (PI/4); else (abs(qep_sin) abs(qep_negcos)) buffer phase q15_atan(buffer); phase q15p_atan(buffer); else buffer phase (PI/2) q15_atan(buffer); phase (PI/2) q15p_atan(buffer); /*-*/ 2nd, quadrant /*-*/ (qep_sin (qep_negcos phase phase; quadrant else qep_negcos phase phase; else phase -phase; else return phase;
quadrant quadrant
EVM_QEP.C Name: EVM_QEP.C Project: C240.LIB Originator: Martin Staebler Description: Initializes circuit module Provides functions serving module
Function List: Status: Target: History: TMS320C240 (Date, Revision, Who, What) void QEP_Init(unsigned zero_position) unsigned QEP_GetIncr(void)
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
-02/11/97 STAE Preliminary /*===============*/ Include Files /*===============*/ #include "c240.h" #include "evm_qep.h" /*==============*/ Global Var's /*==============*/ asm(" .bss _qep_rollover,1 asm(" .bss _qep_diff,1 asm(" .bss _qep_temp,1
align PAGE
void QEP_Init(unsigned zero_position, unsigned rollover) /*Function: Incremetal encoder (QEP Circuit) initialization based timer Arguments: unsigned zero_position unsigned rollover Return value: none void QEP_Init(unsigned zero_position, unsigned rollover) OCRB 0x30; enable qep1/2 mux'd inputs T2CON 0xD83A; enable circuit using timer2 15,14: timer doesn't emulation suspend 13-10: directional up/down 5-4: pulse circuit triggers timer 3-2: compare shadowed enable compare T2CON 0x0040; enable timer CAPCON 0x1D0F; CAPCON 0xE000;
enable decoder circuit
init rollover value zero position timer T2CNT zero_position; qep_rollover rollover; qep_diff unsigned QEP_GetIncr(void) Funtion Returns incremental step encoder 4-times resolution Arguments: None
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
Return value: unsigned incremental value module qep_rollover asm(" .text asm(" .def _qep_rollover asm(" .def _qep_diff asm(" .def _qep_temp asm(" .def _QEP_GetIncr asm("T2CNT .set 7405h asm("_QEP_GetIncr: asm(" ;read timer counter asm(" ;-asm(" #T2CNT/128 asm(" lacc T2CNT asm(" #_qep_temp asm(" sacl _qep_temp ;save temporarely asm(" asm(" ;modulo calculation asm(" ;-asm("check: lacc _qep_temp,16 asm(" _qep_diff,16 asm(" bcnd Nega,lt negative asm(" _qep_rollover,16 asm(" bcnd asm(" lacc _qep_diff,16 asm(" _qep_rollover,16 asm(" sach _qep_diff asm(" check; asm(" asm("Nega: lacc _qep_diff,16 asm(" _qep_rollover,16 asm(" sach _qep_diff asm(" check asm(" asm("OK: _qep_rollover,16 asm(" asm("EPI: sach _qep_temp asm(" lacc _qep_temp ;ACC Return Value asm("
Q15_DIV.ASM Name: Q15_DIV.ASM Project: Q15.LIB Originator: Martin Staebler
unsigned _q15_div(unsigned nom,unsigned denom) Function: positive fractional division range from 0000h 7FFFF Arguments: unsigned nominator: [0000h 7FFFFh] unsigned denominator: nominator check beforehand
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
Return value: dividend 0000h 7FFFh ;-.def _q15_div .text _q15_div: ;context save ;-popd ;push return address local var's AR1,* AR2,*,AR2 sbrk ;AR2 points first parameter ;division POSITIV fractional numbers ;-lacc subc *-,16 ;ACCL quotient ;context restore ;-mar *,AR1 sbrk pshd
;pop local var's from stack ;restore return address
Q15_ATAN.ASM Name: Q15_ATAN.ASM Project: Q15.LIB Originator: Martin Staebler Function: q15_atan(int) unsigned q15p_atan(unsigned) Status: Target: TMS320C240 History: (Date, Revision, Who, What) 02/11/97 STAE Preliminary
Include files ;-.include "q15_atan.inc" ;lookup table q15_atan(int);
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
Function: arcus tanges, fractional format Arguments: fractional min: -1.0 8000h max: 0.9999 7FFFh Return value: scaled angle (-PI/4 PI/4) scaling: (e.g. atan(1.0) 0.25 2000h) Error: (128 point lookup table) ;-.def _q15_atan ;define global .text _q15_atan: ;context save ;-popd ;push return address AR0, ;push frame pointer AR1, AR0,* ;init frame pointer adrk ;alocate space ;local variables *,AR2 AR2,#-3
;AR2 &parameter
;check negative ;-lacc adrk sacl bcnd OK,GEQ #8000h bcnd MINUS_1,EQ lacc sacl
;local abs(parameter)
;local abs(parameter)
;calculte atan POSITIV fractional numbers ;-lacc *+,tablen_lg2+1 ;lookup table length 2^tablen_lg2 sach ;local first table address lacc #table tblr ;local first value tblr ;local second value lacc *sub ;ACC difference local sacl ;local difference difference sbrk ;AR2 points local lacc *,tablen_lg2 ;ACC local tablen_lg2 #7FFFh ;make distance positiv value sacl ;local distance ;differnce distance
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
lacc apac sach
*-,16
;ACCH local first value ;ACC distance difference ;local 'positiv' result
;correct sign, necessary ;-lar AR2,#-3 lacc adrk bcnd POSITIV,GEQ lacc EPIO MINUS_1: lacc lacc #-4000h EPIO EPIO
;AR2 &parameter
;2's complement
POSITIV:
;ACCL fractional result ;does already
EPIO:
;context restore ;-spm *,AR1 sbrk #(3+1) ar0, *pshd
;default setting ;pop local var's+1 from stack ;restore frame pointer ;restore return address
unsigned q15p_atan(unsigned); Function: arcus tanges, positiv fractional format Arguments: fractional min: 0000h max: 0.9999 7FFFh Return value: scaled angle PI/4) scaling: (e.g. atan(1.0) 0.25 2000h) Error: (128 point lookup table) ;-.def _q15p_atan ;define global .text _q15p_atan: ;context save ;-popd ;push return address AR0, ;push frame pointer AR1, AR0,* ;init frame pointer adrk ;alocate space three local variables
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
*,AR2 AR2,#-3
;AR2 &parameter
;local parameter ;-lacc adrk sacl
;local parameter
;calculte atan POSITIV fractional numbers ;-lacc *+,tablen_lg2+1 ;lookup table length 2^tablen_lg2 sach ;local first table address lacc #table tblr ;local first value tblr ;local second value lacc *sub ;ACC difference local sacl ;local difference difference sbrk ;AR2 points local lacc *,tablen_lg2 ;ACC local tablen_lg2 #7FFFh ;make distance positiv value sacl ;local distance ;differnce distance lacc *-,16 ;ACCH local first value apac ;ACC distance difference sach ;local 'positiv' result lacc ;put into lowwer ;context restore ;-spm *,AR1 sbrk #(3+1) ar0, *pshd
;default setting ;pop local var's+1 from stack ;restore frame pointer ;restore return address
Q15_ATAN.INC atan(x), with output scalingfactor ;-tablen_lg2 .set .text atan lookup table ;-table:
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
.word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word .word
1056 1136 1217 1297 1377 1457 1537 1617 1696 1775 1854 1933 2012 2090 2168 2246 2324 2401 2478 2555 2632 2708 2784 2860 2935 3010 3085 3159 3233 3307 3380 3453 3526 3599 3670 3742 3813 3884 3955 4025 4095 4164 4233 4302 4370
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
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4438 4505 4572 4639 4705 4771 4836 4901 4966 5030 5094 5157 5220 5282 5344 5406 5467 5528 5589 5649 5708 5768 5826 5885 5943 6000 6058 6114 6171 6227 6282 6337 6392 6446 6500 6554 6607 6660 6712 6764 6815 6867 6917 6968 7018 7068 7117 7166 7214 7262 7310 7358 7405 7451 7498 7544 7589 7635
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
.word .word .word .word .word .word .word .word .word .word .word .word .word
7679 7724 7768 7812 7856 7899 7942 7984 8026 8068 8110 8151 8192
ENCODER.H Name: ENCODER.H Project: ENCODER Originator: Martin Staebler Description: Header File ENCODER.C #ifndef _ENCODER_H_ #define _ENCODER_H_
USER SETTABLE ENCODER CONSTANTS /*-*/ Incremental resolution /*-*/ #define QEP_ROLLOVER 8192 incremental counts asm("QEP_ROLLOVER .set 8192 dito, assembler support #define QEP_POWER2 undefine incremental count isn't power /*-*/ 'F240 ADC's input channel selection offset /*-*/ ADCIN5 (ADC0, channel selected ADCIN13 (ADC1, channel selected #define ENC_U0_OFFSET (0x8000 (sin) offset #define ENC_U90_OFFSET (0x8000 300) (-cos) offset
/*==================*/ OTHER CONSTANTS /*==================*/ #define #define ENABLE #define DISABLE
32768
/*-*/ Global Variables /*-*/ extern volatile unsigned encoder_position[2]; /*-*/
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
Function Declaration /*-*/ extern void Encoder_Init(unsigned rollover); extern void Encoder_ZeroPosition(void); extern void Encoder_MatchIncrPhase(void); extern Encoder_CalcPhase(int sin,int ncos); extern unsigned Encoder_SamplePosition(void); extern void Encoder_CalcPosition(unsigned qep_incr_sample); #endif
EVM_QEP.H Name: EVM_QEP.H Project: ENCODER Originator: Martin Staebler Description: module functions header
#ifndef _EVM_QEP_H_ #define _EVM_QEP_H_ extern volatile unsigned extern volatile qep_rollover; qep_diff;
unsigned QEP_GetIncr(void); void QEP_Init(unsigned zero_position, unsigned rollover); #endif
Q15_ATAN.H Name: Q15_ATAN.H q15_atan(int); -Function: arcus tanges, unsigned fractional format
Arguments: unsigned fractional min: 0000h max: 0.9999 7FFFh
Return value: scaled angle PI/4) scaling: (e.g. atan(1.0) 0.25 2000h) Error: (128 point lookup table) #ifndef #define _Q15_ATAN_H_ _Q15_ATAN_H_
unsigned q15p_atan(unsigned value); dito, only positive #endif
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
Q15_DIV.H /*-unsigned _q15_div(unsigned nom,unsigned denom) -Function: positive fractional division range from 0000h 7FFFF
Arguments: unsigned nominator: [0000h 7FFFFh] unsigned denominator: nominator check beforehand
Return value: dividend 0000h 7FFFh #ifndef _Q15_DIV_H_ #define _Q15_DIV_H_ unsigned q15_div(unsigned nom, unsigned denom); #endif
ADC.H Name: ADC.H Project: ENCODER Originator: Martin Staebler Description: Converter Marcos
#ifndef _ADC_H_ #define _ADC_H_ /*-*/ Include files /*-*/ #include "c240.h" /*-*/ Macros /*-*/ /*-*/ select ADC0/1 channel start ADC's /*-*/ #define ADC_START(ch_0_7,ch_8_15) ADCTRL1 0xFF81; ADCTRL1 (ch_0_7<<1) ((ch_8_15-8)<<4) 0x0001); /*-*/ read ADC0 value /*-*/ #define ADC_READ2(val0,val1) while(!(ADCTRL1 0x0100)); val0 ADCFIFO1; val1 ADCFIFO2; ADCTRL1 0x0100;
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
#endif
C240.H Name: C240.H Project: C240.LIB Description: TMS320C240 memory mapped registers
#ifndef _C240_H_ #define _C240_H_ Memory Mapped Register #define *(volatile unsigned int*) 0x0004 #define *(volatile unsigned int*) 0x0006
Watchodg Real time Interrupt Control Registers #define RTICNTR *(volatile unsigned int*) 0x7021 #define WDCNTR *(volatile unsigned int*) 0x7023 #define WDKEY *(volatile unsigned int*) 0x7025 #define RTICR *(volatile unsigned int*) 0x7027 #define WDCR *(volatile unsigned int*) 0x7029 Clock Registers #define CKCR0 *(volatile unsigned int*) 0x702B #define CKCR1 *(volatile unsigned int*) 0x702D Output Logic #define OCRA *(volatile unsigned int*) 0x7090 #define OCRB *(volatile unsigned int*) 0x7092 #define PADATDIR *(volatile unsigned int*) 0x7098 #define PBDATDIR *(volatile unsigned int*) 0x709A #define PCDATDIR *(volatile unsigned int*) 0x709C Definitions Module #define SCICCR *(volatile unsigned int*)0x7050 comms. ctrl. #define SCICTL1 *(volatile unsigned int*)0x7051 control register #define SCIHBAUD *(volatile unsigned int*)0x7052 Baud rate select #define SCILBAUD *(volatile unsigned int*)0x7053 Baud rate select #define SCICTL2 *(volatile unsigned int*)0x7054 Xmit int. ctrl status reg*/
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
#define SCIRXST
*(volatile unsigned int*)0x7055
#define SCIRXEMU *(volatile unsigned int*)0x7056 #define SCIRXBUF *(volatile unsigned int*)0x7057 #define SCITXBUF *(volatile unsigned int*)0x7059 #define SCIPC2 #define SCIPRI *(volatile unsigned int*)0x705E *(volatile unsigned int*)0x705F
ctrl status reg*/ Receiver data buffer Transmit data buffer Transmit data buffer*/ Port ctrl register Int. priority ctrl
Definitions Module structures computed uncorrectly Compiler v6.60 therefore following approach used #define ADCTRL1 *(volatile unsigned int*) 0x7032 Control #define ADCTRL2 *(volatile unsigned int*) 0x7034 Control #define ADCFIFO1 *(volatile unsigned int*) 0x7036 ADC1 result FIFO #define ADCFIFO2 *(volatile unsigned int*) 0x7038 ADC2 result FIFO
Definitions Module structures computed uncorrectly Compiler v6.60 #define GPTCON *(volatile unsigned int*) 0x7400 #define T1CNT *(volatile unsigned int*) 0x7401 #define T1CMPR *(volatile unsigned int*) 0x7402 #define T1PR *(volatile unsigned int*) 0x7403 #define T1CON *(volatile unsigned int*) 0x7404 #define T2CNT *(volatile unsigned int*) 0x7405 #define T2CMPR *(volatile unsigned int*) 0x7406 #define T2PR *(volatile unsigned int*) 0x7407 #define T2CON *(volatile unsigned int*) 0x7408 #define T3CNT *(volatile unsigned int*) 0x7409 #define T3CMPR *(volatile unsigned int*) 0x740A #define T3PR *(volatile unsigned int*) 0x740B #define T3CON *(volatile unsigned int*) 0x740C #define #define #define #define #define #define #define #define #define #define COMCON ACTR SACTR DBTCON CMPR1 CMPR2 CMPR3 SCMPR1 SCMPR2 SCMPR3 *(volatile *(volatile *(volatile *(volatile *(volatile *(volatile *(volatile *(volatile *(volatile *(volatile unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned int*) int*) int*) int*) int*) int*) int*) int*) int*) int*) 0x7411 0x7413 0x7414 0x7415 0x7417 0x7418 0x7419 0x741A 0x741B 0x741C
TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders
#define #define #define #define #define #define #define #define #define #define #define #define #define #define #define #endif
CAPCON CAPFIFO CAP1FIFO CAP2FIFO CAP3FIFO CAP4FIFO EVIMRA EVIMRB EVIMRC EVIFRA EVIFRB EVIFRC EVIVRA EVIVRB EVIVRC
*(volatile *(volatile *(volatile *(volatile *(volatile *(volatile *(volatile *(volatile *(volatile *(volatile *(volatile *(volatile *(volatile *(volatile *(volatile
unsigned unsigned unsigned unsigned unsigned unsigned
int*) int*) int*) int*) int*) int*) int*) int*) int*) int*) int*) int*) int*) int*) int*)
0x7420 0x7422 0x7423 0x7424 0x7425 0x7426 0x742C 0x742D 0x742E 0x742F 0x7430 0x7431 0x7432 0x7433 0x7434
unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned unsigned
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TMS320F240 DSP-Solution High-Resolution Position with Sin/Cos-Encoders

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