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FOCUS IDEAL LITTLE LOGIC SOLUTION FUNCTIONAL INDEX FUNCTIONA
Top Searches for this datasheetLOGIC OVERVIEW FOCUS IDEAL LITTLE LOGIC SOLUTION FUNCTIONAL INDEX FUNCTIONAL CROSS REFERENCE DEVICE SELECTION GUIDE PACKAGING MARKING INFORMATION LOGIC PURCHASING TOOL/ALTERNATE SOURCES LOGIC SELECTION GUIDE FIRST HALF 2002 IMPORTANT NOTICE Texas Instruments Incorporated subsidiaries (TI) reserve right make corrections, modifications, enhancements, improvements, other changes products services time discontinue product service without notice. Customers should obtain latest relevant information before placing orders should verify that such information current complete. products sold subject TI's terms conditions sale supplied time order acknowledgment. warrants performance hardware products specifications applicable time sale accordance with TI's standard warranty. Testing other quality control techniques used extent deems necessary support this warranty. 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Mailing Address: Texas Instruments Post Office 655303 Dallas, Texas 75265 Copyright 2002, Texas Instruments Incorporated INTRODUCTION CONTACTS/INFORMATION Texas Instruments offers full spectrum logic functions technologies from mature advanced, including bipolar, BiCMOS, CMOS. TI's process technologies offer logic performance features required modern logic designs, while maintaining support more traditional logic products. TI's offerings include products following process technologies device families: HOME PAGE http://www.ti.com ACT, AHC, AHCT, ALVC, AUC, AVC, FCT, HCT, LVC, ABT, ABTE, ALB, ALVT, BCT, HSTL, LVT, SSTL, SSTV BTA, CBT, CBTLV, FIFO, GTL, GTLP, JTAG, PCA, ALS, LOGIC HOME PAGE http://www.ti.com/sc/logic offers specialized, advanced logic products that improve overall system performance address design issues, including testability, skew requirements, termination, memory drivers, low-impedance drivers. offers wide variety packaging options, including advanced surface-mount packaging fine-pitch small-outline ball-grid-array (BGA) packages. newest package logic MicroStar very-thin, fine-pitch BGA. MicroStar complements MicroStar package deliver high performance allows designer double input/output density same circuit-board area reduce board area one-half, compared standard packaging technology. further information logic families, refer list current logic technical documentation provided this preface. overview logic, Section Section contains Focus Ideal Little Logic Solution. Sections contain functional index, functional cross-reference, device selection guide, respectively. These sections list functions offered, package availability, applicable literature numbers data sheets. Appendix includes additional information about packaging symbolization. Appendix provides cross-reference match other manufacturers' products those Data sheets downloaded from internet http://www.ti.com ordered through your local sales office authorized distributor. Please back cover this selection guide additional information. MILITARY SEMICONDUCTOR HOME PAGE PRODUCT INFORMATION CENTER http://www.ti.com/ cgi-bin/sc/support.cgi DATA SHEETS http://www.ti.com/sc/logic DOC, MicroStar BGA, MicroStar Jr., NanoStar, OEC, SCOPE, Shrink Widebus, TI-OPC, UBT, Widebus, Widebus+ trademarks Texas Instruments. CURRENT LOGIC TECHNICAL DOCUMENTATION Listed below current collection logic technical documentation. These documents ordered through representative authorized distributor referencing appropriate literature number. Document Literature Number Logic Advanced BiCMOS Technology Data Book (1997) SCBD002C AC/ACT CMOS Logic Data Book (1997) SCAD001D AHC/AHCT Logic Advanced High-Speed CMOS Data Book (April 2000) SCLD003B AHC/AHCT Designer's Guide (February 2000) SCLA013D ALS/AS Logic Data Book (1995) SDAD001C ALVC Advanced Low-Voltage CMOS Data Book (June 1999) SCED006A Advanced Very-Low-Voltage CMOS Data Book (March 2000) SCED008B BiCMOS Bus-Interface Logic Data Book (1994) SCBD001B Boundary-Scan Logic IEEE 1149.1 (JTAG) Data Book (1997) SCTD002A IEEE 1149.1 (JTAG) Testability Primer (1997) SSYA002C (5-V) CBTLV (3.3-V) Switches Data Book (December 1998) SCDD001B Design Considerations Logic Products Application Book (1997) SDYA002 Design Considerations Logic Products Application Book, Volume (September 1999) SDYA018 Design Considerations Logic Products Application Book, Volume (December 2000) SDYA019 Logic Data Book (1994) SDFD001B GTL/GTLP Logic High-Performance Backplane Drivers (September 2001) SCED004A HC/HCT Logic High-Speed CMOS Data Book (1997) SCLD001D Little Logic Data Book (November 2001) SCED010 Low-Voltage CMOS Logic Data Book (1998) SCBD152A Logic Low-Voltage Technology Data Book (1998) SCBD154 Mobile Computing Logic Solutions Data Book (July 1999) SCPD002 Semiconductor Group Package Outlines Reference Guide (1999) SSYU001E Signal Switch Including Digital/Analog/Bilateral Switches Voltage Clamps Data Book (December 2001) SCDD003 www.ti.com/sc/logic most current data sheets. TABLE CONTENTS SECTION LOGIC OVERVIEW Welcome World Logic Product Life Cycle Family Performance Positioning Low-Voltage Market Logic Supports Voltage Migration Choosing Logic 1-10 Logic Vendor Partnerships 1-11 Basics 1-12 Advanced-Logic Feature List 1-13 Bus-Hold Input 1-14 Damping Resistors 1-15 Partial Power Down 1-16 Insertion 1-17 Live Insertion 1-18 Mixed-Voltage Interfacing 1-19 Special "Dual-Supply" Level Shifters 1-20 Circuitry 1-21 Little Logic 1-22 Little Logic Applications 1-23 Little Logic Portfolio 1-24 1-25 1-26 Family 1-27 ALVC Family 1-28 Family 1-29 ALVT Family 1-30 CBTLV 1-31 CBT/CBTLV Product Family 1-32 1-33 GTLP Specifically Designed High-Performance Multislot Parallel Backplanes 1-34 What GTL/GTLP? 1-35 GTLP Bidirectional Translator 1-36 GTLP 1-37 Backplane Family 1-38 Memory Interface Roadmap 1-39 Solutions 1-40 Packaging Options 1-41 NanoStar Package 1-42 Device Names Package Designators 1-43 DSP-Sync FIFO Product Line 1-44 FIFO Product Technology Roadmap 1-45 Typical FIFO Applications Equipment 1-46 FIFOs Optimize System Performance 1-47 FIFO Resources 1-48 SECTION FOCUS IDEAL LITTLE LOGIC SOLUTION NanoStar Package SN74AUC1GxxYEA SECTION FUNCTIONAL INDEX Backplane Logic (GTL, GTLP, FB+/BTL, ABTE/ETL) Drivers Transceivers Boundary-Scan IEEE 1149.1 (JTAG) Logic Boundary-Scan (JTAG) Devices Boundary-Scan (JTAG) Support Devices Buffers Drivers Inverting Buffers Drivers Noninverting Buffers Drivers Switches 3-11 Exchange/Multiplexing Switches 3-11 Standard Switches 3-12 Counters 3-14 Binary Counters 3-14 Decade Counters 3-15 Decoders, Encoders, Multiplexers Decoders Multiplexers Priority Encoders 3-16 3-16 3-17 3-18 FIFOs (First-In, First-Out Memories) 3-19 Asynchronous FIFO Memories 3-19 Synchronous FIFO Memories 3-20 Flip-Flops D-Type Flip-Flops (3-state) D-Type Flip-Flops (non 3-state) Other Flip-Flops Gates Inverters Gates NAND Gates AND-OR-Invert Gates Gates Gates Exclusive-OR Gates Exclusive-NOR Gates Gate Delay Elements Inverters 3-21 3-21 3-22 3-23 3-23 3-23 3-24 3-25 3-25 3-26 3-26 3-27 3-27 3-28 viii TABLE CONTENTS (continued) SECTION (continued) Latches 3-29 D-Type Latches (3-state) 3-29 Other Latches 3-30 Little Logic Gates NAND Gates Gates Gates Exclusive-OR Gates D-Type Flip-Flops Inverters Inverting Buffers Drivers Noninverting Buffers Drivers Standard Switches 3-30 3-30 3-30 3-31 3-31 3-31 3-31 3-31 3-32 3-32 3-32 Memory Drivers Transceivers (HSTL, SSTL, SSTV) 3-33 Buffers, Drivers, Latches 3-33 Registers 3-33 Registers 3-33 Specialty Logic Adders Arithmetic Logic Units Bus-Termination Arrays Networks Comparators (identity) Comparators (magnitude) Digital Phase-Locked Loops (PLLs) Drivers/Multipliers ECL/TTL Functions Frequency Dividers/Timers Functions Monostable Multivibrators Oscillators Parity Generators Checkers Translation Voltage Clamps Voltage-Level Shifters Transceivers Parity Transceivers Registered Transceivers Standard Transceivers Universal Functions Universal Transceivers Universal Drivers Universal Exchangers 3-35 3-35 3-35 3-35 3-35 3-36 3-36 3-36 3-37 3-37 3-37 3-38 3-38 3-38 3-39 3-39 3-39 3-39 3-40 3-41 3-43 3-43 3-44 3-44 SECTION FUNCTIONAL CROSS REFERENCE SECTION DEVICE SELECTION GUIDE Advanced BiCMOS Technology Logic ABTE/ETL Advanced BiCMOS Technology/Enhanced Transceiver Logic 5-11 AC/ACT Advanced CMOS Logic 5-13 AHC/AHCT Advanced High-Speed CMOS Logic 5-21 Advanced Low-Voltage BiCMOS Logic 5-27 Advanced Low-Power Schottky Logic 5-29 ALVC Advanced Low-Voltage CMOS Technology Logic 5-35 ALVT Advanced Low-Voltage BiCMOS Technology Logic 5-39 Advanced Schottky Logic 5-41 Advanced Ultra-Low-Voltage CMOS Logic 5-45 Advanced Very-Low-Voltage CMOS Logic 5-47 BiCMOS Technology Logic 5-49 64BCT 64-Series BiCMOS Technology Logic 5-49 Bus-Termination Arrays 5-53 Crossbar Technology Logic 5-55 CBTLV Low-Voltage Crossbar Technology Logic 5-59 CD4000 CMOS B-Series Integrated Circuits 5-61 Fast Logic 5-65 FB+/BTL FutureBus+/Backplane Transceiver Logic 5-69 Fast CMOS Logic 5-71 FIFO First-In, First-Out Memories 5-79 Gunning Transceiver Logic 5-83 GTLP Gunning Transceiver Logic Plus 5-85 HC/HCT High-Speed CMOS Logic 5-89 IEEE 1149.1 (JTAG) Boundary-Scan Logic 5-99 Little Logic 5-103 Low-Power Schottky Logic 5-107 Low-Voltage CMOS Technology Logic 5-113 Low-Voltage CMOS Technology Logic 5-117 Low-Voltage BiCMOS Technology Logic 5-123 PCA/PCF Inter-Integrated Circuit Applications 5-127 Schottky Logic 5-129 SSTL/SSTV Stub Series-Terminated Logic 5-133 HSTL High-Speed Transceiver Logic 5-133 Transistor-Transistor Logic 5-135 Translation Voltage Clamp Logic 5-139 TABLE CONTENTS (continued) APPENDIX PACKAGING MARKING INFORMATION Device Names Package Designators Logic Products Device Names Package Designators Logic Products Formerly Offered Cypress Semiconductor Device Names Package Designators Logic Products Formerly Offered Harris Semiconductor Logic Marking Guidelines Moisture Sensitivity Package A-15 Packaging Cross-Reference A-17 APPENDIX LOGIC PURCHASING TOOL/ALTERNATE SOURCES LOGIC OVERVIEW FOCUS IDEAL LITTLE LOGIC SOLUTION FUNCTIONAL INDEX FUNCTIONAL CROSS REFERENCE DEVICE SELECTION GUIDE PACKAGING MARKING INFORMATION LOGIC PURCHASING TOOL/ALTERNATE SOURCES LOGIC OVERVIEW SECTION LOGIC OVERVIEW CONTENTS Welcome World Logic Product Life Cycle Family Performance Positioning Low-Voltage Market Logic Supports Voltage Migration Choosing Logic 1-10 Logic Vendor Partnerships 1-11 Basics 1-12 Advanced-Logic Feature List 1-13 Bus-Hold Input 1-14 Damping Resistors 1-15 Partial Power Down 1-16 Insertion 1-17 Live Insertion 1-18 Mixed-Voltage Interfacing 1-19 Special "Dual-Supply" Level Shifters 1-20 Circuitry 1-21 Little Logic 1-22 Little Logic Applications 1-23 Little Logic Portfolio 1-24 1-25 1-26 Family 1-27 ALVC Family 1-28 Family 1-29 ALVT Family 1-30 CBTLV 1-31 CBT/CBTLV Product Family 1-32 1-33 GTLP Specifically Designed High-Performance Multislot Parallel Backplanes 1-34 What GTL/GTLP? 1-35 GTLP Bidirectional Translator 1-36 GTLP 1-37 Backplane Family 1-38 Memory Interface Roadmap 1-39 Solutions 1-40 Packaging Options 1-41 NanoStar Package 1-42 Device Names Package Designators 1-43 DSP-Sync FIFO Product Line 1-44 FIFO Product Technology Roadmap 1-45 Typical FIFO Applications Equipment 1-46 FIFOs Optimize System Performance 1-47 FIFO Resources 1-48 Welcome World Logic Specialty GTLP Logic SSTL SSTV CD4000 AC/ACT HC/HCT AHC/ AHCT 3.3-V Logic LV-A LVC1G ALVT HSTL ALVC CBTLV 2.5-V Logic ALVC CBTLV ALVT 1.8-V Logic ALVC Product Life Cycle ALVT GTLP ALVC CBTLV Little Logic CD4000 Bipolar CMOS BiCMOS SSTV Growth Maturity Decline Obsolescence Introduction remains committed last supplier older families. Investment levels products all-time high. Family Performance Positioning GTLP ALVT Drive (mA) GTLP ALVC *1H02 AC/ACT AC/T AHC/T ALVC ALVT CBTLV GTLP HC/T Advanced BiCMOS Technology Advanced CMOS Advanced High-Speed CMOS Advanced Low-Voltage BiCMOS Advanced Low-Voltage CMOS Advanced Low-Voltage BiCMOS Technology Advanced Very Low-Voltage CMOS Advanced Ultra-Low-Voltage CMOS BiCMOS Technology Crossbar Technology Low-Voltage Technology Bipolar Technology Fast CMOS Technology Gunning Transceiver Logic Plus High-Speed CMOS Low-Voltage HCMOS Low-Voltage CMOS Low-Voltage BiCMOS Technology AHC/AHCT CBTLV HC/HCT Speed (ns) Low-Voltage Market Coverage Standardization AHC, ACT, ALS, ALVC ALVC ALVC ALVT ALVT Speed Performance 6.5-ns -24/24 Ultra-low standby power sources hold tolerant Gate functions Ioff 4-ns -32/64 standby power sources hold tolerant insertion ALVC 3-ns -24/24 Very-low 8.5-ns 13.5-ns (3.3 -8/8 -4/4 (3.3 3.3-V input tolerant sources ALVT 2.4-ns -32/64 standby power standby power sources sources hold hold tolerant insertion Auto 3-state <2-ns -12/12 Very-low standby power sources hold 3.6-V tolerant Ioff 2-ns speed -8/8-mA drive Ultra-low standby power sources hold 3.6-V tolerant Ioff Logic Supports Voltage Migration AC*: AHC*: ABT*: LV245: AHC*: LV245: LVT*: LVC*: ALVC*: ALVT*: ALB*: LV245: LVC* ALVC*: ALVT*: AVC* AUC* Additional Interface Capabilities V-2.5 LVC, LVCC3245, ALVT V-1.8 V-1.8 LVC, LVC*: ALVC*: AVC*: AUC*: LV245: LVC4245: LVCC3245: LVCC4245: ALVC164245: AUC* LV245: LVC*: LVCC3245: AVC*: LVC*: AVC*: 16245 functions 1-10 CHOOSING LOGIC ABT, ABT, ABT, AC/ACT ABT, ABT, ABT, ABT, AHC, PRIMARY CONCERN SECONDARY CONCERN HIGH DRIVE ALVT, LVT, ALVC AVC, ALVC, ALVT ALVC, LVT, ALVC, LVT, HIGH SPEED NOISE POWER HIGH SPEED ALVT, LVT, ALVC AVC, ALVC, ALVT ALVC, LVT, LVC, HIGH DRIVE NOISE POWER HIGH SPEED NOISE HIGH DRIVE POWER ALVC, LVT, LVC, HIGH SPEED ABT, AHC, LVT, ALVC ALVC, ALVT, LVT, POWER HIGH DRIVE NOISE ALVC, LVT, LVC, Logic Vendor Partnerships Performance Range high ALVT ALVC Philips Hitachi ALVT ALVC Toshiba ABT-C high medium ALVC ALVC high high 1-11 1-12 Comparison Switching Standards 4.44 Basics higher than VIH? 5TTL 5CMOS 3LVTTL 5TTL 5CMOS 3LVTTL 25CMOS 25CMOS Requires Tolerance Standard TTL: ABT, AHCT, HCT, ACT, Bipolar CMOS Rail-to-Rail AHC, 3.3-V LVTTL LVT, LVC, ALVC, ALVT 2.5-V CMOS AVC, ALVC, LVC, ALVT Advanced-Logic Feature List 1-13 hold CBT, ABT, LVC, ALVC, LVT, ALVT, AVC, GTL, GTLP, Bus-hold circuitry selected logic families helps solve problem floating inputs eliminates need pullup pulldown resistors holding last known state input. II(HOLD) data sheet. Series damping resistors ABT, LVC, ALVC, LVT, ALVT, GTLP Series damping resistors limit signal overshoot undershoot providing better impedance matching line termination without need external resistors. Ioff (partial power down) ABT, LVC, LVT, ALVT, AVC, GTL, GTLP, IOFF circuitry prevents device from being damaged during insertion. IOFF specifications data sheet. Power-up 3-state (hot insertion) ABT, LVT, ALVT, LVCZ, GTLP Power-up 3-state ensures valid output levels during power valid outputs during power down. IOZPU, IOZPD. BIAS (live insertion) GTLP, ABTE, CBT, CBTLV, GTL, GTLP, VBIAS precharges capacitance threshold voltage, preventing glitching active data. Mixed-voltage-tolerant I/Os level shifting LVC, ALVC, LVT, ALVT, AVC, GTL, GTLP, Systems mixed supply voltages CMOS levels many designs. Most advanced-logic families allow mixed-signal interfacing provide level-shifting functions certain mixed-voltage applications. DOCcircuit revolutionary DOCcircuitry automatically lowers circuit output impedance during signal transition later raises after signal transition reduce noise. JTAG ACT, BCT, ABT, (selected functions) trademark Texas Instruments. 1-14 Bus-Hold Input Holds last known state Bus-Hold Input Cell input avoids floating inputs Ii(HOLD) ±75-µA holding Input Inverter Stage current Bus-hold current does load down driving output significantly valid logic levels. Eliminates need external Device Boundary Bus-hold input cell replaces pullup resistor resistors unused floating input/output pins device name indicates hold. Families Providing Bus-Hold Options ALVC ALVT Damping Resistors Provides better impedance matching line termination Allows current limitation Eliminates need external Output series resistors Extra device name indicates damping resistor option. pins (LVCHR16245) Output pins (LVC162244) Damping resistors replace external series resistors Families Providing Damping Resistor Options ALVC ALVT HSTL 1-15 1-16 Partial Power Down Live Insertion, Level System Function Capability Circuit Implementation IOFF Circuit Ioff Feature Blocking Diode Parasitic Clamping Diode IOUT When IOUT VOUT Prevents unexpected device behavior during power power down Prevents signals from sourcing current through clamping diodes Allows power down partial circuits within system Ioff supporting device specification. Families Supporting Partial Power Down (Ioff Feature) ALVT GTLP Insertion Live Insertion, Level System Function/Capability Example Example Circuit Implementation Circuit Implementation PU3S Circuit PU3S Circuit Output Supporting Device Specifications IOFF Power-up 3-state IOZPU, IOZPD 1-17 Live Insertion Live Insertion, Level System Function/Capability Circuit Implementation Circuit Implementation Pre-Charge Circuit Pre-Charge Circuit 1-18 BIAS Pre-Charge Circuit Output Stage Supporting Device Specifications IOFF Power-up 3-state IOZPU, IOZPD BIAS Card Connector Socket BIAS Mixed-Voltage Interfacing Open-Drain Output 05/06/07 Functions Functions Available TTL, ALS, AHC, TTL, LVC, LVC1G, AUC1G TTL, LVC, LVC1G, AUC1G Also Possible Wired-Function Technique VCC1 VCC2 RPULLUP RPULLUP Required Input level depends VCC1 Output level depends VCC2 LVC07 function Supply voltage VCC1 1-19 LVC07 understands 1.8-V levels 2.5-V levels 3.3-V levels levels Pullup resistor connected Level conversion range V-5.5 V-5.5 V-5.5 V-5.5 1-20 Special ``Dual-Supply'' Level Shifters 'LVC4245, 'LVCC3245, 'LVCC4245, 'ALVC164245 '4245 pinout VCCA '245 pinout VCCB VCCB 'ALVC164245 'LVC4245 have pins 3.3-V pins. 'LVCC3245 'LVCC4245 have adjustable output voltages. 'LVCC3245 have side from while other side between 'LVCC4245 fixed while other side connected between this way, full mixed-mode system designed. 1DIR VCC1 VCC1 2DIR '4245 LVCC3245 LVCC4245 devices This '164245 This solution compatible with 3.3-V-only system. Devices replaced later with 3.3-V parts without redesign VCC2 VCC2 DOCCircuitry Available With DOCcircuitry uses high drive only when needed (during transition) 2.32 Output Voltage 2.01 1.81 1.55 1.29 1.03 0.77 0.52 0.25 20.7 21.4 22.1 22.8 23.5 24.2 24.9 25.6 26.3 Region drive during steady state signal Region Region Region Output impedance dynamically lowered during signal transition drive line. Region Output impedance dynamically raised reduce noisy signal overshoots undershoots. Region Switching Time DOCCircuit Delivers high drive current achieve maximum speed Reduces overshoot undershoot normally associated with fast edges Eliminates need damping resistors Suited point-to-point applications trademark Texas Instruments. 1-21 1-22 Little Logic Single Gate/Dual Gate/Triple Gate Principle Example Single Gate Easy Naming From SN74 SN74 Standard Prefix Commercial Product Family AHC, AHCT, LVC, CBT, Single Gate Dual Gate Triple Gate Logic Function Package Type NanostarPackage SC-70 SOT-23 US-8 SM-8 Tape Reel SN74AHC1G00DCKR SN74AHCT1G00DBVR Dual Gate SN74AHC2G00DCTR SN74AHCT2G00DCUR Triple Gate SN74LVC3G04DCTR SN74LVC3G04DCUR Little Logic Applications Little Logic allows designers ability greatly simplify design routing maximize core chip (ASIC/DSP) development. continues deliver Little Logic maximize design investment help designers almost every end-equipment build more simple, powerful, cost-effective designs. Care Abouts Voltage node Small package Propagation delay Reduced noise Package height Determined core system voltage. dominant today, lower-voltage systems increasing core voltages drive down toward offers lowest-voltage solution market. optimized operates down Smaller package sizes allow designers place particular gate function close related circuitry, shortening simplifying routes board. offers smallest logic package world with NanoStarwafer chip scale. System speed performance cannot compromised logic functionality. offers fastest Little Logic solutions with AUC. addresses market's need noise small portable equipments. NanoStarpackage addresses world's most advanced height requirements with 0.5-mm thickness. 1-23 1-24 Little Logic Portfolio Operating Optimize Family Voltage Voltage Prop Delaytyp Output Drive Tolerant Ioff 0.8-2.5 1.65-5.5 2.0-5.5 Introducing World's First 1.8-V Logic Family NanoStarPackage World's First Logic Wafer Chip Scale Packaging Features World's First 1.8-V Logic FAMILY 1.8-V Optimized Performance Specified Typical Balanced Drive 3.6-V Tolerance Hold (II(HOLD)) IOFF Spec Partial Power Down Protection Noise Second-Source Agreements Schedule Little Logic WidebusOctal Device SN74AUC1G00 SN74AUC16244 1-25 Advanced Packaging NanoStarYEA (Microgate) SC-70 (PicoGate) TSSOP TVSOP LFBGA VFBGA Samples Sampling 1Q02 2Q02 Production Releasing 2Q02 2Q02 Drive -8/8 -8/8 2nd-Source Agreement Philips Philips, Philips, TPD(MAX) 1-26 Features Specified 3.3-V Tolerance Sub-2.0-ns Hold IOFF Partial Power Down Dynamic Drive-Through DOCCircuit Advanced Packaging SOIC TSSOP TVSOP LFBGA VFBGA Device SN74AVC16244 SN74AVC16244 SN74AVC16244 Drive -12/12 (static) -8/8 (static) -4/4 (static) TPD(MAX) trademark Texas Instruments. Features Family Advanced Packaging NanoStar- (Microgate) SC-70 (PicoGate) SOIC SSOP TSSOP TVSOP LFBGA VFBGA Specified Balanced Drive Tolerance Hold (II(HOLD)) Series Damping Resistor Option IOFF Spec Partial Power Down Power-Up 3-State Selected Functions LVCZ Protection Noise Device SN74LVCH244 SN74LVCH16244 LVC: Fast Drive -24/24 -24/24 TPD(MAX) Second Source LVC: Philips, Hitachi, LCX: Fairchild, Motorola, Toshiba Literature Low-Voltage CMOS Logic Data Book Designers Guide Application Report 1-27 SCBD152A SDZAE16 1-28 Features ALVC Family Advanced Packaging SOIC SSOP TSSOP TVSOP LFBGA VFBGA Specified Balanced Drive Hold (II(HOLD)) Live Insertion (IOFF PU3S) Drive Capability -6/12 Noise Damping Resistor Options Protection ALVC: Faster Device SN74ALVCH244 SN74ALVCH16244 Drive -24/24 -24/24mA TPD(MAX) Literature ALVC Low-Voltage CMOS Logic Data Book SCBD152A Second Source ALVC: Philips, Hitachi, VCX: Fairchild, Motorola, Toshiba Features Specified High Output Drive Tolerance Hold (II(HOLD)) IOFF Spec Partial Power Down ±100 Power-Up 3-State Noise Power Demand Damping Resistor Options Protection Device SN74LVTH244 SN74LVTH16244 Family Advanced Packaging SOIC SSOP TSSOP TVSOP LFBGA VFBGA Drive -32/64 -32/64 TPD(MAX) Literature Low-Voltage Technology Data Book SCBD154 LVT-to-LVTH Conversion Application Report Internet Second Source LVT: Philips, Hitachi, Fairchild*, Motorola* Same Device, Second-Source Agreement 1-29 1-30 ALVT Family Features Specified High Output Drive Tolerance Power-Up 3-State Auto 3-State IOFF Spec Partial Power Down ±100 Hold Advanced Packaging SSOP TSSOP TVSOP LFBGA VFBGA Device SN74ALVTH16244 SN74ALVTH16244 Drive -32/64 -8/24 TPD(MAX) Literature ALVT Low-Voltage Technology Data Book SCED003 Second Source ALVT: Philips CBTLV Circuit Diagram VIN/VOUT Graph VOUT N-Channel N-Channel Features Level shifting SN74CBTDxxx Precharged outputs SN74CBT6800 CBTLV Circuit Diagram CBTLV VIN/VOUT Graph VOUT P-Channel N-Channel P-Channel N-Channel CBTLV Features level shifting Precharged outputs SN74CBTLV16800 1-31 1-32 CBT/CBTLV Product Family Extremely propagation delays make crossbar switches effective replacement drivers receivers high-speed systems which signal buffering required. CBT/CBTLV3384 Switch Channels What Switches (CBT/CBTLV)? Simple switches specified (CBT) (CBTLV) support easy communication between devices, i.e., memory ASIC. Near-zero propagation delay enables highest system speed. tpd(MAX) 0.25 both CBTLV Very power consumption makes them ideal portable systems. ICC(MAX) ICC(MAX) CBTLV Where Switches Used? Wide application: PCs, workstations, hard disk drives, boards, translators, hot-card insertion, telecommunication equipment CBTxxxx Functionally equivalent QSxxxx CBTLVxxxx Functionally equivalent PI3Bxxxx Which Package Choose Industry standard pinouts ('244, '245) CBT/CBTLV3383 Exchanger Channels Fine-pitch packaging (SOIC, SSOP, TSSOP, TVSOP, WidebusTM, Shrink Single switches AVAILABLE SN74CBT/CBTLV1G125, 1G384, D1G384, D1G125. CBT6800 CBTLV16800 switch with precharged outputs available *Widebus Shrink Widebus trademarks Texas Instruments. Translation Voltage Clamp Protects components sensitive high-state voltage-level overshoots Acts voltage translator voltage clamp Absolute voltage range -0.5 Need least 1.0-V drop across ports. A-port voltage A-port pin. Voltage very close rest pins. pullup resistor need pull voltage from supply voltage required. 1-33 1-34 GTLP Specifically Designed High-Performance Multislot Parallel Backplanes Mass Storage ISDN Remote Access Internet Routers ASwitches Wireless Base Stations Flight Equipment Termination Backplane Trace Connector Transceiver ASIC Industrial Controls Aerospace Transportation Medical Instrumentation Systems GTLP Open-drain technology Transceiver Push-pull output structure Transmits data Mbit/s legacy termination topologies Backward compatible existing backplane Allows high frequencies 100-MHz clock) Standard pinouts allow ease migration from standard logic Improved signal integrity over standard logic Reduced input threshold greater noise immunity What GTL/GTLP? Open-drain n-channel CMOS outputs. pullup resistor pulls signal high device pulls signal low. Receiver stage differential input with external VREF. VREF derived from simple RCVR R/2R voltage divider termination voltage, VTT. 1.5V GTL+ provides increased noise margin over 1.2V 1.05 GTL. GTLP GTL+ signal levels 0.85 1.00 0.80 0.95 same, GTLP edge rates have been 0.75 0.55 optimized distributed loads. 0.40 reduced voltage swing reduces power consumption EMI. GTL+/GTLP 1-35 1-36 GTLP Bidirectional Translator CARD SIDE BACKPLANE SIDE TI-OPCOvershoot Protection Circuitry OECImproved Output Edge Control Live Insertion Reduced Edge Rate Control (ERC) 1.05 VREF 1.00 0.95 0.55 GTLP Port 1.5V LVTTL Port Control Pins 3.3-V Tolerant Drive +/-24 Bus-Hold Option Flow-Through Pinout RCVR VREF Sink Differential Input GTLP Distributed-Load Devices Features CMOS 3.3-V Tolerant Ioff, PU3S, BIAS Slow Edge Rates Port Benefits Power Consumption Mixed Supply Capability Supports Live Insertion Reduced Port +/-24 +/-12 Bus-Hold Option Die) Port (BTL) (22- Effective Characteristic Impedance) TI-OPC 1-37 Standard CMOS Output Need Pullup/Pulldown Port GTLP Applications High Drive Heavily Loaded Systems Improved Signal Integrity Helps Live Insertion 1-38 Backplane Family Features BiCMOS Push-Pull Output 3.3-V VCC, Tolerant Ioff, PU3S, BIAS Slow Edge Rates Port Benefits Optimized Device Performance Improved System Performance Over +/-24 +/-12 Bus-Hold Option Port +/-48 Standard Devices (ABT, LVT, etc.) Mixed System Supply Capability Supports Live Insertion Reduced Port Standard CMOS Output Need Pullup/Pulldown Port High Output Drive Incident Wave Switching Memory Interface Roadmap PC1600/2100 1.8-V Design 2.5-V/BGA Design SSTV16857 SSTV16859 SSTV32852 SSTV32867/77 CDC857-2 CDCV857 CDCV857A Bandwidth (GB/S) 3.2G 2.1G 1.6G 1.1G 0.8G DDR-II PC2400/2700 SSTV16857 SSTV16859 SSTV32867 CDCV857B SSTU32XXX CDCUXXX PC66 PC133 PC100 ALVC16334 ALVC16834 ALVC16835 ALVC162334 ALVC162834 ALVC162835 ALVC162836 AVC16334 AVC16834 AVC16835 AVC16836 CBT16292/ CBTR16292 CBTLV16292 CBTLVR16292 CDCF2509/10 FPM/E CUSTOM ABT16244 LVT16244 1987 1-39 1998 1999 2000 2001 2002 2003 2004 Year 1-40 Solutions Using JEDEC Standard SSTV Devices PC1600/2100 JEDEC 1.7" TSOP DRAMs Bank SDRAMs 48-pin TSSOP Card loads PC1600/2100 Low-Profile TSOP DRAMs -pin TSSOP Card loads/output PC2700 Low-Profile DRAMs SSTV16857 Card 48-pin TSSOP loads/output SSTV16857 SSTV16857 Bank SSTV16857 SSTV16857 SDRAMs 48-pin TSSOP 48-pin TSSOP Card Card Bank loads loads/output SDRAMs SSTV16859 SSTV32852 Bank SDRAMs 64-pin TSSOP Card loads/output 114-ball LFBGA Card loads/output SSTV16859 Card 64-pin TSSOP loads/output Card Current Solution Released Product Packaging Options Bits Bits Bits 16/18 Bits Widebus16/18 Bits 16/18 Bits Shrink WidebusWidebus16/18 Bits MicroStar Jr. 20-Pin SOIC Area 2.65 1.27 20-Pin SSOP Area 0.65 20-Pin TSSOP Area 0.65 48-Pin SSOP Area 2.74 0.635 48-Pin TSSOP Area 48-Pin TVSOP Area 56-Ball VFBGA Area 31.5 0.65 Single Gate (magnified detail) Dual/Triple Gate (magnified detail) Bits MicroStar 5-Pin Area 8.12 0.95 5-Pin Area 0.65 5-Pin DSBGA 8-Pin Area 8.26 0.65 8-Pin Area 96-Ball LFBGA Area 74.25 114-Ball LFBGA Area NanoStar1-41 Area 1.26 NanoStar, MicroStar Jr., Widebus, Shrink Widebus trademarks Texas Instruments. DSBGA JEDEC reference wafer chip scale package (WCSP). 1-42 NanoStarPackage World's Smallest Logic Package First wafer chip scale package (WCSP) logic smaller than industry standard SC70 (DCK) smaller than other logic package available 0.5-mm height meets most aggressive design requirements. Improved electrical characteristics (inductance, capacitance) Improved thermal characteristics Targeted space-constrained applications: cellular, DVD/CD ROMs, MD/MP3/CD players, VCRs, DVC, digital STB, DSC, notebook computers, cards, personal digital assistants, rework Initial offerings 5-ball Little Logic single gates Family ABT/E AC/ACT AHC/AHCT Standard Prefix Military (54) ALVC Commercial (74) ALVT Special Feature Blank special features CBT/LV Configurable CD4000 Level Shifting Diode Hold Undershoot Clamp Damping Resistor Inputs/Outputs GTLP Schottky Clamping Diodes HC/HCT Power State HSTL Width Blank Gates, MSI, Octals Single Gate Dual Gate Triple Gate SSTL Octal IEEE 1149 (JTAG) SSTV Widebus(16,18, Widebus IEEE 1149.1 (JTAG) Widebus+(32 bit) Device Names Package Designators SN74 Tape Reel Package Type D,DW SOIC DB,DL SSOP DBB,DGV TVSOP DCT,DCU TSSOP DBV, DGG,PW TSSOP LCCC PLCC CPGA GKE,GKF LFBGA VFBGA HFP,HS,HT,HV CQFP J,JT CDIP N,NP,NT PDIP PAG,PAH,PCA,PCB,PM, TQFP PH,PQ,RC W,WA,WD DSBGA Device Revision Blank Revision Letter Designator Function Options Blank Options Series Damping Resistor Outputs Level Shifter Level Shifter Line Driver 1-43 DSBGA JEDEC reference wafer chip scale package (WCSP). 1-44 DSP-Sync FIFO Product Line DSP-Sync FIFOs Provide Glueless Interface Leading-Edge DSPs Technology Leadership Creates World-Class FIFO Performance Manufacturing Excellence Ensures Lowest Total Cost Ownership FIFO Product Technology Roadmap Configuration: Performance Clock MHz) 65Kx18 32Kx36 512x18 4Kx18 512x36 2Kx36 64x18 2Kx36 DSP-Sync FIFOs SN74V2x3 SN74V36x0 (3Q01) (1H02) DSP-Sync FIFOs SN74V2x5 0.35 ALVC36xx (Now) (Now) ALVC78xx ACT36xx ABT36xx ACT78xx (Now) (Availability) 1-45 1-46 Typical FIFO Applications Equipment Typical Applications: Bus-to-Bus Speed Matching Clock Synchronization Data Acquisition Typical Equipment: Accelerator Cards ATM/SONET Digital Signal Processing Digital Disk Drivers Workstations FDDI (Fiber Distr. Data) Graphics Systems High-End Computers High-End Copiers High-End Printers Industrial Controls LAN/WAN Medical Imaging Modems Networking Systems Parallel Processors (Private Branch Exch.) PCMCIA Cards Routers Scanners SCSI Boards Servers Switches Telecom Base Stations Video Telecom Boards Interface Elastic Stores Buffering Microprocessor Interface Slip Buffers Transmit Buffer FIFOs Optimize System Performance LOCAL MEMORY (Fast SRAM) FIFO GLOBAL MEMORY (Slower Dual-Port SRAM) FIFO LOCAL MEMORY (Fast SRAM) ANALOG BACK TMS320 TMS320 ANALOG BACK ANALOG FRONT FIFO FIFO ANALOG FRONT 1-47 1-48 FIFO Resources FIFO Homepage: http://www.ti.com/sc/fifo Comprehensive FIFO Product Listing FIFO Data Sheets, Related Application Notes, General Pricing Information FIFO Product Selection Guide FIFO Cross-Reference Guide FIFO-Related Application Notes Request FIFO Qual-Data Request Engineering Samples DSP-Sync FIFOs FIFO Homepage also accessible from Product Menu main Homepage http://www.ti.com LOGIC OVERVIEW FOCUS IDEAL LITTLE LOGIC SOLUTION FUNCTIONAL INDEX FUNCTIONAL CROSS REFERENCE DEVICE SELECTION GUIDE PACKAGING MARKING INFORMATION LOGIC PURCHASING TOOL/ALTERNATE SOURCES FOCUS IDEAL LITTLE LOGIC SOLUTION SECTION FOCUS IDEAL LITTLE LOGIC SOLUTION CONTENTS NanoStar Package SN74AUC1GxxYEA FOCUS IDEAL LITTLE LOGIC SOLUTION today's ever-changing environment digital electronics, designs getting smaller, faster, smarter. This seen most often consumer electronics. Around world, consumers demanding that their phones, PDAs, notebooks smaller, maintain extended battery life and, course, faster. project engineer's meet these demands, without sacrificing other. heart migration core voltage nodes from even down 1.8-V node. Designers converting core processors these lower-voltage nodes while, same time, searching supporting logic functions. With such task, designers should have worry about choosing right logic. Texas Instruments offers proper logic option that will help optimize performance, power, space. introduction (Advanced Ultra-Low-Voltage CMOS) teamed with NanoStar package, world's smallest logic package, presents designer with perfect Little Logic solution. Introduced October 2001, logic industry's first logic family optimized with operation from sub-1-V levels (0.8 tolerant This sub-1-V family operates power high speeds while maintaining overall system signal integrity. optimized 1.8-V node, offers propagation delay (max) (max) replacing fastest logic family. also help extend life design because compatible with legacy devices wide range operating voltages. Features such Ioff hold also help advance family premier logic family. Figure Progression Lower Requirements FOCUS IDEAL LITTLE LOGIC SOLUTION worked closely with Philips develop specifications family. currently releasing Little Logic, with Philips offering alternate source. Subsequently, 2002, IDT, Philips, will release octals WideBus devices. Based this collaboration, alternate-source agreements place. packaging options endless but, more important, plans unveil NanoStar package (YEA). NanoStar Package NanoStar package, wafer chip-scaled package technology, major breakthrough logic packaging that uses package. 1.26 mm2, footprint that smaller than industry standard SC-70 (DCK) package smaller than other logic package available. Space requirements always issue, Little Logic NanoStar package reduces these requirements several times over traditional 5-pin options (see Figure 0,50 0,25 0,95 0,85 1,00 1,45 1,35 0,50 0,35 Seating Plane 0,19 0,15 0,05 NOTE linear dimensions millimeters. 0,05 0,15 0,10 0,50 Figure NanoStar Package Dimensions Little Logic optimizes circuit routing densely populated boards, enabling compact designs. quick design errors, Little Logic reduces time market minimizes design investment types systems, such PCs, PDAs, servers, workstations, handheld general-purpose applications. FOCUS IDEAL LITTLE LOGIC SOLUTION SN74AUC1GxxYEA putting latest low-voltage logic family, AUC, world's smallest logic package (NanoStar package), designers have ideal logic solution. Only offers smallest, fastest, lowest-power logic device industry. With demands user, design engineers challenged select right logic remedy that meets footprint requirements. SN74AUC1GxxYEA developed meet demands lower supply voltages, faster speeds, smaller form factors, lower power consumption, without sacrificing signal integrity. Leave your logic worries here long haul, thank using logic. LOGIC OVERVIEW FOCUS IDEAL LITTLE LOGIC SOLUTION FUNCTIONAL INDEX FUNCTIONAL CROSS REFERENCE DEVICE SELECTION GUIDE PACKAGING MARKING INFORMATION LOGIC PURCHASING TOOL/ALTERNATE SOURCES FUNCTIONAL INDEX SECTION FUNCTIONAL INDEX CONTENTS Backplane Logic (GTL, GTLP, FB+/BTL, ABTE/ETL) Drivers Transceivers Boundary-Scan IEEE 1149.1 (JTAG) Logic Boundary-Scan (JTAG) Devices Boundary-Scan (JTAG) Support Devices Buffers Drivers Inverting Buffers Drivers Noninverting Buffers Drivers Switches 3-11 Exchange/Multiplexing Switches 3-11 Standard Switches 3-12 Counters 3-14 Binary Counters 3-14 Decade Counters 3-15 Decoders, Encoders, Multiplexers Decoders Multiplexers Priority Encoders 3-16 3-16 3-17 3-18 FIFOs (First-In, First-Out Memories) 3-19 Asynchronous FIFO Memories 3-19 Synchronous FIFO Memories 3-20 Flip-Flops D-Type Flip-Flops (3-state) D-Type Flip-Flops (non 3-state) Other Flip-Flops Gates Inverters Gates NAND Gates AND-OR-Invert Gates Gates Gates Exclusive-OR Gates Exclusive-NOR Gates Gate Delay Elements Inverters 3-21 3-21 3-22 3-23 3-23 3-23 3-24 3-25 3-25 3-26 3-26 3-27 3-27 3-28 CONTENTS (continued) Latches 3-29 D-Type Latches (3-state) 3-29 Other Latches 3-30 Little Logic Gates NAND Gates Gates Gates Exclusive-OR Gates D-Type Flip-Flops Inverters Inverting Buffers Drivers Noninverting Buffers Drivers Standard Switches 3-30 3-30 3-30 3-31 3-31 3-31 3-31 3-31 3-32 3-32 3-32 Memory Drivers Transceivers (HSTL, SSTL, SSTV) 3-33 Buffers, Drivers, Latches 3-33 Registers 3-33 Registers 3-33 Specialty Logic Adders Arithmetic Logic Units Bus-Termination Arrays Networks Comparators (identity) Comparators (magnitude) Digital Phase-Locked Loops (PLLs) Drivers/Multipliers ECL/TTL Functions Frequency Dividers/Timers Functions Monostable Multivibrators Oscillators Parity Generators Checkers Translation Voltage Clamps Voltage-Level Shifters Transceivers Parity Transceivers Registered Transceivers Standard Transceivers Universal Functions Universal Transceivers Universal Drivers Universal Exchangers 3-35 3-35 3-35 3-35 3-35 3-36 3-36 3-36 3-37 3-37 3-37 3-38 3-38 3-38 3-39 3-39 3-39 3-39 3-40 3-41 3-43 3-43 3-44 3-44 Product available technology indicated Product available reduced-noise advanced CMOS (11000 series) product planned technology indicated center open collector open drain 3-state BACKPLANE LOGIC (GTL, GTLP, FB+/BTL, ABTE/ETL) Drivers Transceivers DESCRIPTION 1:6/1:2 GTLP-to-LVTTL Fanout Drivers Dual 1-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Transceivers with Split LVTTL Port, Feedback Path, Selectable Polarity 2-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Transceivers with Selectable Polarity 7-Bit TTL/BTL Transceivers (IEEE 1194.1) 8-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Registered Transceivers with Split LVTTL Port Feedback Path 8-Bit LVTTL-to-GTLP Transceivers 8-Bit TTL/BTL Registered Transceivers (IEEE 1194.1) 8-Bit TTL/BTL Transceivers (IEEE 1194.1) 9-Bit TTL/BTL Address/Data Transceivers (IEEE 1194.1) 11-Bit Incident Wave Switching Transceivers with 3-State Open-Collector Outputs 16-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Transceivers LVTTL-to-GTL/GTL+ Universal Transceivers with Live Insertion LVTTL-to-GTLP Adjustable-Edge-Rate Universal Transceivers 16-Bit Incident Wave Switching Transceivers with 3-State Outputs 16-Bit LVTTL-to-GTLP Transceivers 17-Bit LVTTL-to-GTL/GTL+ Universal Transceivers with Buffered Clock Outputs 17-Bit LVTTL-to-GTLP Universal Transceivers with Buffered Clock 17-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Universal Transceivers with Buffered Clock 17-Bit TTL/BTL Universal Storage Transceivers with Buffered Clock Lines (IEEE 1194.1) 17-Bit LVTTL/BTL Universal Storage Transceivers with Buffered Clock Lines (IEEE 1194.1) 18-Bit TTL/BTL Universal Storage Transceivers (IEEE 1194.1) 18-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Universal Transceivers 18-Bit LVTTL-to-GTL/GTL+ Universal Transceivers 18-Bit LVTTL-to-GTLP Universal Transceivers TYPE 1395 21395 1394 2041 22033 2034 22034 2033 2040 2031 16246 1645 1655 1655 16245 16945 16616 16916 1616 1651 1653 1650 1612 16612 16612 TECHNOLOGY ABTE GTLP FUNCTIONAL INDEX BACKPLANE LOGIC (GTL, GTLP, FB+/BTL, ABTE/ETL) Drivers Transceivers (continued) DESCRIPTION 18-Bit LVTTL-to-GTL/GTL+ Transceivers 18-Bit LVTTL-to-GTLP Universal Transceivers 32-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Transceivers 32-Bit LVTTL-to-GTLP Transceivers TYPE 16622 16923 16912 3245 32945 TECHNOLOGY ABTE GTLP Scan-Test Devices with Octal Transceivers Scan-Test Devices with 18-Bit Transceivers Scan-Test Devices with Octal Buffers BOUNDARY SCAN IEEE 1149.1 (JTAG) LOGIC Boundary Scan (JTAG) Devices DESCRIPTION OUTPUT TYPE 8245 18245 18640 18646 Scan-Test Devices with 18-Bit Transceivers Registers 182646 18652 182652 18502 Scan-Test Devices with 18-Bit Universal Transceivers 182502 18512 182512 18504 Scan-Test Devices with 20-Bit Universal Transceivers 182504 18514 8240 8244 8646 8652 TECHNOLOGY Scan-Test Devices with 18-Bit Inverting Transceivers Scan-Test Devices with Octal Transceivers Registers Boundary Scan (JTAG) Devices (continued) DESCRIPTION Scan-Test Devices with Octal D-Type Latches Scan-Test Devices with Octal D-Type Edge-Triggered Flip-Flops Scan-Test Devices with Octal Registered Transceivers OUTPUT TYPE 8373 8374 8543 8952 TECHNOLOGY Boundary Scan (JTAG) Support Devices DESCRIPTION Embedded Test-Bus Controllers with 8-Bit Generic Host Interfaces Test-Bus Controllers IEEE 1149.1 (JTAG) Masters with 16-Bit Generic Host Interfaces 10-Bit Addressable Scan Ports Multidrop-Addressable IEEE 1149.1 (JTAG) Transceivers Scan-Path Linkers with 4-Bit Identification Buses Scan-Controlled IEEE 1149.1 (JTAG) Concatenators OUTPUT TYPE 8980 8990 8996 8997 TECHNOLOGY BUFFERS DRIVERS Inverting Buffers Drivers DESCRIPTION Single Dual Triple OUTPUT Buffers/Converters Drivers Schmitt Triggers TYPE 1G06 1G240 2G240 3G06 1005 4009 4049 1004 40106 TECHNOLOGY AHCT ALVC ALVT 64BCT CD4K GTLP FUNCTIONAL INDEX BUFFERS DRIVERS Inverting Buffers Drivers (continued) DESCRIPTION Strobed Inverters/Buffers OUTPUT TYPE 4502 Octal 11240 1244 Octal with Input Pullup Resistors Octal Buffers Line/MOS Drivers with Series Damping Resistors 11-Bit Line/Memory Drivers 12-Bit Line/Memory Drivers with Series Damping Resistors 32-Bit GTLP-to-LVTTL 1-to-6 Fanout Drivers TECHNOLOGY AHCT ALVC ALVT 64BCT CD4K GTLP 2240 29828 5401 5403 16240 16540 162240 162244 32240 Noninverting Buffers Drivers DESCRIPTION OUTPUT Single Buffers TYPE AHCT ALVC ALVT TECHNOLOGY 64BCT CD4K 1G07 1G17 1G125 1G126 2G125 2G241 3G07 3G34 1035 4503 4010 4050 1034 Dual Buffers Triple Buffers Quad Buffers Buffers Buffers/Converters Buffers/ Line Drivers Drivers Gate Line Drivers Octal CP/3S Octal with Series Damping Resistors Octal Buffers 1244 11244 2244 25244 FUNCTIONAL INDEX BUFFERS DRIVERS Noninverting Buffers Drivers (continued) DESCRIPTION Octal Buffers Line/MOS Drivers with Series Damping Resistors Octal Line Drivers/ Drivers with Series Damping Resistors 11-Bit Line/Memory Drivers 12-Bit Line/Memory Drivers OUTPUT TYPE AHCT ALVC ALVT 3-10 2241 2541 29827 2827 5400 5402 16241 with Series Damping Resistors with Series Damping Resistors with Series Damping Resistors with Balanced Drive Series Damping Resistors 1-Bit 2-Bit Address Drivers 16244 16541 162244 16825 162825 16827 162827 162827 162830 TECHNOLOGY 64BCT CD4K Noninverting Buffers Drivers (continued) DESCRIPTION 1-Bit 4-Bit Address Drivers 1-to-4 Address Registers/Drivers 4-Segment Liquid Crystal Display Drivers OUTPUT TYPE AHCT ALVC ALVT TECHNOLOGY 64BCT CD4K 16344 162344 16831 16832 32244 4054 SWITCHES Exchange/Multiplexing Switches DESCRIPTION 1-of-8 Multiplexers/Demultiplexers Dual 1-of-4 Multiplexers/Demultiplexers 4-Bit 1-of-2 Multiplexers/Demultiplexers 10-Bit Bus-Exchange Switches 12-Bit 1-of-2 Multiplexers/Demultiplexers with Internal Pulldown Resistors 12-Bit 1-of-3 Multiplexers/Demultiplexers Synchronous 16-Bit 1-of-2 Multiplexers/Demultiplexers 16-Bit 1-of-2 Multiplexers/Demultiplexers 16-Bit 32-Bit Multiplexer/Demultiplexer Switches 18-Bit Bus-Exchange Switches 24-Bit Bus-Exchange Switches 24-Bit Bus-Exchange Switches with Schottky Diode Clamping TYPE 3251 3253 3257 3383 16292 162292 16214 16232 16233 16390 16209 16212 16213 16212 16213 TECHNOLOGY CBTLV FUNCTIONAL INDEX 3-11 SWITCHES Standard Switches DESCRIPTION Single Switches Single Switches with Level Shifting Dual Switches Dual Switches with Level Shifting Dual Switches with Schottky Diode Clamping Quad Bilateral Switches Quad Switches Single Bilateral Switches 4-Bit Analog Switches with Level Translation Octal Switches TYPE 1G125 1G384 1G125 1G384 3306 3306 3306 4016 4066 3125 3126 1G66 4316 3244 3245 3345 10-Bit Switches 10-Bit Switches with Internal Pulldown Resistors 10-Bit Switches with Level Shifting 10-Bit Switches with Precharged Outputs Diode Clamping 10-Bit Switches with Precharged Outputs Active Clamp Undershoot Protection 10-Bit Switches with Precharged Outputs Live Insertion 10-Bit Switches with Schottky Diode Clamping 16-Bit Switches 16-Bit Switches with Active Clamp Undershoot Protection 20-Bit Switches 20-Bit Switches with Active Clamp Undershoot Protection 3384 3861 3857 3861 6800 6800 6800 3384 16244 16245 16245 16210 16861 16861 TECHNOLOGY CBTLV CD4K 3-12 Standard Switches (continued) DESCRIPTION 20-Bit Switches with Level Shifting 20-Bit Switches with Precharged Outputs 20-Bit Switches with Series Damping Resistors 24-Bit Switches 24-Bit Switches with Hold 24-Bit Switches with Level Shifting 24-Bit Switches with Schottky Diode Clamping 32-Bit Switches 32-Bit Switches with Active Clamp Undershoot Protection TYPE 16210 16861 16800 19861 16211 16211 16211 16211 34X245 32245 TECHNOLOGY CBTLV CD4K FUNCTIONAL INDEX 3-13 COUNTERS Binary Counters DESCRIPTION Divide Ripple Dual Dual Presettable Up/Down Presettable Up/Down with Dual Clock Reset Presettable Synchronous Up/Down Programmable with Asynchronous Clear Synchronous Synchronous Up/Down Synchronous with Preset Asynchronous Clear Synchronous with Preset Synchronous Clear 8-Bit Counters/Dividers with 1-of-8 Decoded Outputs with 3-State Output Registers with Input Registers with Input Registers Parallel Counter Outputs Synchronous Up/Down Presettable Synchronous Down 7-Stage Ripple-Carry Counters/Dividers 12-Stage Ripple-Carry Counters/Dividers 14-Stage Ripple-Carry Counters/Dividers with Oscillators Stage Divide Programmable Divide Presettable Up/Down Decade TYPE 4520 4516 40193 40161 4022 40103 4024 4040 4020 4060 4045 4018 4059 4029 TECHNOLOGY CD4K 3-14 Decade Counters DESCRIPTION Divide Divide Dual Divide Divide Synchronous Presettable Up/Down Counters/Dividers with 1-of-10 Decoded Outputs Counters/Drivers with Decoded 7-Segment Display Outputs BCD-to-Decimal Decoders Presettable Up/Down Dual Programmable Divide Decade Synchronous Presettable Down Up-Down Counters/Latches/7-Segment Display Drivers Presettable BCD-Type Up/Down with Dual Clock Reset TYPE 4017 4026 4033 4028 4510 4518 4522 40102 40110 40192 TECHNOLOGY CD4K FUNCTIONAL INDEX 3-15 DECODERS, ENCODERS, MULTIPLEXERS Decoders DESCRIPTION OUTPUT TYPE Dual 2-to-4 Line Decoders/Demultiplexers Dual 2-Line 4-Line Memory Decoders with On-Chip Supply-Voltage Monitors Dual Binary 1-of-4 Decoders/Demultiplexers 3-to-8 Line Decoders/Demultiplexers 3-to-8 Line Inverting Decoders/Demultiplexers 3-to-8 Line Decoders/Demultiplexers with Address Latches Line Decimal 4-Bit Latch/4 Line 4-to-16 Line Decoders/Demultiplexers BCD-to-Decimal Decoders/Drivers 7-Segment Decoders/Drivers 7-Segment Latches/Decoders/Drivers 7-Segment Decoders/Drivers with Display-Frequency Outputs 7-Segment Decoders/Drivers with Strobed Latch Function 7-Segment Latches/Decoders/Drivers LCDs 11139 2414 4555 4556 11138 4514 4515 4511 4055 4056 4543 TECHNOLOGY AHCT CD4K 3-16 Multiplexers DESCRIPTION Single 2-to-1 Line Data Selectors/Multiplexers 1-of-8 Analog Multiplexers/Demultiplexers 1-of-8 Analog Multiplexers/Demultiplexers with Logic Level Conversion 1-of-8 Analog Multiplexers/Demultiplexers with Latches 1-of-8 Data Selectors 1-of-8 Data Selectors/Multiplexers 1-of-8 Data 1-of-8 Differential Analog Multiplexers/Demultiplexers 1-of-16 Analog Multiplexers/Demultiplexers 1-of-16 Data Selectors/Multiplexers 1-of-16 Data Generators/Multiplexers Dual 1-of-4 Data Selectors/Multiplexers Dual Analog Multiplexers/Demultiplexers Dual 1-of-4 Analog Multiplexers/Demultiplexers Dual 1-of-4 Analog Multiplexers/Demultiplexers with Logic Level Conversion Dual 1-of-4 Analog Multiplexers/Demultiplexers with Latches Triple 1-of-2 Analog Multiplexers/Demultiplexers Triple 1-of-2 Analog Multiplexers/Demultiplexers with Logic Level Conversion Quad 1-of-2 Data Selectors/Multiplexers CP/3S Quad 1-of-2 Data Selectors/Multiplexers with Series Damping Resistors Quad 2-to-1 Data Selectors/Multiplexers 3-17 OUTPUT TYPE 2G157 4051 4051 4351 4512 4097 4067 2G53 4052 4052 4352 4053 4053 11257 2257 40257 TECHNOLOGY AHCT CD4K FUNCTIONAL INDEX DECODERS, ENCODERS, MULTIPLEXERS Multiplexers (continued) DESCRIPTION Quad 2-to-1 Data Selectors/Multiplexers with Storage Quad 2-to-4 Data Selectors/Multiplexers 2-to-1 Universal Multiplexers 4-to-1 Multiplexers/Demultiplexers Nonvolatile 5-Bit Registers with Interface OUTPUT TYPE 16460 8550 TECHNOLOGY AHCT CD4K 3-18 Priority Encoders DESCRIPTION OUTPUT TYPE Line Line Line 4532 40147 TECHNOLOGY CD4K FIFOs (FIRST FIRST MEMORIES) Asynchronous FIFO Memories DESCRIPTION OUTPUT TYPE 40105 Bidirectional 1024 Bidirectional 1024 2048 7814 7814 7806 7806 7804 7804 7820 2235 7802 7808 TECHNOLOGY ALVC CD4K FUNCTIONAL INDEX 3-19 FIFOS (FIRST FIRST MEMORIES) Synchronous FIFO Memories DESCRIPTION Independent Bidirectional Independent Bidirectional Bidirectional Bidirectional 1024 1024 1024 2048 2048 2048 2048 OUTPUT TYPE 2226 2227 7813 7813 3611 3613 3612 3614 2228 2229 7805 7805 3622 7803 7803 7819 3631 3631 3632 3638 7811 7881 3641 3641 7807 7882 3651 3651 TECHNOLOGY ALVC 3-20 FLIP FLOPS Type Flip Flops state) DESCRIPTION Dual Edge Triggered Quad Octal Interface OUTPUT 3S/CP Octal Edge Triggered TYPE 29825 11374 Octal Edge Triggered Dual Rank Octal Edge Triggered with Series Damping Resistors Octal Inverting 4374 2374 2574 Interface 29823 Interface with Dual Outputs 29821 16820 162820 16374 Edge Triggered 162374 163374 3-21 16823 162823 TECHNOLOGY AHCT ALVC ALVT FUNCTIONAL INDEX FLIP FLOPS Type Flip Flops state) (continued) DESCRIPTION OUTPUT TYPE 16721 162721 16722 16821 Edge Triggered 32374 TECHNOLOGY AHCT ALVC ALVT 3-22 Type Flip Flops (non state) DESCRIPTION Single Edge Triggered OUTPUT TYPE 1G79 1G80 4013 Dual Quad 11074 11175 40175 with Enable Octal Octal with Enable 40174 TECHNOLOGY AHCT ALVC ALVT CD4K Other Flip Flops DESCRIPTION Dual Edge-Triggered Master-Slave Dual Edge-Triggered with Reset Dual Edge-Triggered with Reset Dual Positive-Edge-Triggered with Reset Quad Edge-Triggered TYPE 4027 TECHNOLOGY CD4K GATES INVERTERS Gates DESCRIPTION Single Input Dual Input OUTPUT TYPE 1G08 2G08 Quad Input 11008 4081 Quad 2-Input Buffers/Drivers Quad Input with Schmitt-Trigger Inputs Dual Input Triple Input 1008 7001 4082 4073 TECHNOLOGY AHCT ALVC CD4K FUNCTIONAL INDEX 3-23 GATES INVERTERS NAND Gates DESCRIPTION Single Input Dual Input Dual 2-Input Buffers/Drivers Quad Input Quad 2-Input Buffers/Drivers Quad Input Unbuffered Quad Input with Schmitt-Trigger Inputs 2-Input Drivers Triple Input Dual Input Dual 4-Input Positive Line Drivers Input Input AND/NAND Input OUTPUT TYPE 1G00 2G00 40107 11000 4011 1000 4011 4093 1804 4023 4012 11030 4068 TECHNOLOGY AHCT ALVC CD4K 3-24 Invert Gates DESCRIPTION Dual Wide Input Dual Wide Input, Wide Input Expandable Wide Input Expandable Input TYPE 4085 4086 4048 TECHNOLOGY CD4K Gates DESCRIPTION Single Input Dual Input Quad Input Quad 2-Input Buffers/Drivers Quad Input with Schmitt-Trigger Inputs 2-Input Drivers Dual Input Triple Input OUTPUT TYPE 1G32 2G32 11032 4071 1032 7032 4072 4075 TECHNOLOGY AHCT ALVC CD4K FUNCTIONAL INDEX 3-25 GATES INVERTERS Gates DESCRIPTION Single Input Dual Input Quad Input Quad Input with Schmitt-Trigger Inputs Quad Input Unbuffered 2-Input Drivers Triple Input Dual Input Dual Input with Strobe Dual Input Input NOR/OR OUTPUT TYPE 1G02 2G02 4001 7002 4001 4025 4002 4078 TECHNOLOGY AHCT CD4K 3-26 Exclusive Gates DESCRIPTION Single Input Dual Input OUTPUT TYPE 1G86 2G86 4030 4070 Quad Input 11086 TECHNOLOGY AHCT CD4K Exclusive Gates DESCRIPTION OUTPUT Quad Input TYPE 4077 7266 TECHNOLOGY CD4K Gate Delay Elements DESCRIPTION Dual Unbuffered Complementary Pairs Plus Inverters Quad AND/OR Select Gates Quad True/Complement Buffers Quad Complementary-Output Elements Delay Elements Generating Delay Lines Gates Inverters, 2-Input NOR, 2-Input NAND) TYPE 4007 4019 4041 4572 TECHNOLOGY CD4K FUNCTIONAL INDEX 3-27 GATES INVERTERS Inverters DESCRIPTION Single Unbuffered Single Single Schmitt Trigger Triple Triple Schmitt Trigger Unbuffered Schmitt Trigger OUTPUT TYPE 1G04 1GU04 1G14 3G04 3G14 11004 4069 TECHNOLOGY AHCT ALVC CD4K 3-28 LATCHES Type Latches state) DESCRIPTION Dual Octal Inverting Transparent TYPE 11373 Octal Transparent Octal Transparent Read Back Octal Transparent with Series Damping Resistors 2373 2573 Transparent Transparent Read Back Transparent Multiplexed Multiplexed with Series Damping Resistors Transparent Transparent Transparent Transparent 29843 29841 16260 162260 16373 162373 16843 16841 162841 32373 TECHNOLOGY AHCT ALVC ALVT FUNCTIONAL INDEX 3-29 LATCHES Other Latches DESCRIPTION Dual Bistable Transparent Dual with Strobe Bistable Quad Clocked Quad NAND Quad Quad Addressable D-Type Transparent Read Back Edge Triggered Read Back D-Type Transparent Read Back OUTPUT TYPE 4508 4042 4044 4043 4099 4724 TECHNOLOGY CD4K 3-30 LITTLE LOGIC Gates DESCRIPTION Single Input Dual Input TYPE 1G08 2G08 TECHNOLOGY AHCT NAND Gates DESCRIPTION Single Input Dual Input TYPE 1G00 2G00 TECHNOLOGY AHCT Gates DESCRIPTION Single Input Dual Input TYPE 1G32 2G32 TECHNOLOGY AHCT Gates DESCRIPTION Single Input Dual Input TYPE 1G02 2G02 TECHNOLOGY AHCT Exclusive Gates DESCRIPTION Single Input Dual Input TYPE 1G86 2G86 TECHNOLOGY AHCT Type Flip Flops DESCRIPTION Single Edge Triggered Single Edge Triggered with Preset Clear TYPE 1G79 1G80 2G74 TECHNOLOGY Inverters DESCRIPTION Single Single Schmitt Trigger Triple Schmitt Trigger 3-31 TYPE 1G04 1GU04 1G14 3G04 3G14 TECHNOLOGY AHCT FUNCTIONAL INDEX LITTLE LOGIC Inverting Buffers Drivers DESCRIPTION Single Dual Triple OUTPUT TYPE 1G06 1G240 2G240 3G06 TECHNOLOGY 3-32 Noninverting Buffers Drivers DESCRIPTION Single Single Buffers Single Schmitt Trigger Dual Buffers Triple OUTPUT TYPE 1G07 1G125 1G126 1G17 2G125 2G241 3G07 3G34 TECHNOLOGY AHCT Standard Switches DESCRIPTION Single Bilateral (Analog Digital) Single Single with Level Shifting Dual Bilateral (Analog Digital) TYPE 1G66 1G125 1G384 1G125 1G384 2G66 TECHNOLOGY CBTLV MEMORY DRIVERS TRANSCEIVERS (HSTL, SSTL, SSTV) Buffers, Drivers, Latches DESCRIPTION 9-Bit 18-Bit HSTL-to-LVTTL Memory Address Latches 13-Bit 26-Bit Registered Buffers with SSTL_2 Inputs Outputs 14-Bit Registered Buffers with SSTL_2 Inputs Outputs 14-Bit 28-Bit HSTL-to-LVTTL Memory Address Latches 20-Bit SSTL_3 Interface Buffers 20-Bit SSTL_3 Interface Universal Drivers 24-Bit 48-Bit Registered Buffers with SSTL_2 Inputs Outputs 26-Bit Registered Buffers with SSTL_2 Inputs Outputs 26-Bit Registered Buffers with SSTL_2 Inputs LVCMOS Outputs OUTPUT TYPE 16918 16859 16857 162822 16847 16837 32852 32877 32867 TECHNOLOGY HSTL SSTL SSTV REGISTERS Registers DESCRIPTION 1-Bit 4-Bit Address Registers/Drivers OUTPUT TYPE 162831 162832 Bidirectional Universal Shift Cascadable Shift D-Type Stage Parallel-In/Parallel-Out Shift Dual Stage Static Shift 4-by-4 Register Files Dual 16-by-4 Register Files Shift Diagnostic Scan 3-33 40194 4076 4035 4015 TECHNOLOGY AHCT ALVC CD4K FUNCTIONAL INDEX REGISTERS Registers (continued) DESCRIPTION Multilevel Pipeline Serial Parallel Shift Parallel Serial Shift with Gated Clock Parallel Serial Serial Shift Shift with Output Registers Shift with 3-State Output Registers Shift with 3-State Output Latches Shift with Input Latches Shift with Input Latches 3-State Input/Output Ports Universal Shift/Storage Stage Static Shift 8-Stage Shift-and-Store 8-Stage Static Bidirectional Parallel-/Serial-Input/Output Serial In/Out with 16-Bit Parallel-Out Storage Stage Static Shift Dual Stage Static Shift OUTPUT TYPE 4014 4021 4094 4034 4031 4517 TECHNOLOGY AHCT ALVC CD4K 3-34 SPECIALTY LOGIC Adders DESCRIPTION Binary Full with Fast Carry TYPE TECHNOLOGY Arithmetic Logic Units DESCRIPTION Arithmetic Logic Units/Function Generators Look-Ahead Carry Generators TYPE TECHNOLOGY Termination Arrays Networks DESCRIPTION Dual 4-Bit Programmable Terminators 8-Bit Schottky Barrier Diode Bus-Termination Arrays 10-Bit Bus-Termination Networks with Hold 12-Bit Schottky Barrier Diode Bus-Termination Arrays 16-Bit Bus-Termination Networks with Hold 16-Bit Schottky Barrier Diode Bus-Termination Arrays 16-Bit Schottky Barrier Diode Bus-Termination Arrays TYPE 40117 1056 1071 1050 1051 1073 1052 1053 1016 TECHNOLOGY CD4K FUNCTIONAL INDEX Comparators (identity) DESCRIPTION Identity Identity with Input Pullup Resistors Identity with Input Pullup Resistors 3-35 Address OUTPUT TYPE TECHNOLOGY SPECIALTY LOGIC Comparators (magnitude) DESCRIPTION TYPE 4063 4585 TECHNOLOGY CD4K 3-36 Digital Phase Locked Loops (PLLs) DESCRIPTION Digital PLLs PLLs with PLLs with Lock Detectors TYPE 4046 7046 TECHNOLOGY CD4K Drivers/Multipliers DESCRIPTION 4-Bit Binary Rate Multipliers Rate Multipliers Synchronous 6-Bit Binary Rate Multipliers TYPE 4089 4527 TECHNOLOGY CD4K ECL/TTL Functions DESCRIPTION Octal ECL-to-TTL Translators Octal ECL-to-TTL Translators with Edge-Triggered D-Type Flip-Flops Octal TTL-to-ECL Translators with Edge-Triggered D-Type Flip-Flops Output Enable Octal TTL-to-ECL Translators with Output Enable OUTPUT TYPE 10KHT5541 10KHT5574 10KHT5578 10KHT5542 10KHT5543 TECHNOLOGY Frequency Dividers/Timers DESCRIPTION 24-Stage Frequency Dividers Programmable Frequency Dividers/Digital Timers Programmable Timers TYPE 4521 4536 4541 TECHNOLOGY CD4K Functions DESCRIPTION Nonvolatile 5-Bit Resistors Remote 8-Bit Expanders TYPE 8550 8574 8574A TECHNOLOGY FUNCTIONAL INDEX 3-37 SPECIALTY LOGIC Monostable Multivibrators DESCRIPTION Power Monostable/Astable Monostable Multivibrators with Schmitt-Trigger Inputs Retriggerable Dual Dual with Schmitt-Trigger Inputs Dual Precision Dual Retriggerable with Reset Dual Retriggerable Precision TYPE 4047 4098 14538 4538 TECHNOLOGY AHCT CD4K 3-38 Oscillators DESCRIPTION Single Crystal Controlled Single Voltage Controlled Dual Voltage Controlled TYPE TECHNOLOGY Parity Generators Checkers DESCRIPTION Dual Odd/Even with Bus-Driver Parity Input/Output Port OUTPUT TYPE 11286 TECHNOLOGY Translation Voltage Clamps DESCRIPTION TYPE 3010 16222 TECHNOLOGY Voltage Level Shifters DESCRIPTION Quad High TTL-to-CMOS CMOS-to-CMOS Operation TYPE 40109 4504 TECHNOLOGY CD4K TRANSCEIVERS Parity Transceivers DESCRIPTION Octal with Parity Generators/Checkers OUTPUT TYPE 29833 29854 Dual with Parity Generators/Checkers 16833 16853 16657 TECHNOLOGY FUNCTIONAL INDEX 3-39 TRANSCEIVERS Registered Transceivers DESCRIPTION OUTPUT TYPE 11543 Octal 11652 OC/3S 2543 Octal with Series Damping Resistors 2646 2652 2952 16470 16543 162543 16646 162646 16651 16652 162652 16952 162952 16524 Multiplexed/Demultiplexed 16525 162525 32543 162460 TECHNOLOGY ALVC 3-40 Standard Transceivers DESCRIPTION Dual LVTTL GTLP Adjustable Edge Rate with Split LVTTL Port, Feedback Path, Selectable Polarity LVTTL GTLP Adjustable Edge Rate with Selectable Parity Quad Quad Tridirectional Interface IEEE 1284 LVTTL GTLP OUTPUT TYPE TECHNOLOGY ABTE AHCT ALVC 64BCT GTLP 1395 1394 1284 1245 11245 Octal 1640 1645 2245 Octal with Series Damping Resistors Octal Transceivers Line/MOS Drivers with B-Port Series Damping Resistors Octal with Adjustable Output Voltage 3-41 FUNCTIONAL INDEX 2245 3245 TRANSCEIVERS Standard Transceivers (continued) DESCRIPTION Octal Dual Supply with Configurable Output Voltage Octal with 3.3-V Shifters OUTPUT TYPE TECHNOLOGY ABTE AHCT ALVC 64BCT GTLP 3-42 4245 4245 Incident Wave Switching 3S/OC 29863 29864 16246 16245 LVTTL GTLP Adjustable Edge Rate with Input/Output Series Damping Resistors Incident Wave Switching with Series Damping Resistors Level Shifting LVTTL GTLP Interface LVTTL GTL/GTL+ Interface IEEE 1284 16623 16640 1645 16245 16245 16245 162245 164245 16945 16863 16622 16923 161284 16861 Standard Transceivers (continued) DESCRIPTION Octal LVTTL GTLP LVTTL GTLP Adjustable Edge Rate OUTPUT TYPE 25245 25642 32245 32945 3245 TECHNOLOGY ABTE AHCT ALVC 64BCT GTLP UNIVERSAL FUNCTIONS Universal Transceivers DESCRIPTION LVTTL GTL/GTL+ with Live Insertion LVTTL GTLP Adjustable Edge Rate LVTTL GTLP Adjustable Edge Rate LVTTL GTL/GTL+ LVTTL GTLP with Buffered Clock OUTPUT TYPE 1655 1655 1616 16616 16916 16500 162500 16501 162501 16600 16601 162601 with Parity Generators/Checkers LVTTL GTL/GTL+ LVTTL GTLP LVTTL GTLP Adjustable Edge Rate 16901 16612 16612 16912 1612 32501 TECHNOLOGY ALVC ALVT GTLP FUNCTIONAL INDEX 3-43 UNIVERSAL FUNCTIONS Universal Drivers DESCRIPTION with Parity Checker Dual 3-State Outputs OUTPUT TYPE 16903 16334 162334 16834 162834 16835 162835 16836 162836 TECHNOLOGY ALVC 3-44 Universal Exchangers DESCRIPTION Port Multiplexed Registered with Byte Masks Tri-Port Registered Tri-Port OUTPUT TYPE 16409 162409 16271 16269 16270 162268 162280 32316 16282 162282 32318 TECHNOLOGY ALVC LOGIC OVERVIEW FOCUS IDEAL LITTLE LOGIC SOLUTION FUNCTIONAL INDEX FUNCTIONAL CROSS-REFERENCE DEVICE SELECTION GUIDE PACKAGING MARKING INFORMATION LOGIC PURCHASING TOOL/ALTERNATE SOURCES FUNCTIONAL CROSS REFERENCE Product available technology indicated BiCMOS 64BCT ALVT Product available reduced-noise advanced CMOS (11000 series) CMOS CBTLV AHCT ALVC CD4K product planned technology indicated OTHER ABTE GTLP HSTL JTAG SSTV SSTL FIFO BIPOLAR 1G00 1G02 1G04 1GU04 1G06 1G07 1G08 1G14 1G17 1G32 1G66 1G79 1G80 1G86 1G125 1G126 1G240 1G384 2G00 2G02 2G08 2G32 2G53 2G66 2G74 2G86 2G125 2G157 2G240 2G241 DEVICE FUNCTIONAL CROSS REFERENCE CBTLV 64BCT AHCT ALVC CD4K ABTE GTLP HSTL ALVT JTAG 3G04 3G06 3G07 3G14 3G34 SSTV SSTL FIFO BiCMOS DEVICE BIPOLAR CMOS OTHER BiCMOS 64BCT ALVT BIPOLAR AHCT ALVC CMOS CBTLV CD4K ABTE FIFO OTHER GTLP HSTL JTAG SSTV SSTL DEVICE FUNCTIONAL CROSS REFERENCE CBTLV 64BCT AHCT ALVC CD4K ABTE GTLP HSTL ALVT JTAG SSTV SSTL FIFO BiCMOS DEVICE BIPOLAR CMOS OTHER BiCMOS 64BCT ALVT BIPOLAR AHCT ALVC CMOS CBTLV CD4K ABTE FIFO OTHER GTLP HSTL JTAG SSTV SSTL DEVICE FUNCTIONAL CROSS REFERENCE CBTLV 64BCT AHCT ALVC CD4K ABTE GTLP HSTL ALVT JTAG SSTV SSTL FIFO BiCMOS DEVICE BIPOLAR CMOS OTHER BiCMOS 64BCT ALVT BIPOLAR AHCT ALVC CMOS CBTLV CD4K ABTE FIFO OTHER GTLP HSTL JTAG SSTV SSTL DEVICE FUNCTIONAL CROSS REFERENCE CBTLV 64BCT AHCT ALVC CD4K ABTE GTLP HSTL ALVT JTAG SSTV SSTL FIFO 4-10 BiCMOS DEVICE BIPOLAR CMOS OTHER BiCMOS 64BCT ALVT BIPOLAR AHCT ALVC CMOS CBTLV CD4K ABTE FIFO OTHER GTLP HSTL JTAG SSTV SSTL DEVICE FUNCTIONAL CROSS REFERENCE 4-11 CBTLV 64BCT AHCT ALVC CD4K ABTE GTLP HSTL ALVT JTAG 1000 1004 1005 1008 1016 1032 1034 1035 1050 1051 1052 1053 1056 1071 1073 1244 1245 1284 1394 1395 1612 1616 1640 1645 1650 1651 1653 1655 SSTV SSTL FIFO 4-12 BiCMOS DEVICE BIPOLAR CMOS OTHER BiCMOS 64BCT ALVT BIPOLAR AHCT ALVC CMOS CBTLV CD4K ABTE FIFO OTHER GTLP HSTL JTAG SSTV SSTL DEVICE 1804 2031 2033 2034 2040 2041 2226 2227 2228 2229 2235 2240 2241 2244 2245 2257 2373 2374 2414 2541 2543 2573 2574 2646 2652 2827 2952 3010 3125 3126 3244 4-13 FUNCTIONAL CROSS REFERENCE CBTLV 64BCT AHCT ALVC CD4K ABTE GTLP HSTL ALVT JTAG 3245 3251 3253 3257 3306 3345 3383 3384 3611 3612 3613 3614 3622 3631 3632 3638 3641 3651 3857 3861 4001 4002 4007 4009 4010 4011 4012 4013 4014 4015 4016 SSTV SSTL FIFO 4-14 BiCMOS DEVICE BIPOLAR CMOS OTHER BiCMOS 64BCT ALVT BIPOLAR AHCT ALVC CMOS CBTLV CD4K ABTE FIFO OTHER GTLP HSTL JTAG SSTV SSTL DEVICE 4017 4018 4019 4020 4021 4022 4023 4024 4025 4026 4027 4028 4029 4030 4031 4033 4034 4035 4040 4041 4042 4043 4044 4045 4046 4047 4048 4049 4050 4051 4052 4-15 FUNCTIONAL CROSS REFERENCE CBTLV 64BCT AHCT ALVC CD4K ABTE GTLP HSTL ALVT JTAG 4053 4054 4055 4056 4059 4060 4063 4066 4067 4068 4069 4070 4071 4072 4073 4075 4076 4077 4078 4081 4082 4085 4086 4089 4093 4094 4097 4098 4099 4245 4316 SSTV SSTL FIFO 4-16 BiCMOS DEVICE BIPOLAR CMOS OTHER BiCMOS 64BCT ALVT BIPOLAR AHCT ALVC CMOS CBTLV CD4K ABTE FIFO OTHER GTLP HSTL JTAG SSTV SSTL DEVICE 4351 4352 4374 4502 4503 4504 4508 4510 4511 4512 4514 4515 4516 4517 4518 4520 4521 4522 4527 4532 4536 4538 4541 4543 4555 4556 4572 4585 4724 5400 5401 4-17 FUNCTIONAL CROSS REFERENCE CBTLV 64BCT AHCT ALVC CD4K ABTE GTLP HSTL ALVT JTAG 5402 5403 6800 7001 7002 7032 7046 7266 7802 7803 7804 7805 7806 7807 7808 7811 7813 7814 7819 7820 7881 7882 8240 8244 8245 8373 8374 8543 8550 8574 8646 SSTV SSTL FIFO 4-18 BiCMOS DEVICE BIPOLAR CMOS OTHER BiCMOS 64BCT ALVT BIPOLAR AHCT ALVC CMOS CBTLV CD4K ABTE FIFO OTHER GTLP HSTL JTAG SSTV SSTL DEVICE 8652 8952 8980 8990 8996 8997 11000 11004 11008 11030 11032 11074 11086 11138 11139 11175 11240 11244 11245 11257 11286 11373 11374 11543 11652 14538 16209 16210 16211 16212 16213 4-19 FUNCTIONAL CROSS REFERENCE CBTLV 64BCT AHCT ALVC CD4K ABTE GTLP HSTL ALVT JTAG 16214 16222 16232 16233 16240 16241 16244 16245 16246 16260 16269 16270 16271 16282 16292 16334 16344 16373 16374 16390 16409 16460 16470 16500 16501 16524 16525 16540 16541 16543 16600 SSTV SSTL FIFO 4-20 BiCMOS DEVICE BIPOLAR CMOS OTHER BiCMOS 64BCT ALVT BIPOLAR AHCT ALVC CMOS CBTLV CD4K ABTE FIFO OTHER GTLP HSTL JTAG SSTV SSTL DEVICE 16601 16612 16616 16622 16623 16640 16646 16651 16652 16657 16721 16722 16800 16820 16821 16823 16825 16827 16831 16832 16833 16834 16835 16837 16841 16843 16847 16853 16857 16859 16861 FUNCTIONAL CROSS REFERENCE 4-21 CBTLV 64BCT AHCT ALVC CD4K ABTE GTLP HSTL ALVT JTAG 16863 16901 16903 16912 16916 16918 16919 16923 16945 16952 18245 18502 18504 18512 18514 18640 18646 18652 21395 22033 22034 25244 25245 25642 29821 29823 29825 29827 29828 29833 29841 SSTV SSTL FIFO 4-22 BiCMOS DEVICE BIPOLAR CMOS OTHER BiCMOS 64BCT ALVT BIPOLAR AHCT ALVC CMOS CBTLV CD4K ABTE FIFO OTHER GTLP HSTL JTAG SSTV SSTL DEVICE 29843 29854 29863 29864 32240 32244 32245 32316 32318 32373 32374 32501 32543 32852 32867 32877 32945 40102 40103 40105 40106 40107 40109 40110 40117 40147 40161 40174 40175 40192 40193 4-23 FUNCTIONAL CROSS REFERENCE CBTLV 64BCT AHCT ALVC CD4K ABTE GTLP HSTL ALVT JTAG 40194 40257 161284 162240 162241 162244 162245 162260 162268 162280 162282 162292 162334 162344 162373 162374 162409 162460 162500 162501 162525 162541 162543 162601 162646 162652 162721 162820 162822 162823 162825 SSTV SSTL FIFO 4-24 BiCMOS DEVICE BIPOLAR CMOS OTHER BiCMOS 64BCT ALVT BIPOLAR AHCT ALVC CMOS CBTLV CD4K ABTE FIFO OTHER GTLP HSTL JTAG SSTV SSTL DEVICE 162827 162830 162831 162832 162834 162835 162836 162841 162952 164245 182502 182504 182512 182646 182652 32X245 FUNCTIONAL CROSS REFERENCE 4-25 LOGIC OVERVIEW FOCUS IDEAL LITTLE LOGIC SOLUTION FUNCTIONAL INDEX FUNCTIONAL CROSS REFERENCE DEVICE SELECTION GUIDE PACKAGING MARKING INFORMATION LOGIC PURCHASING TOOLS/ALTERNATE SOURCES DEVICE SELECTION GUIDE SECTION DEVICE SELECTION GUIDE CONTENTS Advanced BiCMOS Technology Logic ABTE/ETL Advanced BiCMOS Technology/Enhanced Transceiver Logic 5-11 AC/ACT Advanced CMOS Logic 5-13 AHC/AHCT Advanced High-Speed CMOS Logic 5-21 Advanced Low-Voltage BiCMOS Logic 5-27 Advanced Low-Power Schottky Logic 5-29 ALVC Advanced Low-Voltage CMOS Technology Logic 5-35 ALVT Advanced Low-Voltage BiCMOS Technology Logic 5-39 Advanced Schottky Logic 5-41 Advanced Ultra-Low-Voltage CMOS Logic 5-45 Advanced Very-Low-Voltage CMOS Logic 5-47 BiCMOS Technology Logic 5-49 64BCT 64-Series BiCMOS Technology Logic 5-49 Bus-Termination Arrays 5-53 Crossbar Technology Logic 5-55 CBTLV Low-Voltage Crossbar Technology Logic 5-59 CD4000 CMOS B-Series Integrated Circuits 5-61 Fast Logic 5-65 FB+/BTL FutureBus+/Backplane Transceiver Logic 5-69 Fast CMOS Logic 5-71 FIFO First-In, First-Out Memories 5-79 Gunning Transceiver Logic 5-83 GTLP Gunning Transceiver Logic Plus 5-85 HC/HCT High-Speed CMOS Logic 5-89 IEEE 1149.1 (JTAG) Boundary-Scan Logic 5-99 Little Logic 5-103 Low-Power Schottky Logic 5-107 Low-Voltage CMOS Technology Logic 5-113 Low-Voltage CMOS Technology Logic 5-117 Low-Voltage BiCMOS Technology Logic 5-123 PCA/PCF Inter-Integrated Circuit Applications 5-127 Schottky Logic 5-129 SSTL/SSTV Stub Series-Terminated Logic 5-133 HSTL High-Speed Transceiver Logic 5-133 Transistor-Transistor Logic 5-135 Translation Voltage Clamp Logic 5-139 DEVICE SELECTION GUIDE Advanced BiCMOS Technology Logic family, TI's second-generation family BiCMOS bus-interface products, manufactured using 0.8-µ BiCMOS process. provides high drive propagation delays 5-ns range, while maintaining very power consumption. products well suited live-insertion applications, with Ioff specification power-up 3-state (PU3S) circuitry. family offers series-damping-resistor options where reduced transmission-line effects required. Special parts that provide high-current drive (180 with transmission lines also offered. Advanced functions, such transceivers, emulate wide variety bus-interface functions. Multiplexing options memory interleaving upsizing downsizing also provided. devices purchased octal, Widebus, Widebus+. Widebus Widebus+ packages feature higher performance, with reduced noise flow-through pinout easier board layout. Widebus+ devices offer input bus-hold circuitry eliminate need external pullup resistors floating inputs. www.ti.com/sc/logic most current data sheets. DEVICE SELECTION GUIDE PINS AVAILABILITY PDIP SOIC SSOP TQFP TSSOP TVSOP VFBGA DEVICE SN74ABT125 SN74ABT126 SN74ABT240A SN74ABT241 SN74ABT241A SN54ABT244 SN74ABT244A SN74ABT245A SN74ABT245B SN74ABTH245 SN74ABT273 SN74ABT373 SN54ABT374 SN74ABT374A SN74ABT377 SN74ABT377A SN74ABT533 SN74ABT533A SN74ABT534 SN74ABT534A SN74ABT540 SN54ABT541 SN74ABT541B DESCRIPTION Quad Buffers with 3-State Outputs Quad Buffers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Transceivers with 3-State Outputs Octal Transceivers with 3-State Outputs Octal Transceivers with 3-State Outputs Octal D-Type Flip-Flops with Clear Octal Transparent D-Type Latches with 3-State Outputs Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs Octal D-Type Flip-Flops with Enable Octal D-Type Flip-Flops with Enable Octal Inverting Transparent Latches with 3-State Outputs Octal Inverting Transparent Latches with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Inverting Octal Buffers Line Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs LITERATURE REFERENCE SCBS182 SCBS183 SCBS098 SCBS184 SCBS184 SCBS099 SCBS099 SCBS081 SCBS081 SCBS663 SCBS185 SCBS155 SCBS111 SCBS111 SCBS156 SCBS156 SCBS186 SCBS186 SCBS187 SCBS187 SCBS188 SCBS093 SCBS093 commercial package description availability PDIP (plastic dual-in-line package) DSBGA (die-size ball grid array) pins LFBGA (low-profile fine-pitch ball grid array) pins pins pins pins 14/16/20 pins 24/28 pins (quad flatpack) pins only) pins (FIFOs only) 100/132 pins (FIFOs only) LQFP (low-profile quad flatpack) pins TQFP (plastic thin quad flatpack) pins pins only) pins pins PCA, pins only) pins (FIFOs only) (small-outline package) pins 14/16/20/24 pins PLCC (plastic leaded chip carrier) 20/28/44/68/84 pins SOIC (small-outline integrated circuit) 8/14/16 pins 16/20/24/28 pins VFBGA (very-thin-profile fine-pitch ball grid array) pins pins (also includes 48-pin functions) QSOP (quarter-size small-outline package) 16/20/24 pins SSOP (shrink small-outline package) pins 14/16/20/24/28/30/38 pins 16/20/24 pins 28/48/56 pins TSSOP (thin shrink small-outline package) 8/14/16/20/24/28 pins 48/56/64 pins TVSOP (thin very small-outline package) 14/16/20/24/48/56 pins pins VSSOP (very thin shrink small-outline package) pins pins schedule Planned JEDEC reference wafer chip scale package (WCSP) (small-outline transistor) pins pins DBV, pins DEVICE SELECTION GUIDE PINS AVAILABILITY PDIP SOIC SSOP TQFP TSSOP TVSOP VFBGA DEVICE SN74ABT543 SN74ABT543A SN74ABT573 SN74ABT573A SN54ABT574 SN74ABT574A SN74ABT620 SN74ABT623 SN74ABT640 SN74ABT646A SN74ABT651 SN74ABT652A SN74ABT657A SN54ABT821 SN74ABT821A SN74ABT823 SN74ABT827 SN74ABT833 SN74ABT841 SN74ABT841A SN74ABT843 SN74ABT853 SN74ABT861 SN74ABT863 SN74ABT2240A DESCRIPTION Octal Registered Transceivers with 3-State Outputs Octal Registered Transceivers with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Transceivers with 3-State Outputs Octal Transceivers with 3-State Outputs Octal Transceivers with 3-State Outputs Octal Registered Transceivers with 3-State Outputs Octal Transceivers Registers with 3-State Outputs Octal Transceivers Registers with 3-State Outputs Octal Transceivers with Parity Generators/Checkers 3-State Outputs 10-Bit Bus-Interface Flip-Flops with 3-State Outputs 10-Bit Bus-Interface Flip-Flops with 3-State Outputs 9-Bit Bus-Interface Flip-Flops with 3-State Outputs 10-Bit Buffers/Drivers with 3-State Outputs 8-Bit 9-Bit Parity Transceivers 10-Bit Bus-Interface D-Type Latches with 3-State Outputs 10-Bit Bus-Interface D-Type Latches with 3-State Outputs 9-Bit Bus-Interface D-Type Latches with 3-State Outputs 8-Bit 9-Bit Parity Transceivers 10-Bit Transceivers with 3-State Outputs 9-Bit Transceivers with 3-State Outputs Octal Buffers Line/MOS Drivers with Series Damping Resistors 3-State Outputs Octal Buffers Line/MOS Drivers with Series Damping Resistors 3-State Outputs Octal Buffers/Line Drivers with Series Damping Resistors 3-State Outputs LITERATURE REFERENCE SCAS422 SCBS157 SCBS190 SCBS190 SCBS191 SCBS191 SCBS113 SCBS114 SCBS104 SCBS069 SCBS083 SCBS072 SCBS192 SCBS193 SCBS193 SCBS158 SCBS159 SCBS195 SCBS196 SCBS196 SCBS197 SCBS198 SCBS199 SCBS201 SCBS232 SN74ABT2241 SCBS233 SN74ABT2244A SCBS106 DEVICE SELECTION GUIDE PINS AVAILABILITY PDIP SOIC SSOP TQFP TSSOP TVSOP VFBGA DEVICE DESCRIPTION Octal Transceivers Line Drivers with Series Damping Resistors 3-State Outputs Octal Transceivers Line Drivers with Series Damping Resistors 3-State Outputs 10-Bit Buffers/Drivers with Series Damping Resistors 3-State Outputs Octal Transceivers Registers with 3-State Outputs 11-Bit Line/Memory Drivers with 3-State Outputs 11-Bit Line/Memory Drivers with 3-State Outputs 12-Bit Line/Memory Drivers with 3-State Outputs 12-Bit Line/Memory Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Transceivers with 3-State Outputs 16-Bit Transceivers with 3-State Outputs 12-Bit 24-Bit Multiplexed D-Type Latches with 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 4-to-1 Multiplexed/Demultiplexed Transceivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 18-Bit Universal Transceivers with 3-State Outputs 18-Bit Universal Transceivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 18-Bit Universal Transceivers with 3-State Outputs 18-Bit Universal Transceivers with 3-State Outputs 16-Bit Transceivers with 3-State Outputs 16-Bit Transceivers with 3-State Outputs LITERATURE REFERENCE SCBS234 SN74ABT2245 SN74ABTR2245 SCBS680 SN74ABT2827 SN74ABT2952A SN74ABT5400A SN74ABT5401 SN74ABT5402A SN74ABT5403 SN74ABT16240A SN74ABT16241A SN74ABT16244A SN74ABTH16244 SN74ABT16245A SN74ABTH16245 SN74ABTH16260 SN74ABT16373A SN74ABT16374A SN74ABTH16460 SN74ABT16470 SN74ABT16500B SN74ABT16501 SN74ABT16540A SN74ABT16541A SN74ABT16543 SN74ABT16600 SN74ABT16601 SN74ABT16623 SN74ABT16640 SCBS648 SCBS203 SCBS661 SCBS235 SCBS660 SCBS236 SCBS095 SCBS096 SCBS073 SCBS677 SCBS300 SCBS662 SCBS204 SCBS160 SCBS205 SCBS207 SCBS085 SCBS057 SCBS086 SCBS208 SCBS118 SCBS087 SCBS209 SCBS210 SCBS211 SCBS107 DEVICE SELECTION GUIDE PINS AVAILABILITY PDIP SOIC SSOP TQFP TSSOP TVSOP VFBGA DEVICE SN74ABT16646 SN74ABT16652 SN74ABT16657 SN74ABT16821 SN74ABT16823 SN74ABTH16823 SN74ABT16825 SN74ABT16827 SN74ABT16833 SN74ABT16841 SN74ABT16843 SN74ABT16853 SN74ABT16863 SN74ABT16952 SN74ABTH25245 SN74ABTH32245 SN74ABTH32316 SN74ABTH32318 SN74ABTH32501 SN74ABTH32543 SN74ABT162244 SN74ABT162245 SN74ABTH162245 DESCRIPTION 16-Bit Transceivers Registers with 3-State Outputs 16-Bit Transceivers Registers with 3-State Outputs 16-Bit Transceivers with Parity Generators/Checkers 3-State Outputs 20-Bit D-Type Flip-Flops with 3-State Outputs 18-Bit D-Type Flip-Flops with 3-State Outputs 18-Bit D-Type Flip-Flops with 3-State Outputs 18-Bit Buffers/Drivers with 3-State Outputs 20-Bit Buffers/Drivers with 3-State Outputs Dual 8-Bit 9-Bit Parity Transceivers 20-Bit Bus-Interface D-Type Latches with 3-State Outputs 18-Bit Bus-Interface D-Type Latches with 3-State Outputs Dual 8-Bit 9-Bit Parity Transceivers 18-Bit Bus-Interface Transceivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs Octal Transceivers with 3-State Outputs 32-Bit Transceivers with 3-State Outputs 16-Bit Tri-Port Universal Exchangers 18-Bit Tri-Port Universal Exchangers 32-Bit Universal Transceivers with 3-State Outputs 32-Bit Registered Transceivers with 3-State Outputs 16-Bit Buffers/Drivers with Series Damping Resistors 3-State Outputs 16-Bit Transceivers with Series Damping Resistors 3-State Outputs 16-Bit Transceivers with Series Damping Resistors 3-State Outputs 12-Bit 24-Bit Multiplexed D-Type Latches with Series Damping Resistors 3-State Outputs 4-to-1 Multiplexed/Demultiplexed Registered Transceivers with 3-State Outputs 18-Bit Universal Transceivers with 3-State Outputs 18-Bit Universal Transceivers with 3-State Outputs LITERATURE REFERENCE SCBS212 SCBS215 SCBS103 SCBS216 SCBS217 SCBS664 SCBS218 SCBS220 SCBS097 SCBS222 SCBS223 SCBS153 SCBS225 SCBS082 SCBS251 SCBS228 SCBS179 SCBS180 SCBS229 SCBS230 SCBS238 SCBS239 SCBS712 SN74ABTH162260 SCBS240 SN74ABTH162460 SN74ABT162500 SN74ABT162501 SCBS241 SCBS242 SCBS243 DEVICE SELECTION GUIDE PINS AVAILABILITY PDIP SOIC SSOP TQFP TSSOP TVSOP VFBGA DEVICE SN74ABT162601 SN74ABT162823A SN74ABT162825 SN74ABT162827A SN74ABT162841 DESCRIPTION 18-Bit Universal Transceivers with 3-State Outputs 18-Bit Bus-Interface Flip-Flops with 3-State Outputs 18-Bit Buffers/Drivers with Series Damping Resistors 3-State Outputs 20-Bit Buffers/Drivers with Series Damping Resistors 3-State Outputs 20-Bit Bus-Interface D-Type Latches with 3-State Outputs LITERATURE REFERENCE SCBS247 SCBS666 SCBS474 SCBS248 SCBS665 5-10 DEVICE SELECTION GUIDE ABTE/ETL Advanced BiCMOS Technology/ Enhanced Transceiver Logic ABTE, with wide-noise-margin logic levels port, backward compatible with existing LVTTL/TTL logic. ABTE devices support ANSI/VITA 1-1994 specification (VME64), with tight tolerances transition times skew. ABTE manufactured using 0.8-µ BiCMOS process provides A-port drive levels incident-wave switching. B-port features include bus-hold circuitry, eliminating need external pullup resistors series output resistors dampen signal reflections. Other features include BIAS internal pullup resistors control pins live-insertion protection. VMEbus International Trade Association (VITA) established task group 1997 specify synchronous protocol double data transfer rates Mbyte/s more. specification, 2eSST (double-edge source synchronous transfers), based asynchronous 2eVME protocol. Sustained data rates Gbyte/s, more then times faster than traditional VME64 backplanes with single-edge signaling, possible taking advantage 2eSST both edges each VMEbus clock 21-slot VME320 star-configuration backplane. conjunction with VITA, designing device support 2eSST protocol. www.ti.com/sc/logic most current data sheets additional information this device. 5-11 DEVICE SELECTION GUIDE ABTE/ETL PINS AVAILABILITY SSOP TSSOP DEVICE SN74ABTE16245 SN74ABTE16246 DESCRIPTION 16-Bit Incident-Wave-Switching Transceivers with 3-State Outputs 11-Bit Incident-Wave-Switching Transceivers with 3-State Open-Collector Outputs LITERATURE REFERENCE SCBS226 SCBS227 commercial package description availability PDIP (plastic dual-in-line package) DSBGA (die-size ball grid array) pins LFBGA (low-profile fine-pitch ball grid array) pins pins pins pins 14/16/20 pins 24/28 pins (quad flatpack) pins only) pins (FIFOs only) 100/132 pins (FIFOs only) LQFP (low-profile quad flatpack) pins TQFP (plastic thin quad flatpack) pins pins only) pins pins PCA, pins only) pins (FIFOs only) (small-outline package) pins 14/16/20/24 pins PLCC (plastic leaded chip carrier) 20/28/44/68/84 pins SOIC (small-outline integrated circuit) 8/14/16 pins 16/20/24/28 pins VFBGA (very-thin-profile fine-pitch ball grid array) pins pins (also includes 48-pin functions) QSOP (quarter-size small-outline package) 16/20/24 pins SSOP (shrink small-outline package) pins 14/16/20/24/28/30/38 pins 16/20/24 pins 28/48/56 pins TSSOP (thin shrink small-outline package) 8/14/16/20/24/28 pins 48/56/64 pins TVSOP (thin very small-outline package) 14/16/20/24/48/56 pins pins VSSOP (very thin shrink small-outline package) pins pins schedule Planned JEDEC reference wafer chip scale package (WCSP) (small-outline transistor) pins pins DBV, pins 5-12 DEVICE SELECTION GUIDE AC/ACT Advanced CMOS Logic offers full family advanced CMOS logic, with wide range AC/ACT devices low-power medium- high-speed applications. Products acquired from Harris Semiconductor provide many additional functions. Over device types available, including gates, latches, flip-flops, buffers/drivers, counters, multiplexers, transceivers, registered transceivers. AC/ACT family reliable, low-power logic family, with 24-mA output current drive (AC/ACT) 12-mA output current drive 3.3-V only). family includes standard end-pin products center-pin ground-configuration products with circuitry. circuitry, available only with center-pin products, helps reduce simultaneous switching noise associated with high-speed logic. center-pin products include 16-, 18-, 20-bit bus-interface functions 56-pin shrink small-outline package (SSOP) thin shrink small-outline package (TSSOP). These packages allow designer double functionality same circuit board area reduce circuit board area one-half. family offers CMOS inputs outputs, while family offers inputs with CMOS outputs. www.ti.com/sc/logic most current data sheets. 5-13 DEVICE SELECTION GUIDE PINS Quad 2-Input NAND Gates Quad 2-Input NAND Gates Quad 2-Input Gates Inverters Inverters Inverters with Open-Drain Outputs Quad 2-Input Gates Quad 2-Input Gates Triple 3-Input NAND Gates Triple 3-Input NAND Gates Triple 3-Input Gates Schmitt-Trigger Inverters Schmitt-Trigger Inverters Dual 4-Input NAND Gates Quad 2-Input Gates Quad 2-Input Gates Dual D-Type Flip-Flops with Reset Dual D-Type Flip-Flops with Reset Quad 2-Input Exclusive-OR Gates Quad 2-Input Exclusive-OR Gates Dual Positive-Edge-Triggered Flip Flops with Reset Dual Negative-Edge-Triggered Flip-Flops with Reset 3-to-8 Line Inverting Decoders/Demultiplexers Dual 2-to-4 Line Decoders/Demultiplexers 1-of-8 Data Selectors/Multiplexers Dual 1-of-4 Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Synchronous 4-Bit Binary Counters Synchronous 4-Bit Binary Counters 8-Bit Serial-In, Parallel-Out Shift Registers D-Type Flip-Flops with Clear Quad D-Type Flip-Flops with Clear AVAILABILITY PDIP SOIC SSOP TSSOP DEVICE CD74AC00 SN74AC00 CD74AC02 CD74AC04 SN74AC04 CD74AC05 CD74AC08 SN74AC08 CD74AC10 SN74AC10 SN74AC11 CD74AC14 SN74AC14 CD74AC20 CD74AC32 SN74AC32 CD74AC74 SN74AC74 CD74AC86 SN74AC86 CD74AC109 CD74AC112 CD74AC138 CD74AC139 CD74AC151 CD74AC153 CD74AC157 CD74AC158 CD74AC161 CD74AC163 CD74AC164 CD74AC174 CD74AC175 DESCRIPTION LITERATURE REFERENCE SCHS223 SCAS524 SCHS224 SCHS225 SCAS519 SCHS225 SCHS226 SCAS536 SCHS227 SCAS529 SCAS532 SCHS228 SCAS522 SCHS229 SCHS230 SCAS528 SCHS231 SCAS521 SCHS232 SCAS533 SCHS282 SCHS282 SCHS234 SCHS235 SCHS236 SCHS237 SCHS283 SCHS283 SCHS239 SCHS284 SCHS240 SCHS241 SCHS242 commercial package description availability PDIP (plastic dual-in-line package) DSBGA (die-size ball grid array) pins LFBGA (low-profile fine-pitch ball grid array) pins pins pins pins 14/16/20 pins 24/28 pins (quad flatpack) pins only) pins (FIFOs only) 100/132 pins (FIFOs only) LQFP (low-profile quad flatpack) pins TQFP (plastic thin quad flatpack) pins pins only) pins pins PCA, pins only) pins (FIFOs only) (small-outline package) pins 14/16/20/24 pins PLCC (plastic leaded chip carrier) 20/28/44/68/84 pins SOIC (small-outline integrated circuit) 8/14/16 pins 16/20/24/28 pins VFBGA (very-thin-profile fine-pitch ball grid array) pins pins (also includes 48-pin functions) QSOP (quarter-size small-outline package) 16/20/24 pins SSOP (shrink small-outline package) pins 14/16/20/24/28/30/38 pins 16/20/24 pins 28/48/56 pins TSSOP (thin shrink small-outline package) 8/14/16/20/24/28 pins 48/56/64 pins TVSOP (thin very small-outline package) 14/16/20/24/48/56 pins pins VSSOP (very thin shrink small-outline package) pins pins schedule Planned (small-outline transistor) pins pins DBV, pins JEDEC reference wafer chip scale package (WCSP) Appendix package information CD54/74AC devices. 5-14 DEVICE SELECTION GUIDE PINS 3-to-8 Line Decoders/Demultiplexers Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Transceivers with 3-State Outputs Octal Transceivers with 3-State Outputs 1-of-8 Data Selectors/Multiplexers with 3-State Outputs Dual 1-of-4 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs Octal D-Type Flip-Flops with Clear 9-Bit Odd/Even Parity Generators/Checkers 9-Bit Binary Full Adders with Fast Carry 8-Bit Universal Shift/Storage Registers 8-Bit Universal Shift/Storage Registers Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs Octal Inverting Transparent Latches with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Inverting Octal Buffers Line Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Inverting Transparent Latches with 3-State Outputs Octal Inverting Transparent Latches with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Transceivers with 3-State Outputs Octal Registered Transceivers with 3-State Outputs Octal Transceivers Registers with 3-State Outputs Quad 2-Input NAND Gates Inverters Quad 2-Input Gates Quad 2-Input Gates Dual D-Type Flip-Flops with Reset Quad 2-Input Exclusive-OR Gates 3-to-8 Line Inverting Decoders/Demultiplexers Quad D-Type Flip-Flops with Clear AVAILABILITY PDIP SOIC SSOP TSSOP DEVICE CD74AC238 CD74AC240 SN74AC240 CD74AC241 SN74AC241 CD74AC244 SN74AC244 CD74AC245 SN74AC245 CD74AC251 CD74AC253 CD74AC257 CD74AC273 CD74AC280 CD74AC283 CD74AC299 CD74AC323 CD74AC373 SN74AC373 CD74AC374 SN74AC374 SN74AC533 CD74AC534 SN74AC534 CD74AC540 CD74AC541 CD74AC563 SN74AC563 SN74AC564 CD74AC573 SN74AC573 CD74AC574 SN74AC574 CD74AC623 CD74AC646 CD74AC652 74AC11000 74AC11004 74AC11008 74AC11032 74AC11074 74AC11086 74AC11138 74AC11175 DESCRIPTION LITERATURE REFERENCE SCHS234 SCHS287 SCAS512 SCHS287 SCAS513 SCHS287 SCAS514 SCHS245 SCAS461 SCHS246 SCHS247 SCHS248 SCHS249 SCHS250 SCHS251 SCHS288 SCHS288 SCHS289 SCAS540 SCHS290 SCAS543 SCAS555 SCHS290 SCAS554 SCHS285 SCHS285 SCHS291 SCAS552 SCAS551 SCHS291 SCAS542 SCHS292 SCAS541 SCHS286 SCHS293 SCHS294 SCLS054 SCHS033 SCAS014 SCAS007 SCAS499 SCAS081 SCAS042 SCAS090 5-15 DEVICE SELECTION GUIDE PINS AVAILABILITY PDIP SOIC SSOP TSSOP DEVICE 74AC11240 74AC11244 74AC11245 74AC11257 74AC16244 74AC16245 74AC16373 74AC16374 74AC16652 DESCRIPTION Octal Buffers/Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Transceivers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Transceivers with 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 16-Bit Transceivers Registers with 3-State Outputs LITERATURE REFERENCE SCAS448 SCAS171 SCAS010 SCAS049 SCAS120 SCAS235 SCAS121 SCAS123 SCAS242 5-16 DEVICE SELECTION GUIDE PINS Quad 2-Input NAND Gates Quad 2-Input NAND Gates Quad 2-Input Gates Inverters Inverters Inverters with Open-Drain Outputs Quad 2-Input Gates Quad 2-Input Gates Triple 3-Input NAND Gates Triple 3-Input NAND Gates Triple 3-Input Gates Schmitt-Trigger Inverters Schmitt-Trigger Inverters Dual 4-Input NAND Gates Quad 2-Input Gates Quad 2-Input Gates Dual D-Type Flip-Flops with Reset Dual D-Type Flip-Flops with Reset Quad 2-Input Exclusive-OR Gates Quad 2-Input Exclusive-OR Gates Dual Positive-Edge-Triggered Flip Flops with Reset Dual Negative-Edge-Triggered Flip-Flops with Reset 3-to-8 Line Inverting Decoders/Demultiplexers Dual 2-to-4 Line Decoders/Demultiplexers 1-of-8 Data Selectors/Multiplexers Dual 1-of-4 Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Synchronous 4-Bit Binary Counters Synchronous 4-Bit Binary Counters 8-Bit Serial-In, Parallel-Out Shift Registers D-Type Flip-Flops with Clear Quad D-Type Flip-Flops with Clear AVAILABILITY PDIP SOIC SSOP TSSOP DEVICE CD74ACT00 SN74ACT00 CD74ACT02 CD74ACT04 SN74ACT04 CD74ACT05 CD74ACT08 SN74ACT08 CD74ACT10 SN74ACT10 SN74ACT11 CD74ACT14 SN74ACT14 CD74ACT20 CD74ACT32 SN74ACT32 CD74ACT74 SN74ACT74 CD74ACT86 SN74ACT86 CD74ACT109 CD74ACT112 CD74ACT138 CD74ACT139 CD74ACT151 CD74ACT153 CD74ACT157 CD74ACT158 CD74ACT161 CD74ACT163 CD74ACT164 CD74ACT174 CD74ACT175 DESCRIPTION LITERATURE REFERENCE SCHS223 SCAS523 SCHS224 SCHS225 SCAS518 SCHS225 SCHS226 SCAS535 SCHS227 SCAS526 SCAS531 SCHS228 SCAS557 SCHS229 SCHS230 SCAS530 SCHS231 SCAS520 SCHS232 SCAS534 SCHS233 SCHS233 SCHS234 SCHS235 SCHS236 SCHS237 SCHS283 SCHS238 SCHS284 SCHS299 SCHS240 SCHS241 SCHS242 commercial package description availability PDIP (plastic dual-in-line package) DSBGA (die-size ball grid array) pins LFBGA (low-profile fine-pitch ball grid array) pins pins pins pins 14/16/20 pins 24/28 pins (quad flatpack) pins only) pins (FIFOs only) 100/132 pins (FIFOs only) LQFP (low-profile quad flatpack) pins TQFP (plastic thin quad flatpack) pins pins only) pins pins PCA, pins only) pins (FIFOs only) (small-outline package) pins 14/16/20/24 pins PLCC (plastic leaded chip carrier) 20/28/44/68/84 pins SOIC (small-outline integrated circuit) 8/14/16 pins 16/20/24/28 pins VFBGA (very-thin-profile fine-pitch ball grid array) pins pins (also includes 48-pin functions) QSOP (quarter-size small-outline package) 16/20/24 pins SSOP (shrink small-outline package) pins 14/16/20/24/28/30/38 pins 16/20/24 pins 28/48/56 pins TSSOP (thin shrink small-outline package) 8/14/16/20/24/28 pins 48/56/64 pins TVSOP (thin very small-outline package) 14/16/20/24/48/56 pins pins VSSOP (very thin shrink small-outline package) pins pins schedule Planned (small-outline transistor) pins pins DBV, pins JEDEC reference wafer chip scale package (WCSP) Appendix package information CD54/74ACT devices. 5-17 DEVICE SELECTION GUIDE PINS AVAILABILITY PDIP SOIC SSOP TSSOP DEVICE CD74ACT238 CD74ACT240 SN74ACT240 CD74ACT241 SN74ACT241 CD74ACT244 SN74ACT244 CD74ACT245 SN74ACT245 CD74ACT253 CD74ACT257 CD74ACT258 CD74ACT273 CD74ACT280 CD74ACT283 CD74ACT297 CD74ACT299 CD74ACT373 SN74ACT373 CD74ACT374 SN74ACT374 SN74ACT533 SN74ACT534 CD74ACT540 CD74ACT541 SN74ACT563 SN74ACT564 CD74ACT573 SN74ACT573 CD74ACT574 SN74ACT574 CD74ACT623 CD74ACT646 CD74ACT652 SN74ACT1071 SN74ACT1073 SN74ACT1284 74ACT11000 74ACT11004 74ACT11008 74ACT11030 74ACT11032 74ACT11074 74ACT11139 DESCRIPTION 3-to-8 Line Decoders/Demultiplexers Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Transceivers with 3-State Outputs Octal Transceivers with 3-State Outputs Dual 1-of-4 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs Octal D-Type Flip-Flops with Clear 9-Bit Odd/Even Parity Generators/Checkers 9-Bit Binary Full Adders with Fast Carry Digital Phase-Locked Loops 8-Bit Universal Shift/Storage Registers Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs Octal Inverting Transparent Latches with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Inverting Octal Buffers Line Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Inverting Transparent Latches with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Transceivers with 3-State Outputs Octal Registered Transceivers with 3-State Outputs Octal Transceivers Registers with 3-State Outputs 10-Bit Termination Networks with Hold 16-Bit Termination Networks with Hold 7-Bit Interfaces with 3-State Outputs Quad 2-Input NAND Gates Inverters Quad 2-Input Gates 8-Input NAND Gates Quad 2-Input Gates Dual D-Type Flip-Flops with Reset Dual 2-to-4 Line Decoders/Demultiplexers LITERATURE REFERENCE SCHS234 SCHS244 SCAS515 SCHS287 SCAS516 SCHS287 SCAS517 SCHS245 SCAS452 SCHS247 SCHS248 SCHS248 SCHS249 SCHS250 SCHS251 SCHS297 SCHS288 SCHS289 SCAS544 SCHS290 SCAS539 SCAS553 SCAS556 SCHS285 SCHS285 SCAS550 SCAS549 SCHS291 SCAS538 SCHS292 SCAS537 SCHS286 SCHS293 SCHS294 SCAS192 SCAS193 SCAS459 SCAS002 SCAS215 SCAS013 SCLS050 SCAS008 SCAS498 SCAS175 5-18 DEVICE SELECTION GUIDE PINS AVAILABILITY PDIP SOIC SSOP TSSOP DEVICE 74ACT11240 74ACT11244 74ACT11245 74ACT11257 74ACT11286 74ACT11373 74ACT11374 74ACT11543 74ACT11652 74ACT16240 74ACT16244 74ACT16245 74ACT16373 74ACT16374 74ACT16541 74ACT16543 74ACT16623 74ACT16646 74ACT16651 74ACT16652 74ACT16657 74ACT16823 74ACT16825 74ACT16827 74ACT16841 74ACT16861 74ACT16863 74ACT16952 DESCRIPTION Octal Buffers/Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Transceivers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs 9-Bit Parity Generators/Checkers with Bus-Driver Parity Port Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Registered Transceivers with 3-State Outputs Octal Transceivers Registers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Transceivers with 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 16-Bit Transceivers with 3-State Outputs 16-Bit Transceivers Registers with 3-State Outputs 16-Bit Transceivers Registers with 3-State Outputs 16-Bit Transceivers Registers with 3-State Outputs 16-Bit Transceivers with Parity Generators/Checkers 3-State Outputs 18-Bit D-Type Flip-Flops with 3-State Outputs 18-Bit Buffers/Drivers with 3-State Outputs 20-Bit Buffers/Drivers with 3-State Outputs 20-Bit Bus-Interface D-Type Latches with 3-State Outputs 20-Bit Transceivers with 3-State Outputs 18-Bit Bus-Interface Transceivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs LITERATURE REFERENCE SCAS210 SCAS006 SCAS031 SCAS053 SCAS069 SCAS015 SCAS217 SCAS136 SCAS087 SCAS137 SCAS116 SCAS097 SCAS122 SCAS124 SCAS208 SCAS126 SCAS152 SCAS127 SCAS449 SCAS128 SCAS164 SCAS160 SCAS155 SCAS163 SCAS174 SCAS197 SCAS162 SCAS159 5-19 DEVICE SELECTION GUIDE AHC/AHCT Advanced High Speed CMOS Logic AHC/AHCT logic family provides natural migration path HCMOS users need more speed low-power, low-noise, low-drive applications. logic family consists basic gates, octals, 16-bit Widebus functions. also offers single-gate solutions, designated with device name. Performance characteristics family are: Speed Typical propagation delays (octals), about three times faster than devices. VCC, devices quick quiet solution higher-speed operation. noise family allows designers combine low-noise characteristics HCMOS devices with today's performance levels, without overshoot undershoot problems typical higher-drive devices required speeds. power family CMOS technology exhibits power consumption (40-mA static current, one-half that HCMOS). Drive Output-drive current (AHC/AHCT) 3.3-V (AHC only). family offers CMOS inputs outputs, while AHCT family offers inputs with CMOS outputs. Packaging devices available small-outline integrated circuit (SOIC), shrink small-outline package (SSOP), plastic dual in-line package (PDIP), thin shrink small-outline package (TSSOP), thin very small-outline package (TVSOP), 5-pin small-outline transistor (SOT) package. Selected devices available military versions (SN54AHCxx). Using products offers several business advantages: Competitive advantage competitors' devices have equivalent specifications; therefore, devices drop-in replacements offering alternate sources. With TI's production capacity, delivery performance, competitive prices, devices among most economical, easy-to-use, readily available logic products. www.ti.com/sc/logic most current data sheets. 5-21 DEVICE SELECTION GUIDE PINS AVAILABILITY PDIP SOIC SSOP TSSOP TVSOP DEVICE SN74AHC1G00 SN74AHC1G02 SN74AHC1G04 SN74AHC1GU04 SN74AHC1G08 SN74AHC1G14 SN74AHC1G32 SN74AHC1G86 SN74AHC1G125 SN74AHC1G126 SN74AHC00 SN74AHC02 SN74AHC04 SN74AHCU04 SN74AHC05 SN74AHC08 SN74AHC14 SN74AHC32 SN74AHC74 SN74AHC86 SN74AHC123A SN74AHC125 SN74AHC126 SN74AHC132 SN74AHC138 SN74AHC139 SN74AHC157 SN74AHC158 SN74AHC240 SN74AHC244 SN74AHC245 SN74AHC273 SN74AHC367 DESCRIPTION Single 2-Input NAND Gates Single 2-Input Gates Single Inverters Single Inverters Single 2-Input Gates Single Schmitt-Trigger Inverters Single 2-Input Gates Single 2-Input Exclusive-OR Gates Single Buffers with 3-State Outputs Single Buffers with 3-State Outputs Quad 2-Input NAND Gates Quad 2-Input Gates Inverters Unbuffered Inverters Inverters with Open-Drain Outputs Quad 2-Input Gates Schmitt-Trigger Inverters Quad 2-Input Gates Dual D-Type Flip-Flops with Reset Quad 2-Input Exclusive-OR Gates Dual Retriggerable Monostable Multivibrators with Reset Quad Buffers with 3-State Outputs Quad Buffers with 3-State Outputs Quad 2-Input NAND Gates with Schmitt-Trigger Inputs 3-to-8 Line Inverting Decoders/Demultiplexers Dual 2-to-4 Line Decoders/Demultiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Octal Buffers/Drivers with 3-State Outputs Octal Buffers Line Drivers with 3-State Outputs Octal Transceivers with 3-State Outputs Octal D-Type Flip-Flops with Clear Buffers/Line Drivers with 3-State Outputs LITERATURE REFERENCE SCLS313 SCLS342 SCLS318 SCLS343 SCLS314 SCLS321 SCLS317 SCLS323 SCLS377 SCLS379 SCLS227 SCLS254 SCLS231 SCLS234 SCLS357 SCLS236 SCLS238 SCLS247 SCLS255 SCLS249 SCLS352 SCLS256 SCLS257 SCLS365 SCLS258 SCLS259 SCLS345 SCLS346 SCLS251 SCLS226 SCLS230 SCLS376 SCLS424 commercial package description availability PDIP (plastic dual-in-line package) DSBGA (die-size ball grid array) pins LFBGA (low-profile fine-pitch ball grid array) pins pins pins pins 14/16/20 pins 24/28 pins (quad flatpack) pins only) pins (FIFOs only) 100/132 pins (FIFOs only) LQFP (low-profile quad flatpack) pins TQFP (plastic thin quad flatpack) pins pins only) pins pins PCA, pins only) pins (FIFOs only) (small-outline package) pins 14/16/20/24 pins PLCC (plastic leaded chip carrier) 20/28/44/68/84 pins SOIC (small-outline integrated circuit) 8/14/16 pins 16/20/24/28 pins VFBGA (very-thin-profile fine-pitch ball grid array) pins pins (also includes 48-pin functions) QSOP (quarter-size small-outline package) 16/20/24 pins SSOP (shrink small-outline package) pins 14/16/20/24/28/30/38 pins 16/20/24 pins 28/48/56 pins TSSOP (thin shrink small-outline package) 8/14/16/20/24/28 pins 48/56/64 pins TVSOP (thin very small-outline package) 14/16/20/24/48/56 pins pins VSSOP (very thin shrink small-outline package) pins pins schedule Planned JEDEC reference wafer chip scale package (WCSP) (small-outline transistor) pins pins DBV, pins 5-22 DEVICE SELECTION GUIDE PINS AVAI Other recent searchesSMTHS10 - SMTHS10 SMTHS10 Datasheet MVL-721G - MVL-721G MVL-721G Datasheet MVL-721Y - MVL-721Y MVL-721Y Datasheet MVL-721HR - MVL-721HR MVL-721HR Datasheet IS64LV25616AL - IS64LV25616AL IS64LV25616AL Datasheet HD29029 - HD29029 HD29029 Datasheet BUL44 - BUL44 BUL44 Datasheet ADS8410 - ADS8410 ADS8410 Datasheet 2CTD432007F1701 - 2CTD432007F1701 2CTD432007F1701 Datasheet
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