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Make sure next Card purchase has. SIMPLE SYSTEM Mark3 (SSRT Mark3


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BU-64703
Make sure next Card purchase has.
SIMPLE SYSTEM Mark3 (SSRT Mark3)
FEATURES
Complete Integrated Remote Terminal Including: Low-Power 3.3V 5.0V Transceivers Protocol Logic Supports MIL-STD-1553A/B Notice STANAG-3838 MIL-STD-1760 Stores Management World's Smallest CQFP SSRT 80-Pin Ceramic Flat Pack Gull Wing Package 3.3V Logic Power
DESCRIPTION
BU-64703 Simple System Mark3 (SSRT Mark3) MIL-STD1553 terminal provides complete interface between simple system MIL-STD-1553 bus. SSRT Mark3 powered entirely volts, thus eliminating need power supply. This terminal integrates dual transceiver, protocol logic, FIFO memory received messages extremely small, 0.88 inch square 0.130" height ceramic package. gull wing package with "toe-to-toe" maximum dimension 1.110 inches enables applications where board space premium. SSRT Mark3 provides multi-protocol support MIL-STD-1553A/B, MILSTD-1760, McAir, STANAG-3838. SSRT Mark3's transceivers completely monolithic, require only +3.3V supply (+5.0V available), consume power. internal architecture identical that original BU61703/61705 Simple System (SSRT). There versions Simple System Mark3 available with transceivers trimmed MIL-STD-1760 compliance, compatible McAir standards. SSRT Mark3 operate with choice clock frequencies MHz. SSRT Mark3 incorporates Built-In-Test (BIT). This BIT, which processed following power turn-on after receipt Initiate SelfTest Mode command, provides comprehensive test SSRT Mark3's encoders, decoders, protocol, transmitter watchdog timer, protocol section. SSRT Mark3 also includes auto-configuration feature. SSRT Mark3 ideal stores other simple systems that require microprocessor. streamline interface simple systems, SSRT Mark3 includes internal 32-word FIFO received data words. This serves ensure that only complete, consistent blocks validated data words transferred system.
Meets 1553A/McAir Response Time Requirements Internal FIFO Burst Mode Capability Receive Data 16-bit Interface Auto Configuration Capability Comprehensive Built-In Self-Test Direct Interface Simple (Processorless) Systems Available with Full Military Temperature Range Screening Selectable Input Clock:
MORE INFORMATION CONTACT:
Technical Support: 1-800-DDC-5757 ext. 7771
Data Device Corporation Wilbur Place Bohemia, York 11716 631-567-5600 Fax: 631-567-7358 www.ddc-web.com
2003 Data Device Corporation
Data Device Corporation www.ddc-web.com
TX_INH MSTCLR
+Vcc
TX/RX TRANSCEIVER DATA BUFFERS HANDSHAKE TRANSFER CONTROL LOGIC D15-D0 DTREQ DTGRT DTACK FAIL MEMOE MEMWR
SYSTEM DATA
TX/RX
TX/RX TRANSCEIVER
HANDSHAKE CONTROL
TX/RX
DATA TRANSFER CONTROL
CONTROL INPUTS
AUTO_CFG BRO_ENA
DUAL ENCODER DECODER STATE LOGIC
L_BRO, T/R, SA4-SA0 WC/MC/CWC4-0
COMMAND ADDRESS
ILLEGAL
RTAD4-RTAD0
SRV_RQST SSFLAG BUSY RTACTIVE INCMD
ADDRESS
RTADP RT_AD_LAT RT_AD_ERR
WORD INPUTS
CLK_IN
MSG_ERR RTFAIL
CLOCK FREQUENCY SELECTION
CLK_SEL1 CLK_SEL0
MESSAGE STATUS
BU-64703 C-12/03-0
FIGURE SSRT Mark3 BLOCK DIAGRAM
TABLE SSRT Mark3 SPECIFICATIONS
PARAMETER ABSOLUTE MAXIMUM RATING Supply Voltage Logic +3.3V Transceivers +3.3V (Note (not during transmit) Transceiver +3.3V (during transmit) (Note Transceiver +5.0V +3.3V Logic Input Range RECEIVER Differential Input Resistance (Notes 1-6) Differential Input Capacitance (Notes 1-6) Threshold Voltage, Transformer Coupled, Measured Stub Common Mode Voltage (Note TRANSMITTER Differential Output Voltage (Note Direct Coupled Across Measured Transformer Coupled Across Measured BU-64703XX-XX0 BU-64703X8/3-XX2 (Note Output Noise, Differential (Direct Coupled) Output Offset Voltage, Transformer Coupled Across ohms Rise/Fall Time BU-64703X8/3 BU-64703X9/4 LOGIC signals except CLOCK_IN CLOCK_IN signals except CLOCK_IN CLOCK_IN Schmidt Hysteresis signals except CLOCK_IN CLOCK_IN IIH, signals except CLOCK_IN (Vcc=3.6V, VIN=Vcc) (Vcc=3.6V, VIH=2.7V) (Vcc=3.6V, VIH=0.4V) CLOCK_IN (Vcc=3.0V, VIH=2.7V, VIL=0.2V, IOH=max) (Vcc=3.0V, VIH=2.7V, VIL=0.2V, IOL=max) (Vcc 3.0V) (Vcc 3.0V) (Input Capacitance) (Bi-directional signal input capacitance) UNITS
TABLE SSRT Mark3 SPECIFICATIONS (Cont'd)
PARAMETER POWER SUPPLY REQUIREMENTS Voltages/Tolerances +3.3V Logic +3.3V Transceivers (Note +5.0V Transceivers Current Drain(Total Hybrid)(Notes 8,14) BU-64703X8/9-XX0,(1553 McAir) Idle Transmitter Duty Cycle Transmitter Duty Cycle 100% Transmitter Duty Cycle BU-64703X8-XX2, (1760) Idle Transmitter Duty Cycle Transmitter Duty Cycle 100% Transmitter Duty Cycle Current Drain(Total Hybrid)(Notes 8,14) BU-64703X3/4-X00,(1553 McAir) (Ch. Idle Transmitter Duty Cycle Transmitter Duty Cycle 100% Transmitter Duty Cycle 3.3V Logic BU-64703X3-X02,(1760) (Ch. Idle Transmitter Duty Cycle Transmitter Duty Cycle 100% Transmitter Duty Cycle 3.3V Logic POWER DISSIPATION Total Hybrid (Notes BU-64703X8/9-XX0, (1553 McAir) Idle Transmitter Duty Cycle Transmitter Duty Cycle 100% Transmitter Duty Cycle BU-64703X8-XX2, (1760) Idle Transmitter Duty Cycle Transmitter Duty Cycle 100% Transmitter Duty Cycle BU-64703X3/4-X00, (1553 McAir) Idle Transmitter Duty Cycle Transmitter Duty Cycle 100% Transmitter Duty Cycle BU-64703X3-X02, (1760) Idle Transmitter Duty Cycle Transmitter Duty Cycle 100% Transmitter Duty Cycle Hottest BU-64703X8/9-XX0 (1553 &McAir) Idle Transmitter Duty Cycle Transmitter Duty Cycle 100% Transmitter Duty Cycle BU-64703X8-XX2 (1760) Idle Transmitter Duty Cycle Transmitter Duty Cycle 100% Transmitter Duty Cycle UNITS
-0.3 -0.3 -0.3 -0.3 -0.3
3.00 3.14 4.75
3.60 3.46 5.25
0.200 0.860
Vp-p Vpeak
Vp-p
21.5
Vp-p Vp-p mVp-p mVpeak
-250
nsec nsec
0.31 0.69 1.04 1.74 0.31 0.71 1.08 1.83 0.63 0.85 1.07 1.51 0.63 0.86 1.09 1.56
-350 -350
-2.2
0.09 0.47 0.82 1.52 0.09 0.49 0.85 1.61
Data Device Corporation www.ddc-web.com
BU-64703 C-12/03-0
TABLE SSRT Mark3 SPECIFICATIONS (Cont'd)
PARAMETER POWER DISSIPATION (CONT'D) BU-64703X3/4-X00 (1553 &McAir) Idle Transmitter Duty Cycle Transmitter Duty Cycle 100% Transmitter Duty Cycle BU-64703X3-X02 (1760) Idle Transmitter Duty Cycle Transmitter Duty Cycle 100% Transmitter Duty Cycle CLOCK INPUT Frequency Nominal Value Default Option Option Option
Long Term Tolerance
TABLE SSRT Mark3 SPECIFICATIONS (Cont'd)
PARAMETER 1553 MESSAGE TIMING RT-to-RT Response Timeout (Note Response Time (mid-parity mid-sync) (Note Transmitter Watchdog Timeout THERMAL Thermal Resistance (Notes Ceramic Flatpack Gull Lead Junction-to-Case, Hottest (JC) Operating Case Temperature -1XX, -4XX -2XX, -5XX -3XX, -8XX Operating Junction Temperature Storage Temperature Lead Temperature (soldering, sec.) PHYSICAL CHARACTERISTICS Size 80-pin Ceramic Flatpack Gull Lead Lead Toe-to-Toe Distance 80-pin Gull Wing UNITS
UNITS
0.25 0.47 0.69 1.13 0.25 0.48 0.71 1.18
17.5
18.5
19.5
660.5
°C/W
16.0 12.0 10.0 20.0
+125 +300
1553A Compliance 1553B Compliance
Short Term Tolerance, second
0.01 0.10
-0.01 -0.10
0.88 0.88 0.13 (22.3 22.3 3.3) 1.110 (28.194)
(mm) (mm)
1553A Compliance 1553B Compliance
Duty Cycle
-0.001 -0.01
0.001 0.01
Weight 80-pin Ceramic Flatpack/Gull Wing Package
0.353 (10)
NOTES: Notes through applicable Receiver Differential Resistance Differential Capacitance Specifications: Specifications include both transmitter receiver (tied together internally). Impedance parameters specified directly between pins TX/RX A(B) TX/RX A(B) SSRT Mark3 hybrid. assumed that power ground inputs hybrid connected. specifications applicable both unpowered powered conditions. specifications assume volt balanced, differential, sinusoidal input. applicable frequency range MHz. Minimum resistance maximum capacitance parameters guaranteed over operating range, tested. Assumes common mode voltage within frequency range MHz, applied pins isolation transformer stub side (either direct transformer coupled), referenced hybridground. Transformer must recommended transformer other transformer that provides equivalent minimum CMRR. more product type fields indicates that reference applicable available product options. MIL-STD-1760 requires Vp-p minimum output stub connection.
(10) External tantalum capacitors ground should located close possible +3.3 input pins. (11) Power dissipation input power minus power delivered 1553 fault isolation resistors, power delivered termination resistors, copper losses transceiver isolation transformer coupling transformer. illustration external power dissipation transformer coupled configuration (while transmitting) 0.14 watts active isolation transformer, 0.08 watts active coupling transformer, 0.45 watts each isolation resistors 0.15 watts each termination resistors. (12) Measured from mid-parity crossing command word mid-sync crossing RT's status word. (13) measured bottom ceramic case. (14) Current drain power dissipation specifications based small sample size subject change.
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BU-64703 C-12/03-0
INTRODUCTION
GENERAL
BU-64703 Simple System Mark3 (SSRT Mark3) complete MIL-STD-1553 Remote Terminal (RT) interface unit. Contained this hybrid dual transceiver Manchester encoder/decoder, MIL-STD-1553 Remote Terminal (RT) protocol logic. Also included built-in self-test capability parallel subsystem interface. subsystem interface includes 12-bit address 16-bit data that operates 16-bit handshake transfer configuration. local associated control signals optimized +3.3 volt logic volt tolerant. transceiver front SSRT Mark3 implemented means low-power monolithic technology. transceiver requires only single +3.3V voltage source (+5.0V available). voltage source transmitters provide superior line driving capability long cables heavy amounts loading. addition, monolithic transceivers provide minimum stub voltage level volts peak-to-peak transformer coupled, making SSRT Mark3 suitable MIL-STD-1760 applications. provide compatibility McAir specs, SSRT Mark3 available with option transmitters with increased rise fall times. Besides eliminating demand additional power supply, +3.3V only transceiver requires step-up, rather than step-down, isolation transformer. This provides advantage higher terminal input impedance than possible 15V, transmitter. result, there greater margin input impedance test, mandated 1553 validation test. This allows longer cable lengths between system connector isolation transformers embedded 1553 terminal. receiver sections SSRT Mark3 fully compliant with MIL-STD-1553B terms front-end overvoltage protection, threshold, bit-error rate. SSRT Mark3 implements MIL-STD-1553 message formats, including MIL-STD-1553 dual redundant mode codes. subset possible 1553 commands (broadcast, bit, subaddress, word count/mode code) optionally illegalized means external PROM, PLD, RAM. extensive amount message validation performed each message received. Each word received validated correct sync type sync encoding, Manchester encoding, parity, count. messages verified contain legal, defined command word correct word count. SSRT Mark3 receiving RT-to-RT transfer, verifies that transmit command word logic that transmitting responds time contains correct address Status Word.
SSRT Mark3 operated from clock input. clock frequency, decoder samples incoming data both edges clock input. This oversampling, effect, provides sampling rate twice input clocks' frequency. Benefits higher sampling rate include wider tolerance zero-crossing distortion improved error rate performance. SSRT Mark3 includes hardwired address input. This includes address lines, address parity input, address parity error output. address also latched means latching input signal. SSRT Mark3 supports command illegalization. Commands illegalized asserting input signal ILLEGAL active within approximately after mid-parity zero-crossing received command word. Command words illegalized function broadcast, bit, subaddress, word count, and/or mode code. internal Built-in-Test (BIT) Word register updated each message. contents Word Register transmitted response Transmit Word Mode Command. SSRT Mark3 provides number real-time output signals. These various signals provide indications message progress, valid received message, message error, handshake fail, loop-test fail transmitter timeout. SSRT Mark3 includes standard handshake signals (Request, Grant, Acknowledge) well transfer control outputs (MEMOE MEMWR). interface operates 16-bit mode, supporting word-wide transfers. SSRT Mark3's system interface allows SSRT Mark3 interfaced directly simple system that doesn't include microprocessor. This provides low-cost 1553 interface converters, switch closures, actuators, other discrete signals. SSRT Mark3 internal FIFO received data words. This 32-word deep FIFO used allow SSRT Mark3 transfer data words local system burst mode. Burst mode utilizes FIFO transferring data local rate data word every three clock cycles. Burst mode negotiates only once subsystem bus. Negotiation performed only after 1553 data words have been received validated. non-burst mode, SSRT Mark3 will negotiate local after every received data word. data word transfer period three clock cycles each received 1553 data word. SSRT Mark3 also used shared interface configuration. means tri-state buffers small amount "glue" logic, SSRT Mark3 will store Command Words access Data Words to/from dedicated "mailbox" areas
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BU-64703 C-12/03-0
shared each broadcast subaddress mode code.
INTERFACE
16-bit data bus, 12-bit address bus, control signals provided facilitate communication with parallel subsystem. data D15-D0 consists bi-directional tri-state signals. address L_BRO, T/R, SA4-SA0, WC/MC/CWC4-0; along with data transfer control signals MEMOE MEMWR two-state output signals. control signals include standard handshake signals DTREQ, DTGRT, DTACK, well transfer control outputs MEMOE MEMWR. HS_FAIL provides indication subsystem handshake failure condition. Data transfers between subsystem SSRT Mark3 performed means handshake, initiated SSRT Mark3. data read operation defined transfer data from subsystem SSRT Mark3. Conversely, data write operation transfers data from SSRT Mark3 subsystem. Data transferred single 16-bit word.
BU-64703E8 SSRT MARK3 (+3.3V) TRANSFORMER EVALUATION BOARD (SEE FIGURE
BU-64703E8 board intended support customers interested electrically connecting evaluating performance +3.3V SSRT Mark3. user will able quickly perform functional tests their system software utilizing this relatively small (2.0" 2.5") evaluation board. BU-64703E8 consists board incorporating +3.3V SSRT Mark3 (BU-64703G8), necessary decoupling capacitors, associated isolation transformers. MIL-STD-1553 outputs have been factory configured Stub (transformer) coupling. board supports signal fan-out +3.3V SSRT Mark3 pins subdivided into dual inline, berg type rows. These pins (0.025" square max) their placement adhere standard 0.100" vector board spacing.
ADDRESS MAPPING
typical addressing scheme SSRT Mark3 12-bit address could follows: A11: A10: A9-A5: A4-A0: BROADCAST/OWNADDRESS TRANSMIT/RECEIVE SUBADDRESS WORD COUNT/MODE CODE
READ OPERATION
response transmit command, SSRT Mark3 needs read data words from external subsystem. initiate data word read transfer, SSRT Mark3 asserts signal DTREQ low. Assuming that subsystem asserts DTGRT time, SSRT Mark3 will then assert appropriate values L_BRO (logic "0"), (high), SA4-0, MC/CWC4-0; MEMWR high, along with DTACK MEMOE enable data read from subsystem. After transfer each Data Word been completed, value address outputs CWC4 through CWC0 incremented.
This method address mapping provides "mailbox" allocation scheme storage data words. address outputs used into words processor address space. SSRT Mark3's addressing scheme maps messages terms broadcast/ownaddress, transmit/receive, subaddress, word/count mode code. 32-word message block allocated each T/R-subaddress. non-mode code messages, Data Words transmitted received accessed from (to) relative locations through within respective message block. MIL-STD-1553B Synchronize with data, Selected transmitter shutdown, Override selected transmitter shutdown, Transmit vector word mode commands which involve single data word transfer, address data word offset from location message block subaddresses value mode code field received command word. data words transmitted response Transmit last command Transmit word mode commands accessed from pair internal registers.
WRITE OPERATION
response receive command, SSRT Mark3 will need transfer data subsystem. There options doing this, burst mode non-burst mode. burst mode, received data words transferred from SSRT Mark3 subsystem contiguous burst, only following reception correct number valid data words. non-burst mode, single data words written external subsystem immediately following reception each individual data word. initiate write cycle, SSRT Mark3 asserts DTREQ low. subsystem must then respond with DTGRT low. Assuming that DTGRT asserted time, SSRT Mark3 will then assert DTACK low. SSRT Mark3 will then assert appropriate value L_BRO, T/R, SA4-0, MC/CWC4-0, MEMOE high, MEMWR low. MEMWR will asserted clock cycle. subsystem then either falling rising edge MEMWR latch data. Similar read operation, address outputs CWC4 through CWC0 incremented after completion write operation.
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BU-64703 C-12/03-0
0.062 (1.57) 0.230 [5.84] 0.025 ±.001 [0.64]
Data Device Corporation www.ddc-web.com BU-64703 C-12/03-0
2.200 [55.88] EQUAL 0.100 [2.54]= 1.500 [38.10] (TOL-NONCUM) 2.300 [58.42]
2.500 [63.50] (MAX)
0.600 [15.24] 0.100 [2.54]
0.300 [7.62] (MAX) 0.100 [2.54]
0.100 [2.54] 0.150 [3.81] 0.300 [7.62] EQUAL SPACES 0.100 [2.54] 1.100 [27.94] (TOL NON-CUM) Dimensions inches [mm] 1.600 [40.64]
0.090 [2.30]
1.700 [43.18] 2.000 [50.80]
FIGURE BU-64703E8 SSRT Mark3 (+3.3V) TRANSFORMER EVALUATION BOARD
HANDSHAKE FAIL
Following assertion DTREQ SSRT Mark3, external subsystem respond asserting DTACK logic "0". SSRT Mark3 asserts DTREQ subsystem does respond with DTGRT time SSRT Mark3 complete data word transfer, HSFAIL output will asserted inform subsystem handshake failure, internal Built-In-Test (BIT) word will logic "1". handshake failure occurs data word read transfer (for transmit command), SSRT Mark3 will abort current message transmission. case handshake failure write transfer (received command) SSRT Mark3 will handshake failure output word bit, abort processing current message.
MIL-STD-1553 commands transfer received data from non-broadcast messages parity presented RT_AD_4-0 RT_AD_P. address parity error will indicated output RT_AD_ERR pin. input signal RT_AD_LAT operates transparent latch RTAD4RTAD0 RTADP. RT_AD_LAT low, output latch tracks value presented input pins. RT_AD_LAT high, output internal latch becomes latched values presented time low-to-high transition RT_AD_LAT. address Address Parity must presented valid before mid-parity crossing 1553 command held, least, until following first received data word.
COMMAND ILLEGALIZATION
SSRT Mark3 includes provision command illegalization. command illegalized, SSRT Mark3 will Message error transmit status word Controller. data words will transmitted response illegalized transmit command. However, data words associated with illegalized receive command will written external subsystem (although these transfers blocked using external logic). ILLEGAL sampled approximately following mid-parity zero crossing received command word. ILLEGAL will illegalize particular command word cause SSRT Mark3 respond with Message error status word. Command illegalization based broadcast, bit, subaddress, and/or word count/mode code implemented means external PROM, PLD, device, shown Figure
MESSAGE PROCESSING OPERATION
Following receipt transfer valid Command Word, SSRT Mark3 will attempt perform following operations: transfer received 1553 data subsystem, read data from subsystem transmission 1553 bus, transmit status (and possibly last command word word) 1553 bus, and/or status word conditions. SSRT Mark3 responds non-broadcast messages address with 1553 Status Word.
ADDRESS
Address (RT_AD_4 MSB) Address Parity (RT_AD_P) should programmed unique address reflect parity sum. SSRT Mark3 will respond
L-BRO
PROM (4Kx1) (400ns max)
64703
WC/MC/CWC4
"SSRT Mark3"
WC/MC/CWC3 WC/MC/CWC2 WC/MC/CWC1 WC/MC/CWC0
FIGURE SSRT Mark3 ILLEGALIZATION
Data Device Corporation www.ddc-web.com BU-64703 C-12/03-0
external device used define legality specific commands. subset possible 1553 commands illegalized function broadcast, bit, subaddress, word count, and/or mode code. output illegalization device should tied directly SSRT Mark3's ILLEGAL signal input. maximum access time external illegalizing device illegalization used, ILLEGAL should hardwired logic "1".
Command Word followed correct number valid Data Words assuming that words successfully transferred subsystem, negative pulse will asserted Good Block Received (GBR) output. width this pulse clock cycles. burst mode, handshake will initiated until after data words have been received over 1553 data stored into SSRT Mark3's internal FIFO. After handshake been negotiated, SSRT Mark3 will burst contents FIFO local (D0-D15). After reception valid non-mode code receive command word followed correct number valid data words assuming that words successfully transferred subsystem, negative pulse will asserted output Good Block Received (GBR). width this pulse clock cycles.
BUSY
external subsystem control SSRT Mark3's Busy status word means BUSY input signal. SSRT Mark3 samples BUSY approximately following mid-parity zero crossing received Command Word. BUSY sampled particular message, value busy transmitted SSRT Mark3's status word will logic "1". BUSY sampled high particular message, value busy transmitted SSRT Mark3's status word will logic "0". responds transmit command with busy logic "1", status word will transmitted, data words will transmitted SSRT Mark3. SSRT Mark3 responds receive command with busy logic "1", data words will transferred external subsystem (although these blocked means external logic). Similar ILLEGAL, possible cause SSRT Mark3 respond with Busy specific command words (only), means external PROM, RAM, device.
RT-TO-RT TRANSFER ERRORS
case where SSRT Mark3 receiving RT-to-RT transfer, transmitting does respond within specified time period, SSRT Mark3 will determine that timeout condition occurred. value SSRT Mark3's RT-to-RT timeout timer range from 17.5 18.5 specified from mid-parity crossing transmit command word mid-sync crossing transmitting RT's status word. case RT-to-RT timeout, SSRT Mark3 will respond RT-to-RT TRANSFER TIMEOUT (bit SSRT Mark3's Word will logic "1". Also, SSRT Mark3 receiving RT-to-RT transfer, second command word logic "0", address field transmit command same receive command, subaddress transmit command 00000 11111, SSRT Mark3 will respond, will RT-to-RT SECOND COMMAND ERROR (bit word logic "1".
TRANSMIT COMMAND (RT-TO-BC TRANSFER)
SSRT Mark3 receives valid Transmit command word that subsystem determines legal (input signal ILLEGAL high) subsystem BUSY (input signal BUSY high), SSRT Mark3 will initiate transmit data response following transmission status word. This entails handshake/read cycle each data word transmitted, with number data words transmitted specified word count field transmit command word. ILLEGAL sampled low, Message Error will SSRT Mark3's status word. data words will transmitted following transmission status word illegalized transmit command. BUSY input will busy Status Word; this instance, only status word will transmitted, with data words.
STATUS, ERROR HANDLING, MESSAGE TIMING SIGNALS
Message transfers transfer errors indicated means INCMD, HS_FAIL, MSG_ERR, RTFAIL error indication outputs. Additional error detection indication mechanisms include updating internal command, status word registers. SSRT Mark3 provides number timing signals during processing 1553 messages. INCMD asserted when command received. message (either valid invalid), INCMD transitions from high. discussed above, HS_FAIL will asserted subsystem fails respond DTREQ within maximum amount time µs). Following last data word transfer valid non-mode code receive message (for either non-burst mode burst mode), will asserted clock cycles. BU-64703 C-12/03-0
RECEIVE COMMAND (BC-TO-RT TRANSFER)
non-burst mode, handshake will initiated each data word received from 1553 data bus. successful, respective handshake will followed corresponding write cycle. handshake timeout will terminate transfer attempts remaining data words, error flagging Status Word transmission. After reception valid non-mode code receive
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TABLE AUTO-CONFIGURATION PARAMETERS
FUNCTION GOES ONLINE SELF-TEST FAILS RTFAIL-to-TERMINAL FLAG AUTOWRAP MIL-STD-1553A/B logic "1", default). DESCRIPTION logic "0", will become enabled only self-test passes. autoconfig used, this logic "1", power-up self-test passes, then will online following self-test. loop test fails particular message, Terminal flag will SSRT Mark3's status response subsequent non-broadcast message. MIL-STD-1553B mode, subaddress mode code subaddress, mode codes implemented full accordance with MIL-STD-1553B. MILSTD-1553A mode, subaddress non-mode code subaddress, data words transmitted anticipated received mode code messages. Subaddress wraparound enabled. That data words receive message subaddress stored internal FIFO, transferred external system. subsequent transmit message subaddress transmitted data words read from internal FIFO, rather than from external system. Enables burst mode (using internal FIFO) received data words. burst mode, receive message, data words transferred external system contiguous burst following reception last data word. enabled, SSRT Mark3 will perform self-test following rising edge MSTCLR.
SUBADDRESS WRAPAROUND
BURST MODE
POWER-UP SELFTEST ENABLE
MSG_ERR asserted output level following detected error received message, except error command word. error detected received command word, rest message will ignored. MSG_ERR and/or HS_FAIL have been asserted (low), they will cleared logic following receipt subsequent valid command word.
more transmitted words, Terminal flag status word will response next non-broadcast message. Note that setting Terminal flag status following loop test failure disabled means Auto-Config feature; i.e., setting Auto-Config logic "0".
STATUS WORD
Broadcast Command Received formulated internally SSRT Mark3. Message Error Status will current command Transmit Status Word Transmit Last Command mode command there error data portion previous receive message. Message Error will also ILLEGAL been sampled SSRT Mark3 current message. ILLEGAL, SRV_RQST, BUSY, SSFLAG (Subsystem Flag) will sampled from their respective Status input pins approximately following mid-parity zero crossing received Command Word. This time
LOOPBACK TEST
SSRT Mark3 performs loopback self-test each non-broadcast message processed. loopback test consists following verifications: received version every transmitted word verified validity (encoding, count, parity) correct sync type; received version last transmitted word verified means bit-by-bit comparison transmitted version this word. there transmitter timeout (660.5 and/or loopback test fails
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BU-64703 C-12/03-0
TABLE CLOCK FREQUENCY SELECTION
CLK_SEL_1 CLK_SEL_0 CLOCK FREQUENCY
maximum following after L_BRO, T/R, SA4-0, WC/MC/CWC4-0 outputs have been presented valid.
AUTO-CONFIGURATION
SSRT Mark3 includes auto-configuration feature, which allows various optional features enabled disabled. Autoconfiguration enabled disabled means input signal AUTO_CFG. AUTO_CFG connected logic "1", then auto-configure option disabled, configuration parameters revert their default values. Note that default condition each configuration parameter enabled (for MIL-STD-1553A/B protocol selection, 1553B default). AUTO_CFG connected logic "0", then configuration parameters transferred over D5-D0 means read data transfer. transfer occurs during time that RTACTIVE DTACK outputs logic "0", following MSTCLR transitioning from logic logic successful DT_REQ-to-DTGRT handshake. Note that DTGRT hardwired logic "0", handshake process necessary (i.e., DTACK RTACTIVE will both asserted logic clock cycle following DT_REQ). Each configuration parameters enabled SSRT Mark3 reads value logic respective data bit. auto-configuration parameters defined TABLE timing signals pertaining Auto-Configuration mode illustrated Figure
PROTOCOL SELF-TEST
SSRT Mark3 includes comprehensive, autonomous offline self-test internal protocol logic. test includes comprehensive test registers, Manchester encoder decoders, transmitter failsafe timer, protocol logic, internal FIFO. This test completed approximately 32,000 clock cycles. That about with clock, MHz, MHz, MHz. While SSRT Mark3 performing off-line self-test, will ignore (and therefore respond messages received from 1553 bus. Unless disabled means SSRT Mark3's Auto-Config feature, protocol self-test will performed following SSRT Mark3's power turn-on (i.e., when MSTCLR released high). Auto-Config feature used Auto-Config logic "0", then failure protocol self-test following power turn-on will result SSRT Mark3 going online. logic protocol self-test passes following power turn-on, SSRT Mark3 will online. protocol self-test will also performed following receipt Initiate self-test mode command from 1553 bus. Initiate self-test mode command received SSRT Mark3, Auto-Config logic "0", then failure protocol self-test following will result SSRT Mark3 going offline. protocol self-test fails: Terminal Flag will logic SSRT Mark3 status word; SSRT Mark3's word, Test Fail, will logic "1"; SSRT Mark3's RTFAIL output will asserted logic "0".
CLOCK INPUT
SSRT Mark3 operated from four clock frequencies: MHz. selected clock frequency must designated means input signals CLK_SEL_1 CLK_SEL_0, shown TABLE
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TABLE FIGURE RECEIVE COMMAND TIMING (BURST MODE)
DESCRIPTION Mid-parity crossing received command word delay SA4-SA0, L-BRO, Bit, WC/MC valid Mid-parity crossing received command word delay falling edge INCMD Mid-parity crossing received command word delay MSG_ERR HS_FAIL rising ILLEGAL, SRV_RQST, SSFLAG, BUSY input access time from SA4-SA0, L-BRO, T/R, CWC/MC valid L_BRO, T/R, SA4-0, WC/MC4-0 valid prior INCMD low. ILLEGAL, SRV_RQST, SSFLAG, BUSY hold time following falling edge INCMD Mid-parity crossing first data word WC/CWC valid data Duration WC/CWC data value Response time. transition next word following mid-parity subsequent received data words. Mid-parity crossing last data word DTREQ falling edge (requesting data word burst write transfer) Mid-Sync crossing Status response RT_FAIL rising valid following falling edge DTREQ CLOCK FREQUENCY 5.25 RESPONSE TIME UNITS
pulse width (see Note
Mid-parity crossing status word INCMD rising
message Broadcast message then rising edge INCMD referenced from rising edge GBR.
MID-PARITY MID-PARITY DATA MID-PARITY MID-SYNC MID-PARITY STATUS
1553
COMMAND DATA
L-BRO, T/R, SA4-SA0 WC/MC/CWC
PREVIOUS
ILLEGAL, SRV_RQST SSFLAG, BUSY
VALID
INCMD DTREQ DTGRT DTACK D15-D0 MEMWR MEMOE
NOTE
BURST DATA WRITE TRANSFER
(Refer FIGURE
RT_FAIL
MSG_ERR HS_FAIL
RECEIVE COMMAND (BURST MODE) NOTE message Broadcast message then rising edge INCMD referenced from rising edge GBR.
FIGURE RECEIVE COMMAND (BURST MODE) TIMING
Data Device Corporation www.ddc-web.com BU-64703 C-12/03-0
TABLE FIGURE RECEIVE COMMAND TIMING (NON-BURST MODE)
DESCRIPTION Mid-parity crossing received command word delay SA4-SA0, L-BRO, Bit, WC/MC valid Mid-parity crossing received command word delay falling edge INCMD Mid-parity crossing received command word delay MSG_ERR HS_FAIL rising ILLEGAL, SRV_RQST, SSFLAG, BUSY input access time from SA4-SA0, L-BRO, T/R, CWC/MC valid Sub-Address, L-BRO, setup time prior INCMD ILLEGAL, SRV_RQST, SSFLAG, BUSY valid time following falling edge INCMD Mid-parity crossing WC/CWC value CLOCK FREQUENCY 1.25 1.33 RESPONSE TIME UNITS
Mid-parity crossing first data word DTREQ falling edge
WC/CWC data value held
valid following falling edge DTREQ Response time. Delay from following mid-parity last received data word low. (see Notes Mid-parity crossing data words, except first data word, DTREQ falling edge pulse width
transition prior Mid-Sync crossing Status response.
Mid-Sync crossing status response RT_FAIL rising Mid-parity crossing status word INCMD rising
Assumes that DTGRT tied logic "0". DTGRT connected logic "0", minimum time drive active will increase amount DTGRT (low) DTGRT (low) delay. transceiver delays measured range 150ns 450ns receiver 100ns 250ns transmitter.
MID-PARITY MID-PARITY DATA MID-PARITY MID-SYNC MID-PARITY STATUS
1553
COMMAND DATA
L-BRO, T/R, SA4-SA0 WC/MC/CWC
PREVIOUS
ILLEGAL, SRV_RQST SSFLAG, BUSY
VALID
INCMD DTREQ DTGRT DTACK D15-D0 MEMWR MEMOE RT_FAIL MSG_ERR HS_FAIL
SINGLE WORD WRITE DATA WORD
SINGLE WORD WRITE DATA WORD
(Refer FIGURE
FIGURE RECEIVE COMMAND (NON-BURST MODE) TIMING
Data Device Corporation www.ddc-web.com BU-64703 C-12/03-0
TABLE FIGURE TRANSMIT COMMAND TIMING
Response time. Mid-parity crossing received command word delay L-BRO, Bit, SA4-SA0, WC/MC valid Mid-parity crossing received command word delay falling edge INCMD Mid-Parity crossing receive command word delay MSG_ERR HS_FAIL rising ILLEGAL, SRV_RQST, SSFLAG, BUSY input access time from SA4-SA0, L-BRO, Bit, CWC/MC valid L-BRO, T/R, SA4-0, WC/MC4-0 setup time prior INCMD ILLEGAL, SRV_RQST, SSFLAG, BUSY hold time following falling edge INCMD Mid-Sync crossing status word WC/CWC valid data DESCRIPTION CLOCK FREQUENCY 6.75 6.81 6.92 1.75 1.81 1.92 1.55 1.56 1.59 VALUE UNITS
Mid-Sync crossing status word DTREQ falling edge
Mid-Sync crossing Status response RT_FAIL rising (see Note
Duration WC/CWC value
valid following falling edge DTREQ
Mid-Sync crossing received data word DTREQ falling edge
Mid-Sync crossing last received data word transition
Mid-Parity crossing status word INCMD rising
Assuming that RTFAIL previously low.
MID-PARITY MID-SYNC MID-SYNC STATUS DATA MID-SYNC MID-PARITY DATA
1553
COMMAND
L-BRO, T/R, SA4-SA0 WC/MC/CWC
PREVIOUS
ILLEGAL, SRV_RQST SSFLAG, BUSY
VALID
INCMD DTREQ
DTGRT DTACK D15-D0 MEMWR MEMOE RT_FAIL MSG_ERR HS_FAIL
SINGLE WORD READ
SINGLE WORD READ
(Refer FIGURE
DATA WORD DATA WORD
FIGURE TRANSMIT COMMAND TIMING
Data Device Corporation www.ddc-web.com BU-64703 C-12/03-0
TABLE FIGURE RT-RT TRANSMIT COMMAND TIMING
DESCRIPTION response timeout transmitting Mid-parity crossing received command word delay L-BRO, Bit, SA4-SA0, WC/MC valid Mid-parity crossing received command word delay falling edge INCMD Mid-Parity crossing received command word delay MSG_ERR HS_FAIL rising ILLEGAL, SRV_RQST, SSFLAG, BUSY input access time from SA4-SA0, L-BRO, T/R, CWC/MC valid L-BRO, T/R, SA4-0, WC/MC4-0 setup time prior INCMD ILLEGAL, SRV_RQST, SSFLAG, BUSY hold time following falling edge INCMD Mid-Sync crossing status word WC/CWC valid data CLOCK FREQUENCY 6.75 6.81 6.92 1.75 1.81 1.92 1.55 1.56 1.59
MID-PARITY STATUS
VALUE 17.5 18.5 19.5
UNITS
Mid-Sync crossing status word DTREQ falling edge
Mid-Sync crossing Status response RT_FAIL rising
Duration WC/CWC value
valid following falling edge DTREQ
Mid-Sync crossing received data word DTREQ falling edge
Mid-Sync crossing last received data word transition
Mid-Parity crossing status word INCMD rising
MID-PARITY MID-SYNC MID-SYNC
MID-SYNC
1553
COMMAND COMMAND STATUS DATA DATA
L-BRO, T/R, SA4-SA0 WC/MC/CWC
ILLEGAL, SRV_RQST SSFLAG, BUSY
PREVIOUS
VALID
INCMD DTREQ
DTGRT DTACK D15-D0 MEMWR MEMOE RT_FAIL MSG_ERR HS_FAIL
SINGLE WORD READ
SINGLE WORD READ DATA WORD
DATA WORD
(Refer FIGURE
FIGURE TRANSMIT TIMING
Data Device Corporation www.ddc-web.com BU-64703 C-12/03-0
TABLE FIGURE RT-RT RECEIVE COMMAND TIMING (BURST MODE)
DESCRIPTION Mid-parity crossing received command word delay SA4-SA0, L-BRO, Bit, WC/MC valid Mid-parity crossing received command word delay falling edge INCMD Mid-parity crossing received command word delay MSG_ERR HS_FAIL rising ILLEGAL, SRV_RQST, SSFLAG, BUSY input access time from SA4-SA0, L-BRO, T/R, CWC/MC valid L_BRO, T/R, SA4-0, WC/MC4-0 valid prior INCMD low. ILLEGAL, SRV_RQST, SSFLAG, BUSY hold time following falling edge INCMD response timeout transmitting Mid-parity crossing first data word WC/CWC valid data Duration WC/CWC data value Response time. transition next word following mid-parity subsequent received data words. Mid-parity crossing last data word DTREQ falling edge (requesting data word burst write transfer) Mid-Sync crossing Status response RT_FAIL rising valid following falling edge DTREQ CLOCK FREQUENCY 17.5 18.5 5.25 19.5 RESPONSE TIME UNITS
pulse width (see Note
Mid-parity crossing status word INCMD rising
message Broadcast message then rising edge INCMD referenced from rising edge GBR.
MID-PARITY
MID-PARITY
MID-SYNC
MID-PARITY DATA
MID-PARITY
MID-SYNC
MID-PARITY STATUS
1553 L-BRO, T/R, SA4-SA0 WC/MC/CWC
PREVIOUS
STATUS DATA
COMMAND
COMMAND
ILLEGAL, SRV_RQST SSFLAG, BUSY
VALID
INCMD DTREQ DTGRT DTACK D15-D0 MEMWR
NOTE
BURST DATA WRITE TRANSFER
(Refer FIGURE
MEMOE RT_FAIL MSG_ERR HS_FAIL
RECEIVE COMMAND (BURST MODE) NOTE message Broadcast message then rising edge INCMD referenced from rising edge GBR.
FIGURE RECEIVE (BURST-MODE) TIMING
Data Device Corporation www.ddc-web.com BU-64703 C-12/03-0
TABLE FIGURE RT-RT RECEIVE COMMAND TIMING (NON-BURST MODE)
DESCRIPTION Mid-parity crossing received command word delay SA4-SA0, L-BRO, Bit, WC/MC valid Mid-parity crossing received command word delay falling edge INCMD Mid-parity crossing receive command word delay MSG_ERR HS_FAIL rising ILLEGAL, SRV_RQST, SSFLAG, BUSY input access time from SA4-SA0, L-BRO, T/R, CWC/MC valid Sub-Address, L-BRO, setup time prior INCMD ILLEGAL, SRV_RQST, SSFLAG, BUSY valid time following falling edge INCMD response timeout transmitting Mid-parity crossing WC/CWC value CLOCK FREQUENCY 17.5 18.5 1.25 1.33 19.5 RESPONSE TIME UNITS
Mid-parity crossing first data word DTREQ falling edge
WC/CWC data value held
valid following falling edge DTREQ Response time. Delay from following mid-parity last received data word low. (see Notes Mid-parity crossing data words, except first data word, DTREQ falling edge pulse width
transition prior Mid-Sync crossing Status response.
Mid-Sync crossing status response RT_FAIL rising Mid-parity crossing status word INCMD rising
Assumes that DTGRT tied logic "0". DTGRT connected logic "0", minimum time drive active will increase amount DTGRT (low) DTGRT (low) delay. transceiver delays measured range 150ns 450ns receiver 100ns 250ns transmitter.
MID-PARITY MID-PARITY MID-SYNC MID-PARITY DATA MID-PARITY MID-SYNC MID-PARITY STATUS
1553
COMMAND COMMAND STATUS DATA
L-BRO, T/R, SA4-SA0 WC/MC/CWC
PREVIOUS
ILLEGAL, SRV_RQST SSFLAG, BUSY
VALID
INCMD DTREQ DTGRT DTACK D15-D0 MEMWR
SINGLE WORD WRITE DATA WORD
SINGLE WORD WRITE DATA WORD
(Refer FIGURE
MEMOE RT_FAIL MSG_ERR HS_FAIL
FIGURE RECEIVE (NON-BURST-MODE) TIMING
Data Device Corporation www.ddc-web.com BU-64703 C-12/03-0
TABLE FIGURE SSRT Mark3 WRITE (BURST MODE) TIMING
DESCRIPTION CLOCK rising DTREQ DTREQ falling DTGRT setup time prior MEMWR falling first word burst transfer (see Note DTGRT setup prior CLOCK rising edge CLOCK FREQUENCY 52.5 73.3 VALUE @3.3 VOLTS UNITS
DTGRT falling DTACK
CLOCK rising DTACK Data output valid following CLOCK DTGRT hold time following DTACK falling DTACK pulse width (based data word transfer) (see Note
Data output setup time prior MEMWR
CLOCK rising MEMWR
62.5 83.3
MEMWR pulse width
CLOCK rising MEMWR high
Data output hold time following MEMWR high
Data output hold time following CLOCK rising
(all first data word) setup time prior MEMWR CLOCK rising DTREQ DTACK high Data output signal Tri-State following CLOCK rising CLOCK rising falling edge
pulse width
INCMD rising following CLOCK rising (see Note
Assumes DTGRT time that DTREQ asserted low. not, then this time will increase amount DTREQ (low) DTGRT (low) delay. DTACK pulse width clock cycles data word transfer. Rising edge INCMD will immediately follow rising edge only broadcast message. non-broadcast message, rising edge INCMD will occur after mid-parity crossing status response. This additional delay time approximately clock cycles: MHz, MHz, MHz, MHz.
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BU-64703 C-12/03-0
CLOCK DTREQ DTGRT DTACK MEMWR MEMOE L-BRO, T/R, SA4-SA0 WC/MC/CWC D15-D0
VALID
DATA VALID
DATA VALID
INCMD
WRITE BURST MODE (SHOWN DATA WORDS)
INCMD rising edge shown case Broadcast command message. non-Broadcast case, INCMD rising edge after Mid-Parity crossing STATUS response.
FIGURE WRITE TRANSFER (BURST-MODE) TIMING
Data Device Corporation www.ddc-web.com
BU-64703 C-12/03-0
TABLE FIGURE SSRT Mark3 WRITE TIMING (NON-BURST)
DESCRIPTION CLOCK rising DTREQ DTREQ (low) DTGRT (low) delay time setup time prior MEMWR falling (see Note) DTGRT setup prior CLOCK rising CLOCK FREQUENCY 52.5 73.3 62.5 83.3 VALUE @3.3 VOLTS UNITS
DTGRT falling DTACK
CLOCK rising DTACK Data output valid following CLOCK rising DTGRT hold time following DTACK falling
DTACK pulse width
Data output setup time prior MEMWR
CLOCK rising MEMWR
MEMWR pulse width
CLOCK rising MEMWR high
Data output hold time following MEMWR high CLOCK rising DTREQ DTACK high Data output hold time following CLOCK rising Data output signal Tri-State following CLOCK rising
Assumes that DTGRT time DTREQ asserted low. not, these values increase delay time from DTREQ (low) DTGRT (low).
CLOCK DTREQ DTGRT DTACK MEMWR MEMOE L-BRO, T/R, SA4-SA0 WC/MC/CWC D15-D0
DATA VALID VALID
NON-BURST WRITE NOTE: With DTGRT tied GND, time from DTREQ DTACK clock cycle.
FIGURE WRITE TRANSFER (NON-BURST-MODE) TIMING
Data Device Corporation www.ddc-web.com BU-64703 C-12/03-0
TABLE FIGURE SSRT Mark3 READ TIMING
DESCRIPTION CLOCK rising DTREQ DTREQ (low) DTGRT delay time CLOCK FREQUENCY VALUE @3.3 VOLTS UNITS
setup time prior MEMOE falling
DTGRT setup prior CLOCK rising
DTGRT falling DTACK
CLOCK rising DTACK DTGRT hold time following DTACK falling
DTACK pulse width
CLOCK rising MEMOE
MEMOE pulse width
Time input data become valid following falling edge MEMOE
Data input hold time following CLOCK rising (see Note) CLOCK rising DTREQ, DTACK, MEMOE high
SSRT Mark3's data sampling time occurs clock cycle prior rising edge MEMOE.
CLOCK DTREQ DTGRT DTACK MEMWR MEMOE L-BRO, T/R, SA4-SA0 WC/CWC
VALID
D15-D0
DATA VALID
SINGLE WORD READ
FIGURE READ TRANSFER TIMING
Data Device Corporation www.ddc-web.com BU-64703 C-12/03-0
TABLE FIGURE AUTO-CONFIGURATION READ TIMING
DESCRIPTION CLOCK FREQUENCY VALUE @3.3 VOLTS 47.5 68.3 62.5 83.3 77.5 98.3 UNITS
MSTCLR high delay DTREQ
CLOCK rising DTREQ DTREQ (low) DTGRT delay time DTGRT setup prior CLOCK rising
DTGRT falling DTACK
CLOCK rising DTACK DTGRT hold time following DTACK falling
DTACK pulse width
Time input data become valid following falling edge DTACK
Data input hold time following sampling time (see Note CLOCK rising DTREQ, DTACK, MEMOE high
RTACTIVE high delayed from DTACK high (see Note
CLOCK rising RTACTIVE high
During Auto-Configuration SSRT Mark3 samples data three clock cycles following falling edge DTACK. self-test mode enabled, then RTACTIVE will active high clock cycle following rising edge DTACK. self-test enabled then RTACTIVE will delayed from going active high accordance with `t12'.
CLOCK MSTCLR DTREQ DTGRT DTACK RTACTIVE MEMWR MEMOE D15-D0
DATA VALID
note1
AUTO-CONFIGURATION SINGLE WORD READ Note1: RTACTIVE asserted high clock following DTACK high assuming self-test enabled. When self-test enabled RTACTIVE delayed amount 't12'. table reference details.
FIGURE AUTO-CONFIGURATION READ TRANSFER TIMING
Data Device Corporation www.ddc-web.com BU-64703 C-12/03-0
CLOCK SIGNAL SIGNAL HIGH SIGNAL HIGH
CLOCK EDGE SIGNAL TIMING
FIGURE CLOCK EDGE SIGNAL TIMING
TABLE FIGURE SSRT Mark3 CLOCK EDGE SIGNAL VALID TIMING
DESCRIPTION SIGNAL INPUT setup time prior CLOCK rising edge CLOCK rising edge SIGNAL OUTPUT driven (see Note) CLOCK rising edge SIGNAL OUTPUT driven high (see Note) VALUE @3.3 VOLTS UNITS
Assumes external load. loading above 50pf, validity output signals delayed additional 0.14 ns/pf typ, 0.28ns/pf max.
Data Device Corporation www.ddc-web.com
BU-64703 C-12/03-0
+3.3V INTERFACE MIL-STD-1553
SSRT Mark3 world's first MIL-STD-1553 terminal powered entirely volts. Unique isolation transformer turns ratios, single output winding transformers interconnection methods required order meet mandated MIL-STD1553 differential voltage levels. FIGURE illustrates possible interface methods between SSRT Mark3 series MIL-STD-1553 bus. Connections both direct (short stub, 1:3.75) transformer (long stub, 1:2.7) coupling, well nominal peak-to-peak voltage levels various points (when transmitting), indicated diagram. isolation transformers SSRT Mark3 series contain only output windings. Different isolation transformers required direct transformer coupled, MIL-STD-1553 implementation. center primary winding (the side transformer that connects SSRT Mark3) must directly connected +3.3 volt plane. Additionally 10µf, inductance tantalum capacitor 0.01µf ceramic capacitor must mounted close possible with shortest leads center transformer(s) ground plane.
3.3V 10µF .01µF TX/RX (7.4 Vpp) SSRT Mark3 BU-64703X8/9 TX/RX (1:3.75) DIRECT-COUPLED ISOLATION TRANSFORMER BETA LVB-4103 3.3V SHORT STUB (DIRECT COUPLED)
DATA
10µF .01µF TX/RX (7.4 Vpp)
(1:2.7)
LONG STUB (TRANSFORMER COUPLED)
(1:1.41) 0.75
SSRT Mark3 BU-64703X8/9
TX/RX TRANSFORMER-COUPLED ISOLATION TRANSFORMER BETA LVB-4203 COUPLING TRANSFORMER
0.75
NOTES:
Transformer center capacitors: 10µF tantalum inductance, 0.01µF ceramic. Both must mounted close possible, with shortest leads center transformer(s) ground. Connect SSRT Mark3 hybrid grounds directly possible 3.3V ground plane. Ohms.
FIGURE SSRT Mark3 +3.3V INTERFACE MIL-STD-1553
Data Device Corporation www.ddc-web.com BU-64703 C-12/03-0
+5.0V INTERFACE MIL-STD-1553
FIGURE illustrates interface between SSRT Mark3 +5.0V (BU-64703X3/4) MIL-STD-1553 bus. Connections both direct (short stub) transformer (long stub) coupling, well nominal peak-to-peak voltage levels various points (when transmitting), indicated diagram.
SHORT STUB (DIRECT COUPLED) (1:2.5) TX/RX 11.2 SSRT MARK3 BU-64703X3/4 TX/RX ISOLATION TRANSFORMER
DATA
(1:1.79)
LONG STUB (TRANSFORMER COUPLED)
(1:1.41) 0.75
11.2 SSRT MARK3 BU-64703X3/4 ISOLATION TRANSFORMER
0.75 COUPLING TRANSFORMER
NOTES: OHMS NOMINAL VOLTAGE LEVELS SHOWN
FIGURE 15A. SSRT MARK3 +5.0V INTERFACE MIL-STD-1553
Data Device Corporation www.ddc-web.com BU-64703 C-12/03-0
+3.3V PULSE TRANSFORMERS
selecting isolation transformers used with SSRT Mark3 there limitation maximum amount leakage inductance. this limit exceeded, transmitter rise fall times increase, possibly causing amplitude fall below minimum level required MIL-STD-1553. addition, excessive leakage imbalance result transformer dynamic offset that exceeds 1553 specifications. maximum allowable leakage inductance function coupling method. Transformer Coupled applications, maximum Direct maximum 10.0 measured follows: side transformer that connects SSRT Mark3 defined "primary" winding. side primary shorted primary center-tap, inductance should measured across "secondary" (stub side) winding. This inductance must less than (Transformer Coupled) 10.0 (Direct Coupled). Similarly, other side primary shorted primary center-tap, inductance measured across "secondary" (stub side) winding must also less than (Transformer Coupled) 10.0 (Direct Coupled). difference between these measurements "differential" leakage inductance. This value must less than (Transformer Coupled) (Direct Coupled). Beta Transformer Technology Corporation (BTTC), subsidiary DDC, manufactures transformers variety mechanical configurations with required turns ratios 1:3.75 direct coupled, 1:2.7 transformer coupled. TABLE provides listing many these transformers. further information, contact BTTC 631-244-7393 www.bttc-beta.com.
TABLE BTTC TRANSFORMERS WITH SSRT Mark3 BU-64703X8/9
TRANSFORMER CONFIGURATION Single epoxy transformer, through-hole, transformer coupled, 0.625" 0.630", 0.300" height, +130° Single epoxy transformer, through-hole, direct coupled, 0.625" 0.630", 0.300" height, +130° Single epoxy transformer, surface mount, transformer coupled, 0.625" 0.625", 0.130" height, +85° Single epoxy transformer, surface mount, direct coupled, 0.625" 0.625", 0.130" height, +85° Single epoxy transformer, surface mount, transformer coupled, 0.625" 0.630", 0.300" height, +130° Single epoxy transformer, surface mount, direct coupled, 0.625" 0.630", 0.300" height, +130° (BTTC LEGACY PART NO.) (B-3372) (B-3383) (B-3389) (B-3390) (B-3391) (B-3392) BTTC PART LVB-4203 LVB-4103 LVB-4213 LVB-4113 LVB-4223 LVB-4123
Notes: (Surface Mount) body package size does include leads.
list approved transformers with SSRT Mark3 constantly being updated. Please contact Beta Transformer Technology Corporation latest transformer configuration information.
Data Device Corporation www.ddc-web.com
BU-64703 C-12/03-0
+5.0V PULSE TRANSFORMERS
selecting isolation transformers used with SSRT Mark3 +5.0V (BU-64703X3/4), there limitation maximum amount leakage inductance. this limit exceeded, transmitter rise fall times increase, possibly causing amplitude fall below minimum level required MILSTD-1553. addition, excessive leakage imbalance result transformer dynamic offset that exceeds 1553 specifications. maximum allowable leakage inductance measured follows: side transformer that connects SSRT Mark3 +5.0V (BU-64703X3/4) defined "primary" winding. side primary shorted primary center-tap, inductance should measured across "secondary" (stub
side) winding. This inductance must less than Similarly, other side primary shorted primary center-tap, inductance measured across "secondary" (stub side) winding must also less than difference between these measurements "differential" leakage inductance. This value must less than Beta Transformer Technology Corporation (BTTC), subsidiary DDC, manufactures transformers variety mechanical configurations with required turns ratios 1:2.5 direct coupled, 1:1.79 transformer coupled. TABLE provides listing many these transformers. further information, contact BTTC 631-244-7393 www.bttc-beta.com.
TABLE BTTC TRANSFORMERS WITH SSRT MARK3 +5.0V (BU-64703X3/4)
TRANSFORMER CONFIGURATION Single epoxy transformer, through-hole, 0.625" 0.625", 0.250" height Single epoxy transformer, through-hole, 0.625" 0.625", 0.220" height. used with BU-6XXXXX4 versions SSRT Mark3. Single epoxy transformer, flat pack, 0.625" 0.625", 0.275" height Single epoxy transformer, surface mount, 0.625" 0.625", 0.275" height Single epoxy transformer, surface mount, hi-temp solder, 0.625" 0.625", 0.220" height. used with BU-6XXXXX4 versions SSRT Mark3 Single epoxy transformer, flat pack, 0.625" 0.625", 0.150" height Single epoxy transformer, surface mount, 0.625" 0.625", 0.150" height Single epoxy transformer, through hole, transformer coupled only, 0.500" 0.350", 0.250" height Dual epoxy transformer, twin stacked, 0.625" 0.625", 0.280" height Dual epoxy transformer, twin stacked, surface mount, 0.625" 0.625", 0.280" height Dual epoxy transformer, twin stacked, flat pack, 0.625" 0.625", 0.280" height Dual epoxy transformer, side side, through-hole, 0.930" 0.630", 0.155" height Dual epoxy transformer, side side, flat pack, 0.930" 0.630", 0.155" height Dual epoxy transformer, side side, surface mount, 0.930" 0.630", 0.155" height Dual epoxy transformer, side side, surface mount, 1.410" 0.750", 0.130" height Single metal transformer, hermetically sealed, flat pack, 0.630" 0.630", 0.175" height Single metal transformer, hermetically sealed, surface mount, 0.630" 0.630", 0.175" height RECOMMENDED BTTC PART B-3067 B-3226 B-3818 B-3231 B-3227 B-3819 LPB-5014 LPB-5015 B-3229 TST-9007 TST-9017 TST-9027 TLP-1205 TLP-1105 TLP-1005 DLP-7115 (see note HLP-6014 HLP-6015 DLP-7014 SLP-8007, SLP-8024
Notes: BU-6XXXXX4 versions SSRT Mark3, which include McAir-compatible transceivers, only B-3818 B-3819 transformers (shown bold table) used. BU-6XXXXX3 versions SSRT Mark3 with -1553B transceivers, transformers listed table used. DLP-7115 operates +85°C max. other transformers listed operate +130°C max. list approved transformers with SSRT Mark3 constantly being updated. Please contact Beta Transformer Technology Corporation latest transformer configuration information.
Data Device Corporation www.ddc-web.com
BU-64703 C-12/03-0
1553 CONNECTIONS
isolation transformers should placed physically close possible respective TX/RX pins SSRT Mark3. Also, distance from isolation transformers connectors cables leaving board should short possible. addition limiting voltage drops analog signal traces when transmitting, reducing hybrid-to-transformer transformer-to-connector spacing serves minimize crosstalk from other signals board. general practice connecting stub side transformer direct) coupled terminal external system connector make twisted-pair shielded cable. This minimizes impedance discontinuities. decision whether isolate make connections between center isolation transformer's secondary, stub shield, shield, and/or chassis ground must made system basis, determined analysis EMI/RFI lightning considerations. most systems, specified that 1553 terminal's input impedance must measured system connector. This despite fact that MIL-STD-1553B requirement
ISOLATION TRANSFORMER STUB COUPLING 10µF SSRT Mark3 HYBRID .01µF 3.3V 1.5W TEST/ SIMULATION EQUIPMENT STUB COUPLING
measured looking directly from side isolation transformer. effect relatively long stub cable will reduce measured impedance (looking from bus). order keep impedance above required level 1000 ohms (for transformer-coupled stubs), length cable between 1553 system connector should minimized.
"SIMULATED BUS" (LAB BENCH) INTERCONNECTIONS
purposes software development system integration, generally necessary integrate required couplers, terminators, etc., that comprise complete MIL-STD-1553B bus. most instances, simplified electrical configuration will suffice. three connection methods illustrated FIGURE allow SSRT Mark3 interfaced over "simulated bus" simulation test equipment. important note that termination resistors indicated necessary order ensure reliable communications between SSRT Mark3 simulation/test equipment.
ISOLATION TRANSFORMER DIRECT COUPLING 10µF SSRT Mark3 HYBRID .01µF 3.3V 0.5W DIRECT COUPLING TEST/ SIMULATION EQUIPMENT
ISOLATION TRANSFORMER DIRECT COUPLING 10µF SSRT Mark3 HYBRID 3.3V 0.5W 0.5W 0.5W TEST/ SIMULATION EQUIPMENT STUB COUPLING
.01µF
TRANSFORMER COUPLED TRANSFORMER COUPLED DIRECT COUPLED DIRECT COUPLED DIRECT COUPLED TRANSFORMER COUPLED
FIGURE "SIMULATED BUS" (LAB BENCH) INTERCONNECTIONS (SHOWN +3.3V TRANSCEIVERS)
Data Device Corporation www.ddc-web.com BU-64703 C-12/03-0
SIMPLE SYSTEM INTERFACE
FIGURE illustrates capability SSRT Mark3 interface system with host processor burst mode. this example, only external latches needed buffer data words written SSRT Mark3 external system. burst mode, received data words stored internal FIFO until last word received. this point, SSRT Mark3 will transfer entire contents FIFO system message validated. this case, will driven clock cycles following burst transfer cycle. received message valid, FIFO data will transferred external system will remain high.
3.3V 10µF .01µF
LATCH
D15-D0 DISCRETE DIGITAL OUTPUTS
3.3V 10µF .01µF
Write Address Decoder
LATCH
MEMWR BU-64703 SSRT Mark3 ADDRESS L-BRO, T/R, SA4-0, WC/CWC4-0 Read Address Decoder TRI-STATE BUFFER
RTAD4-0, RTADP
DISCRETE DIGITAL INPUTS TRI-STATE BUFFER TRI-STATE BUFFER
Clock Oscillator
CLK-IN MEMOE +3.3V
+3.3V AUTO_CFG MSTCLR AUTOCONFIGURATION (OPTIONAL)
DTGRT
RTACTIVE DTACK
FIGURE SSRT Mark3-TO-SIMPLE SYSTEM INTERFACE (SHOWN BURST MODE +3.3V TRANSCEIVERS)
Data Device Corporation www.ddc-web.com BU-64703 C-12/03-0
WORD
SSRT Mark3 provides internally formulated Built-In-Test word (BIT word). This word transmitted response Transmit Word Mode Code Command. word functions descriptions provided TABLE
TABLE INTERNAL BUILT-IN-TEST (BIT) WORD DEFINITION
(MSB) FUNCTION TRANSMITTER TIMEOUT LOOP TEST FAILURE LOOP TEST FAILURE DESCRIPTION SSRT Mark3's failsafe timer detected fault condition. transmitter timeout circuit will automatically shut down transmitter transmits longer than 660.5 loopback test performed transmitted portion every non-broadcast message. validity check performed received version every word transmitted SSRT Mark3. addition, bit-by-bit comparison performed last word transmitted each message. either received version last word does match transmitted version and/or received version transmitted word determined invalid (sync, encoding, count, parity), failsafe timeout occurs respective channel, LOOP TEST FAILURE respective channel will set. this set, indicates that subsystem failed respond with handshake input DTGRT asserted within after SSRT Mark3 asserted DTREQ.
HANDSHAKE FAILURE
TRANSMITTER SHUTDOWN either these bits logic "1", this indicates that respective 1553 transmitter been shut TRANSMITTER SHUTDOWN down means Transmitter shutdown mode command. TERMINAL FLAG INHIBITED logic SSRT Mark3's Terminal flag status been disabled Inhibit terminal flag mode code command. Will revert logic Override inhibit terminal flag mode code command received. logic denote that SSRT Mark3 failed off-line protocol self-test. This will logic self-test passed been performed. logic previous message high word count error. logic previous message word count error. set, indicates that SSRT Mark3 detected Command sync received Data Word. Indicates that SSRT Mark3 received more words containing more following error types: sync field error, Manchester encoding error, parity error, and/or count error.
TEST FAIL HIGH WORD COUNT WORD COUNT INCORRECT SYNC TYPE RECEIVED INVALID WORD MANCHESTER/PARITY ERROR RECEIVED
RT-RT TRANSFER RESPONSE This SSRT Mark3 receiving RT-to-RT transfer more ERROR gap, data, sync, following errors occurs: transmitting responds with response time less than address mismatch) MIL-STD-1553B (mid-parity mid-sync); i.e., less than dead time; and/or There incorrect sync type format error (encoding, count, and/or parity error) transmitting Status Word; and/or address field transmitting Status Word does match address transmit Command Word. RT-RT TRANSFER RESPONSE TIMEOUT set, indicates that, previous message, SSRT Mark3 receiving RT-to-RT transfer that transmitting either respond responded later than SSRT Mark3 RT-to-RT timeout time. SSRT Mark3's RT-to-RT response timeout time defined time from mid-bit crossing parity transmit Command Word mid-sync crossing transmitting status word. value SSRT Mark3's RT-to-RT response timeout time range from 17.5 19.5 SSRT Mark3 receiving RT-to-RT transfer, this set, indicates more following error conditions transmit Command Word: logic "0"; subaddress 00000 11111; same Address field receive Command Word.
RT-RT TRANSFER ERROR SECOND COMMAND INVALID ADDRESS COMMAND WORD CONTENTS ERROR
(LSB)
Indicates that received command word defined accordance with MIL-STD-1553B. This includes following undefined Command Words: Command Word non-mode code, broadcast, transmit command; message with "0", subaddress/mode field 00000 11111, mode code field with value between 00000 01111; mode code command that permitted broadcast (e.g., Transmit Status) sent broadcast address 11111.
Note: Bits through cleared only following RESET input receipt Reset Remote Terminal mode command. Bits through updated result every message processed.
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MODE CODES
SSRT Mark3 fully implements dual redundant MIL-STD-1553B mode codes. Four mode codes, Transmit vector word, Synchronize (with data), Selected transmitter shutdown, Override transmitter shutdown, involve data transfers with subsystem. Transmit last command mode command, data word transmitted from SSRT Mark3's last command internal register. Transmit word mode command, SSRT Mark3's internally formulated Word transmitted. TABLE provides summary 1553B mode codes supported SSRT Mark3.
SUMMARY RESPONSES MODE CODE MESSAGES
SSRT Mark3's responses mode codes, including responses various error conditions, summarized TABLE
TABLE MODE CODE SUMMARY
Note:
Selected transmitter shutdown Override transmitter shutdown mode commands, SSRT Mark3 responds with Clear Status action taken.
MODE CODE 00000-01111 00000 00001 00010 00011 00100 00101 00110 00111 01000 01001-01111 10000 10001 10010 10011 10100 10101 10110-11111 10110-11111
FUNCTION Undefined Dynamic Control Synchronize Transmit Status Word Initiate Self Test Transmitter Shutdown Override Transmitter Shutdown Inhibit Terminal Flag Override Inhibit Terminal Flag Reset Remote Terminal RESERVED Transmit Vector Word Synchronize with Data Transmit Last Command Transmit Word Selected Transmitter Shutdown (see Note) Override Selected Transmitter Shutdown (see Note) RESERVED RESERVED
DATA WORD From Subsystem Subsystem From Internal Register From Internal Register Subsystem Subsystem From Subsystem Subsystem
BROADCAST ALLOWED
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DETAILED MODE CODES FUNCTIONAL DESCRIPTION
applicable Mode Codes SSRT Mark3 described below:
DYNAMIC CONTROL 00000) MESSAGE SEQUENCE STATUS SSRT Mark3 responds with Status showing non-acceptance mode code command. ERROR CONDITIONS Invalid Command. response, command ignored. Command Followed Data Word. Status response. Message error (Status Word), High Word Count (BIT Word). Zero. Status response. Message Error (Status Word), Command Word Contents Error (BIT Word). Zero Broadcast Address. Status response. Message Error Broadcast Received bits (Status Word), Command Word Contents Error (BIT Word). Broadcast Address. Status response. Message Error Broadcast Received bits (Status Word), Command Word Contents Error (BIT Word).
SYNCHRONIZE WITHOUT DATA WORD 00001) MESSAGE SEQUENCE SYNC STATUS SSRT Mark3 responds with Status. ERROR CONDITIONS Invalid Command. response, command ignored. Command Followed Data Word. Status response. Message Error (Status Word), High Word Count (BIT Word). Zero. Status response. Message Error (Status Word), Command Word Contents Error (BIT Word). Zero Broadcast Address. Status response. Message Error Broadcast Received bits (Status Word), Command Word Contents Error (BIT Word).
TRANSMIT STATUS WORD 00010) MESSAGE SEQUENCE TRANSMIT STATUS STATUS Status register updated before transmitted contains resulting status from previous command (assuming that Transmit status Transmit last command mode command). ERROR CONDITIONS Invalid Command. response, command ignored. Command Followed Data Word. Status response. Message Error (Status Word) Zero. Status response. Message Error (Status Word), Command Word Contents Error (BIT Word). Zero Broadcast Address. Status response. Message Error Broadcast Received bits (Status Word), Command Word Contents Error (BIT Word). Broadcast Address. Status response. Message Error Broadcast Command Received bits (Status Word), Command Contents Error (BIT Word).
INITIATE SELF-TEST 00011) MESSAGE SEQUENCE SELF TEST STATUS command non-broadcast, SSRT Mark3 responds with Status. command either non-broadcast broadcast, SSRT Mark3 will offline perform internal off-line protocol self-test. self-test exercises SSRT Mark3's encoder decoders, registers, transmitter watchdog timer, protocol logic. This test completed approximately 32,000 clock cycles. That about with clock, MHz, MHz, MHz. While SSRT Mark3 performing off-line self-test, will ignore (and therefore respond messages received from 1553 bus. controller determine result self-test means Transmit word mode command. self-test passes, SSRT Mark3's word (BIT Test Fail) will logic "0"; self-test fails, this will logic "1". addition, self-test fails, terminal flag status word will logic response next non-broadcast message. ERROR CONDITIONS Invalid Command. response, command ignored. Command Followed Data Word. Status response. Message Error (Status Word), High Word Count (BIT Word). Zero. status response. Message Error (Status Word), Command Word Contents Error (BIT Word). Zero Broadcast Address. Status response. Message Error Broadcast Command Received bits (Status word), Command Word Contents Error (BIT Word). Loopback Test Failure. Terminal Flag internal Status register (Status Word next non-broadcast command), Current Channel Loop Test Failure Loop Test Failure (BIT Word), assert RTFAIL output.
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TRANSMITTER SHUTDOWN 00100) MESSAGE SEQUENCE =SHUTDOWN STATUS This command only used with dual redundant systems. SSRT Mark3 responds with Status. Following Status transmission, SSRT Mark3 inhibits further transmission from alternate redundant channel. Once shutdown, transmitter only reactivated Override Transmitter Shutdown Reset mode command, Hardware Reset (MSTRCLR input). Note that receivers both channels always active, even when transmitters inhibited. ERROR CONDITIONS Invalid Command. response, command ignored. Command Followed Data Word. Status response. Message Error (Status Word), High Word Count (BIT Word). Zero. status response. Message Error (Status Word), Command Word Contents Error (BIT Word). Zero Broadcast Address. Status response. Message Error Broadcast Command Received bits (Status word), Command Word Contents Error (BIT Word).
OVERRIDE TRANSMITTER SHUTDOWN 00101) MESSAGE SEQUENCE OVERRIDE SHUTDOWN STATUS This command only used with dual redundant systems. SSRT Mark3 responds with Status. Status transmission, SSRT Mark3 reactivates transmitter alternate redundant bus. command broadcast, Broadcast Command Received Status Word status transmission suppressed. ERROR CONDITIONS Invalid Command. response, command ignored. Command Followed Data Word. Status response. Message Error (Status Word), High Word Count (BIT Word). Zero. status response. Message Error (Status Word), Command Word Contents Error (BIT Word). Zero Broadcast Address. Status response. Message Error Broadcast Command Received bits (Status word), Command Word Contents Error (BIT Word).
INHIBIT TERMINAL FLAG 00110) MESSAGE SEQUENCE INHIBIT TERMINAL FLAG STATUS SSRT Mark3 responds with Status inhibits further setting Terminal Flag internal Status Word register. Once Terminal Flag been inhibited, only reactivated Override Inhibit Terminal Flag Reset mode code commands, Reset. command broadcast, Broadcast Received set, state Terminal Flag internal Status Word register remains unchanged Status transmission suppressed. ERROR CONDITIONS Invalid Command. response, command ignored. Command Followed Data Word. Status response. Message Error (Status Word), High Word Count (BIT Word). Zero. status response. Message Error (Status Word), Command Word Contents Error (BIT Word). Zero Broadcast Address. Status response. Message Error Broadcast Command Received bits (Status word), Command Word Contents Error (BIT Word).
OVERRIDE INHIBIT TERMINAL FLAG 00111) MESSAGE SEQUENCE OVERRIDE INHIBIT TERMINAL FLAG STATUS SSRT Mark3 responds with Status re-enables Terminal Flag internal Status register. command broadcast, Broadcast Command Received status transmission suppressed. ERROR CONDITIONS Invalid Command. response, command ignored. Command Followed Data Word. Status response. Message Error (Status Word), High Word Count (BIT Word). Zero. status response. Message Error (Status Word), Command Word Contents Error (BIT Word). Zero Broadcast Address. Status response. Message Error Broadcast Command Received bits (Status word), Command Word Contents Error (BIT Word).
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RESET REMOTE TERMINAL 01000) MESSAGE SEQUENCE RESET REMOTE TERMINAL STATUS SSRT Mark3 responds with Status internally resets. Message Error Broadcast Command Received bits internal Status register reset internal Word Register reset either 1553 transmitters been shut down, shutdown condition overridden. Terminal Flag been inhibited, inhibit overridden. command received broadcast, Broadcast Command Received Status Word suppressed. Also, command received broadcast Terminal Flag been result Loopback test previous message, Terminal Flag reset zero. ERROR CONDITIONS Invalid Command. response, command ignored. Command Followed Data Word. Status response. Message Error (Status Word), High Word Count (BIT Word). Zero. status response. Message Error (Status Word), Command Word Contents Error (BIT Word). Zero Broadcast Address. Status response. Message Error Broadcast Command Received bits (Status word), Command Word Contents Error (BIT Word).
RESERVED MODE CODES 01001 01111) MESSAGE SEQUENCE RESERVED MODE COMMAND STATUS SSRT Mark3 responds with status. command been illegalized means illegalization table, Message Error Status Word will set. ERROR CONDITIONS Invalid Command. response, command ignored. Command Followed Data Word. Status response. Message Error (Status Word), High Word Count (BIT Word). Zero. status response. Message Error (Status Word), Command Word Contents Error (BIT Word). Zero Broadcast Address. Status response. Message Error Broadcast Command Received bits (Status word), Command Word Contents Error (BIT Word).
TRANSMIT VECTOR WORD 10000) MESSAGE SEQUENCE TRANSMIT VECTOR WORD STATUS VECTOR WORD SSRT Mark3 transmits Status Word followed vector word. vector word read from external subsystem. ERROR CONDITIONS Invalid Command. response, command ignored. Command Followed Data Word. Status response. Message Error (Status Word), High Word Count (BIT Word). Zero. Status response. Message Error (Status Word), Word Count (BIT Word). Zero plus Data Word. SSRT Mark3 will respond with Status Zero Broadcast Address, Data Word. Status response. Message Error Broadcast Command Received bits (Status Word), Word Count (BIT word). Zero Broadcast Address, plus Data Word. Status response. Broadcast Command Received bits (Status Word) Broadcast Address. Status response. Message Error Broadcast Command Received bits (Status Word), Command Word Contents Error (BIT word).
SYNCHRONIZE WITH DATA WORD 10001) MESSAGE SEQUENCE SYNCHRONIZE COMMAND/DATA WORD STATUS SSRT Mark3 will write received data word external subsystem. ERROR CONDITIONS Invalid Command. response, command ignored. Correct Command Followed Data Word. Status response. Message Error (Status Word), Word Count (BIT Word) Command Followed many Data Words. Status response. Message Error (Status Word), High Word Count (BIT word). Command followed Data Word. Status response. Message Error (Status Word), High Word Count (BIT Word). Command followed Data Word. SSRT Mark3 replies with Status plus Data Word. Data Word read from subsystem single-word data block subaddress 0000 1111). Command Broadcast Address. Status response. Message Error Broadcast Command Received bits (Status Word); Command Word Contents Error (BIT word).
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TRANSMIT LAST COMMAND 10010) MESSAGE SEQUENCE TRANSMIT LAST COMMAND STATUS/LAST COMMAND Status register updated before transmission. contains Status from previous command. Data Word transmitted contains previous valid command (providing another TRANSMIT LAST COMMAND TRANSMIT STATUS WORD mode command). ERROR CONDITIONS Invalid Command. response, command ignored. Command Followed Data Word. Status response. Message Error (Status Word), High Word Count Error (Bit Word). Zero, Data Word. Status response. Message Error (Status Word), Word Count (BIT Word). Zero, plus Data Word. SSRT Mark3 will respond with Status. Data Word transferred internal register. Zero Broadcast Address, Data Word. Status response. Message Error Broadcast Received bits (Status Word), Word Count Error(BIT Word). Zero Broadcast Address, Data Word. Status response. Broadcast Received (status word). Data Word transferred internal register. Broadcast Address. Status response. Message Error Broadcast Command Received bits (Status Word), Command Word Contents Error (BIT Word).
TRANSMIT WORD 10011) MESSAGE SEQUENCE TRANSMIT WORD STATUS/BIT WORD SSRT Mark3 responds with Status followed Built-in Test (BIT) word. ERROR CONDITIONS Invalid Command. response, command ignored. Command Followed Data Word. Status response. Message Error (Status Word), High Word Count Error (Bit Word). Zero, Data Word. Status response. Message Error (Status Word), Word Count (BIT Word). Zero, plus Data Word. SSRT Mark3 will respond with Status. Data Word transferred internal registers. Zero Broadcast Address, Data Word. Status response. Message Error Broadcast Received bits (Status Word), Word Count Error (BIT Word). Zero Broadcast Address, Data Word. Status response. Broadcast Received (status word). Data Word transferred internal registers. Broadcast Address. Status response. Message Error Broadcast Command received bits (Status Word), Command Word contents Error (BIT Word).
SELECTED TRANSMITTER SHUTDOWN 10100) MESSAGE SEQUENCE TRANSMITTER SHUTDOWN/DATA STATUS Data Word received transferred subsystem Status transmitted. other action taken SSRT Mark3. transmitters shut down result this mode command. This command intended with with more than dual redundant channel. command broadcast, Broadcast Command Received Status transmission suppressed. ERROR CONDITIONS Invalid Command. response, command ignored. Command Followed Data Word. Status response. Message Error (Status Word), Word Count (BIT Word). status response. Bits Set: message error (SW), High Word Count, Illegal Mode Code (BIT Word) Command Followed many Data Words. Status response. Message Error (Status Word), High Word Count (BIT Word). Command followed Data Word. Status response. Message Error (Status Word), High Word Count (BIT Word). Command followed Data Word. SSRT Mark3 replies with Status plus Data Word. Data Word read from subsystem. Command Broadcast Address. Status response. Message Error Broadcast Command Received bits (Status Word), Command Contents Error (BIT Word).
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OVERRIDE SELECTED TRANSMITTER SHUTDOWN 10101) MESSAGE SEQUENCE TRANSMITTER SHUTDOWN/DATA STATUS Data Word received transferred subsystem. transmitters that have been previously shut down reactivated result this command. other action taken SSRT Mark3. This command intended with with more than dual redundant channel. command broadcast, Broadcast Command Received Status transmission suppressed. ERROR CONDITIONS Invalid Command. response, command ignored. Command Followed Data Word. Status response. Message Error (Status Word), Word Count (BIT Word). Command Followed many Data Words. Status response. Message Error (Status Word), High Word Count (BIT Word). Command followed Data Word. Status response. Message Error (Status Word), High Word Count (BIT Word). Command followed Data Word. SSRT Mark3 replies with Status plus Data Word. Data Word read from subsystem. Command Broadcast Address. Status response. Message Error Broadcast Command Received bits (Status Word), Command Contents Error (BIT Word).
RESERVED MODE CODES 11111) MESSAGE SEQUENCE (when RESERVED MODE CODE STATUS/DATA (when RESERVED MODE CODE DATA STATUS RESERVED receive Command, SSRT Mark3 stores Data Word subsystem. command broadcast, Broadcast Command Received Status transmission suppressed. RESERVED transmit Command Word, SSRT Mark3 responds with Status plus single Data Word. Data Word read from subsystem. ERROR CONDITIONS (T/R Invalid Command. response, command ignored. Command Followed Data Word. Status response. Message Error (Status Word), High Word Count (BIT Word). Broadcast Command. Status response. Message Error (status word), Command Word Contents Error (BIT Word). ERROR CONDITIONS (T/R Invalid Command. response, command ignored. Command followed Contiguous Data Word. Status response. Message Error (Status Word), Word Count (BIT Word). Command followed many Data Words. Status response. Message Error (Status Word), High Word Count (BIT word).
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SIGNAL DESCRIPTIONS FUNCTIONAL GROUPS TABLE BU-64703X8/9 POWER GROUND
SIGNAL NAME +3.3V_Xcvr +3.3V_Logic Gnd_Xcvr Gnd_Logic Logic Ground. Transceiver Ground. Logic power. Transceiver power. DESCRIPTION
TABLE BU-64703X3/4 POWER GROUND
SIGNAL NAME +5.0V_Xcvr +3.3V_Logic Gnd_Xcvr Gnd_Logic Logic Ground. Transceiver Ground. Logic power. Transceiver power. DESCRIPTION
TABLE MIL-STD-1553 ISOLATION TRANSFORMER INTERFACE
SIGNAL NAME TX/RX-A (I/O) TX/RX-A (I/O TX/RX-B (I/O TX/RX-B (I/O Analog transmit/receive input/output signals. Connect directly 1553 isolation transformers. DESCRIPTION
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TABLE DATA (16)
SIGNAL NAME (I/O) (MSB) (I/O) (I/O) (I/O) (I/O) (I/O) (I/O) (I/O) (I/O) (I/O) (I/O) (I/O) (I/O) (I/O) (I/O) (I/O) (LSB) 16-bit bi-directional data bus. When SSRT Mark3 writing data external system, these signals active outputs. other times, these signals high impedance inputs. DESCRIPTION
TABLE COMMAND ADDRESS
SIGNAL L_BRO DESCRIPTION Latched Broadcast. This two-state output signal latched following receipt command word. broadcast command, this signal outputs value logic "1". non-broadcast message, this signal will output logic "0". Transmit/Receive. This two-state output signal latched following receipt command word. transmit message, this signal will output value logic "1". receive message, this signal will output logic "0". Subaddress. These five two-state output signals latched following receipt command word. They provide subaddress field received command word.
CWC4 (MSB) CWC3 CWC2 CWC1 CWC0 (LSB)
Word Count/Mode Code/Current Word Count. Following receipt command word, these five two-state output signals provide contents command word's Word Count/Mode Code field. non-mode code receive message, contents WC/CWC updated incremented reflect value current data word being transferred system non-burst mode), internal FIFO burst mode). increments from value Word Count field during message. non-mode code receive message burst mode, contents will then increment from value word count field each word transferred from internal FIFO external system over D15-D0. burst mode, takes three clock cycles transfer each word external system. non-mode code transmit command, value starts from increments value Word Count each word read from external system transferred SSRT Mark3. mode code command, WC/CWC outputs command word mode code field, which remains latched through message (until receipt subsequent command word).
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TABLE HANDSHAKE TRANSFER CONTROL SIGNALS
SIGNAL DTREQ DTGRT DESCRIPTION Data Transfer Request. Active level output signal used request external system data (D15-D0). Data Transfer Grant. Input from external subsystem that must asserted response SSRT Mark3 asserting DTREQ order enable SSRT Mark3 read data from write data external subsystem. maximum allowable time from DTREQ DTGRT SSRT Mark3's handshake isn't required, DTGRT hardwired logic "0". DTACK Data Transfer Acknowledge. Active output signal used indicate SSRT Mark3's acceptance system data (D15-D0), response data transfer grant (DTGRT). SSRT Mark3's data transfers over D15-D0 will framed time that DTACK asserted low. AUTO_CFG strapped logic "0", there will DTREQ/DTGRT handshake cycle after rising edge MSTCLR, following power turn-on. After DTGRT sampled low, DTACK RTACTIVE will then asserted enable configuration data read from external tri-state buffer. transmit messages, receive messages non-burst mode, receive messages subaddress assuming that Subaddress Autowrap disabled, DTACK will asserted indicate transfer individual words between external system SSRT Mark3. receive messages burst mode assuming valid received message, DTACK will asserted after DTREQto-DTGRT handshake following receipt last received data word. will remain duration burst write transfer from SSRT Mark3 external system. total time burst write transfer three clock cycles times number data words. HS_FAIL MEMOE Handshake Fail. this signal asserted low, this indicates handshake timeout condition. That system respond with DTGRT time, following SSRT Mark3's assertion DTREQ. Memory Output Enable. MEMOE two-state output signal used enable data inputs from external system enabled D15-D0. MEMOE pulses three clock cycles each data word read from external system. SSRT Mark3 latches data clock cycle prior rising edge MEMOE. Memory Write. Active two-state output signal (one clock cycle wide) asserted during SSRT Mark3 write cycles. Used transfer data from SSRT Mark3 external system. external system latch data either falling rising edge MEMWR.
MEMWR
TABLE ADDRESS
SIGNAL RTAD4 (MSB) RTAD3 RTAD2 RTAD1 RTAD0 (LSB) RTADP Remote Terminal Address Parity. This input signal must provide parity with RTAD4-RTAD0 order respond non-broadcast commands. That there must number logic "1"s from among RTAD4-RTAD0 RTADP. Address Latch. RT_AD_LAT connected logic "0", then SSRT Mark3 configured accept hardwired address from RTAD4-RTAD0 RTADP. RT_AD_LAT initially logic "0", then transitions logic "1", values presented RTAD4-RTAD0 RTADP will latched internally SSRT Mark3 rising edge RT_AD_LAT. RT_AD_ERR Remote Terminal Address Error. Output Signal that reflects parity combination RTAD[4:0] inputs RTADP input. high level indicates (correct) parity. level indicates even (incorrect) parity. Note, RT_AD_ERR low, then SSRT Mark3 will recognize valid Command Word received address. Address inputs. DESCRIPTION
RT_AD_LAT
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TABLE STATUS WORD INPUTS
SIGNAL ILLEGAL DESCRIPTION Illegal. Input SSRT Mark3 that sampled after Command Word transfer. logic will cause Message Error status response (logic "1"), while logic this input will have effect Message Error bit. Service Request. When this input logic "0", Service request SSRT Mark3's status word will logic "1". When this input logic "1", Service request SSRT Mark3's status word will logic "0". Subsystem Flag. this input asserted low, Subsystem Flag will SSRT Mark3's Status Word. Busy. this input asserted low, Busy will logic SSRT Mark3's Status Word. Busy status word logic "1", SSRT Mark3 will transmit data words, except Transmit last command Transmit word mode command. receive command, SSRT Mark3 Busy, will still transfer data words external system (although these transfers blocked means external logic).
SRV_RQST SSFLAG BUSY
TABLE ACTIVITY MESSAGE STATUS INDICATORS
SIGNAL RTACTIVE DESCRIPTION Active. This signal will (logic "0") following power turn-on, when SSRT Mark3 reading Auto-configure word performing internal self-test. After self-test passes, Auto-configure option used, Auto-configure used Auto-configure word logic (meaning always online), RTACTIVE will then transition logic "1". When this occurs, SSRT Mark3 will begin processing messages over 1553 bus. Auto-configure enabled, Auto-configure word logic self-test fails, then RTACTIVE will remain logic "0". this case, SSRT Mark3 will remain offline process 1553 messages. failed self test will cause RTFAIL_L asserted (logic "0"). auto-configure option used, external system should enable configuration bits D5-D0 when RTACTIVE DTACK both outputting logic "0". INCMD In-command. This two-state output asserted whenever message being processed SSRT Mark3. Good Block Received. level two-state output pulse clock cycles wide) that used indicate external system that valid, legal, non-mode receive command with correct number valid data words been received transferred external system. non-burst mode, this pulse will occur after last data word transferred. Assuming DTREQ-to-DTGRT time this will approximately following mid-parity crossing last received data word. burst mode, pulse will begin synchronous with rising edge DTACK burst write transfer.
MSG_ERR
Message Error. Active level two-state output signal used flag external system that there message error 1553 communication (word, gap, word count error) particular message. This output goes upon detecting error reset following receipt next valid command word from 1553 bus, MSTCLR asserted low. this output goes low, further servicing current message aborted. Remote Terminal Fail. This two-state output signal will asserted following failure built-in self-test performed following power turn-on result receipt Initiate self-test mode command. built-in off-line self-test includes tests Manchester encoder decoders, transmitter failsafe timer, protocol logic. addition, RTFAIL will asserted following failure on-line loop test non-broadcast message. online loop test verifies validity received version transmitted words (sync, Manchester encoding, count, parity), includes bit-by-bit comparison verification last transmitted word. asserted logic "0", RTFAIL will clear logic when SSRT Mark3 begins transmission status word response subsequent valid non-broadcast message.
RTFAIL
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TABLE CONTROL INPUTS
SIGNAL MSTCLR AUTO_CFG DESCRIPTION Master Clear. Negative true Reset input, asserted following power turn-on. When coming "reset" condition, note that risetime MSTCLR must less than Auto-configure input. connected logic "1", then auto-configure option disabled, configuration parameters revert their default values listed TABLE Note that default condition each configuration parameter enabled (for MIL-STD-1553A/B protocol selection, -1553B default). AUTO_CFG connected logic "0", then configuration parameters transferred over D5-D0 during read data transfer, when RTACTIVE DTACK logic "0", following MSTCLR transitioning from logic logic "1". Each configuration parameters enabled SSRT Mark3 reads value logic respective data bit.
BRO_ENA
Broadcast Enable. this input logic "1", SSRT Mark3 will recognize address broadcast address. this input logic "0", SSRT Mark3 will recognize address broadcast address; however, this configuration, address used standard address. Transmitter inhibit input MIL-STD-1553 transmitters. normal operation, this input should connected logic "0". force shutdown Channel Channel transmitters, value logic should applied this input.
TX_INH
TABLE CLOCK INPUT
SIGNAL CLK_IN CLK_SEL_1 DESCRIPTION Clock Input. clock frequency must designated means CLK_SEL_1 CLK_SEL_0 inputs. These inputs used designate SSRT Mark3's clock frequency, follows: CLK_SEL_1 CLK_SEL_0 CLK_SEL_0 Clock Frequency
TABLE FACTORY TEST USER CONNECTIONS)
SIGNAL DESCRIPTION factory test only. connect normal operation.
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FUNCTIONS TABLE BU-64703X8/9 "GULL WING" FLAT PACKAGE FUNCTIONS
FUNCTION L_BRO TX/RX_A TX/RX_A RT_AD_ERR +3.3 V_XCVR GROUND_LOGIC TX/RX_B TX/RX_B MEMOE FUNCTION GROUND_XCVR RTAD2 MSTCLR CLOCK_IN MEMWR DTREQ +3.3V_LOGIC GROUND_LOGIC INCMD MSG_ERR DTACK RT_AD_LAT SSFLAG RTAD0 RTAD3 RTAD4 FUNCTION RTADP RTAD1 GROUND_LOGIC +3.3V_LOGIC FUNCTION BUSY RTACTIVE HS_FAIL RT_FAIL TX_INH SRV_RQST ILLEGAL +3.3V_LOGIC GROUND_LOGIC BRO_ENA DTGRT CLK_SEL_1 AUTO_CFG GROUND_LOGIC GROUND_XCVR CLK_SEL_0
TABLE 18A. BU-64703X3/4 "GULL WING" FLAT PACKAGE FUNCTIONS
FUNCTION L_BRO TX/RX_A TX/RX_A RT_AD_ERR +5.0 V_XCVR GROUND_LOGIC TX/RX_B TX/RX_B MEMOE FUNCTION GROUND_XCVR RTAD2 MSTCLR CLOCK_IN MEMWR DTREQ +3.3V_LOGIC GROUND_LOGIC INCMD MSG_ERR DTACK RT_AD_LAT SSFLAG RTAD0 RTAD3 RTAD4 FUNCTION RTADP RTAD1 GROUND_LOGIC +3.3V_LOGIC FUNCTION BUSY RTACTIVE HS_FAIL RT_FAIL TX_INH SRV_RQST ILLEGAL +3.3V_LOGIC GROUND_LOGIC BRO_ENA DTGRT CLK_SEL_1 AUTO_CFG GROUND_LOGIC GROUND_XCVR CLK_SEL_0
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TABLE BU-64703E8 SSRT-MARK3 (+3.3V) TRANSFORMER EVALUATION BOARD PINOUTS MADE FROM 80-PIN, SSRT MARK3 BU-64703G8
80-PIN DEVICE 22,31,50,70,79 22,31,50,70,79 22,31,50,70,79 30,51,69 30,51,69 SSRT MARK3 FUNCTION RT_AD_ERR WC/MC/CWC0 WC/MC/CWC3 WC/MC/CWC2 CLK_SEL_0 GND_LOGIC WC/MC/CWC4 AUTO_CFG CLK_SEL_1 BRO_ENA DTGRT +3.3V_Logic +3.3V_Logic ILLEGAL SRV_RQST RTFAIL TX_INH RTACTIVE HS_FAIL BUSY 80-PIN DEVICE 22,31,50,70,79 22,31,50,70,79 22,31,50,70,79 22,31,50,70,79 SSRT MARK3 FUNCTION STUB_TX/RX_B STUB_TX/RX_B STUB_TX/RX_B STUB_TX/RX_B +3.3V_XFMR_CT +3.3V_XFMR_CT +3.3V_XCVR +3.3V_XCVR STUB_TX/RX_A STUB_TX/RX_A STUB_TX/RX_A STUB_TX/RX_A
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TABLE 19A. BU-64703E8 SSRT-MARK3 (+3.3V) TRANSFORMER EVALUATION BOARD PINOUTS MADE FROM 80-PIN, SSRT MARK3 BU-64703G8 (CONT.)
80-PIN DEVICE 22,31,50,70,79 30,51,69 30,51,69 22,31,50,70,79 22,31,50,70,79 22,31,50,70,79 22,31,50,70,79 22,31,50,70,79 30,51,69 30,51,69 SSRT MARK3 FUNCTION GND_LOGIC MEMOE +3.3V_LOGIC +3.3V_LOGIC GND_LOGIC RTAD2 MSTCLR CLOCK_IN MEMWR DTREQ +3.3V_LOGIC +3.3V_LOGIC INCMD WC/MC/CWC1 MSG_ERR DTACK RT_AD_LAT SSFLAG RTAD0 RTAD3 RTAD4 80-PIN DEVICE 22,31,50,70,79 22,31,50,70,79 30,51,69 30,51,69 SSRT MARK3 FUNCTION RTAD1 RTADP +3.3V_LOGIC +3.3V_LOGIC
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2.36 (59.94) REF. 1.88 (47.75)
±0.02
0.890 (22.606) MAX.
0.060 (1.524)
0.015 (0.381) TYP.
VIEW
EQUAL 0.040 (1.016) 0.760 (19.304) (TOL. NON-CUM.)
NUMBERS REFERENCE ONLY
0.200 (5.08)
0.500 (12.7)
0.008 (0.2032)
±0.002
DENOTED INDEX MARK
0.025 (0.635)
0.130 (3.302) MAX.
0.910 (23.114) MAX.
0.050 (1.27)
SIDE VIEW
Notes: Dimensions inches (mm). Tolerances ±0.005 inches unless otherwise specified.
FIGURE BU-64703FX FLAT PACKAGE MECHANICAL OUTLINE
Data Device Corporation www.ddc-web.com
BU-64703 C-12/03-0
0.880 (22.35)
0.060 (1.524)
0.015 (0.381) TYP.
VIEW
EQUAL 0.040 (1.016) 0.760 (19.304) (TOL. NON-CUM.)
DENOTED INDEX MARK
NUMBERS REFERENCE ONLY
0.130 (3.302) MAX.
DENOTED INDEX MARK
0.010 (0.254) MAX. 0.006 (0.152)
+0.010 (+0.254) 0.004 0.102)
0.004 (0.102)
0.060 (1.524) MAX. 1.110 (28.194)
0.015
SIDE VIEW
Notes: Dimensions inches (mm). Tolerances ±0.005 inches unless otherwise specified.
FIGURE BU-64703GX GULL WING PACKAGE MECHANICAL OUTLINE
Data Device Corporation www.ddc-web.com
BU-64703 C-12/03-0
ORDERING INFORMATION
BU-64703XX-XXXX Supplemental Process Requirements:
Pre-Cap Source Inspection 100% Pull Test 100% Pull Test Pre-Cap Source Inspection Date Code Date Code PreCap Source Inspection Date Code 100% Pull Test Date Code, PreCap Source Inspection 100% Pull Test Blank None Above
Test Criteria:
Standard Testing MIL-STD-1760 Amplitude Compliant (Not available with Voltage/Transceiver Option
Process Requirements:
Standard practices, Burn-In (See Standard Processing Table) MIL-PRF-38534 Compliant MIL-PRF-38534 Compliant with PIND Testing MIL-PRF-38534 Compliant with Solder MIL-PRF-38534 Compliant with PIND Testing Solder with PIND Testing with Solder with PIND Testing Solder Standard Processing with Solder Dip, Burn-In
Temperature Range**/Data Requirements:
-55°C +125°C -40°C +85°C +70°C -55°C +125°C with Variables Test Data -40°C +85°C with Variables Test Data Custom Part (Reserved) Custom Part (Reserved) +70°C with Variables Test Data
Voltage/Transceiver Option:
+5.0 Volts rise/fall times (-1553B) +5.0 Volts rise/fall times (-1553B McAir Compatible)(Not available with test criteria option MIL-STD-1760 Amplitude Compliant) +3.3 Volts rise/fall times (-1553B) +3.3 Volts rise/fall times (-1553B McAir compatible) (Not available with Test Criteria Option MIL-STD-1760 Amplitude Compliant)
Package Type:
Flat Pack "Gull Wing" (Formed Lead) Package (Consult factory)
Logic Voltage
Volt (+5.0V Tolerant I/O)
Product Type:
BU-6470 only with simple (non-processor) interface
BU-64703E8-300 (Ordering information SSRT-Mark3 (+3.3V) Transceiver Evaluation Board)
Evaluation board intended support customers interested electrically connecting evaluating performance +3.3V SSRT Mark3 *Standard Processing with burn-in full temperature test-see STANDARD PROCESSING TABLE. Temperature range refers "Case Temperature".
STANDARD PROCESSING HYBRID MONOLITHIC HERMETIC PRODUCTS
TEST INSPECTION SEAL TEMPERATURE CYCLE CONSTANT ACCELERATION BURN-IN MIL-STD-883 METHOD(S) 2009, 2010, 2017, 2032 1014 1010 2001 1015, 1030* CONDITION(S) 3000g TABLE When applicable
Data Device Corporation www.ddc-web.com
BU-64703 C-12/03-0
information this data sheet believed accurate; however, responsibility assumed Data Device Corporation use, license rights granted implication otherwise connection therewith. Specifications subject change without notice. Please visit site www.ddc-web.com latest information.
Wilbur Place, Bohemia, York, U.S.A. 11716-2482 Technical Support 1-800-DDC-5757 ext. 7771 Headquarters, N.Y., U.S.A. Tel: (631) 567-5600, Fax: (631) 567-7358 Southeast, U.S.A. Tel: (703) 450-7900, Fax: (703) 450-6610 West Coast, U.S.A. Tel: (714) 895-9777, Fax: (714) 895-4988 United Kingdom Tel: +44-(0)1635-811140, Fax: +44-(0)1635-32264 Ireland Tel: +353-21-341065, Fax: +353-21-341568 France Tel: +33-(0)1-41-16-3424, Fax: +33-(0)1-41-16-3425 Germany Tel: +49-(0)8141-349-087, Fax: +49-(0)8141-349-089 Japan Tel: +81-(0)3-3814-7688, Fax: +81-(0)3-3814-7689 World Wide http://www.ddc-web.com
ERED
DATA DEVICE CORPORATION REGISTERED 9001 FILE A5976
C-12/03-0
PRINTED U.S.A.

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