REVOLUTION Steve Bailey, Solutions Manager, VeriBest Inc., sbaile

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TECHNOLOGY SOFTWARE
REVOLUTION
Steve Bailey, Solutions Manager, VeriBest Inc., sbailey@veribest.com
FPGA Technology Drives Design Software
looking changing FPGAs over time, understand demands generation FPGA design software.
last years, Xilinx FPGA industry have evolved from providing FPGAs with densities 100s gates devices with over million system gates. only have system designs been adapted exploit capabilities today's FPGAs contexts possible years ago, designers have found need adopt design methods design software solutions that exist years ago.
Soaring FPGA Device Complexity
FPGAs further consolidate integrate system logic into fewer fewer components. FPGAs provide with unprecedented flexibility attractive costs. advantage non-recurring engineering (NRE) costs, easy design modification, in-system re-programmability make FPGAs very attractive alternatives ASICs. fact, Collett1 reports that number boards with least ASIC declined from since 1994. Clearly, FPGAs replacing more ASICs with each technology update. FPGA design complexity increases more ASICs replaced FPGAs, more more FPGA design performed traditional chip design teams board engineer.
FPGA Design Methodology Then
When board engineer using FPGAs primarily integrate consolidate 100s gates board-level logic, used time-tested board design methodology anchored schematic capture shown Figure easy straight forward insert level hierarchy into schematic FPGA push portion board schematic, that being consolidated into FPGA, down into hierarchical block. engineer already done
Figure
FPGA Usage Then
Fifteen years ago, FPGAs were designed into systems primarily reduce system component costs consolidating boardlevel logic into fewer devices. hundred logic gates were replaced single FPGA that implemented same functionality. Because role FPGA consolidation board-level logic into fewer components, FPGAs were designed board engineer. complexity today's FPGAs, shown Figure allows system architects replace broad range ASICs with
Simple Design Method Simple Devices
Figure
Complexity Drives Adoption HDLBased Design
functionality after layout. Simulation allows design problems discovered earlier when more cost-effective them. Schematics block diagrams still have role FPGA design, that role limited manual implementation tightly constrained functional blocks help manage complexity graphically partitioning design into smaller blocks.
FPGA Design Software Then
that FPGA design transitioning from board engineer chip engineering design team, design methodology transitioning from schematic HDL, FPGA design software must evolve meet needs. Today's FPGA designers require power ASIC design tools within traditionally, tightly integrated FPGA design environment. Fast, high-capacity simulation gives ability functionally verify FPGA designs Register Transfer Level verify dynamic timing functionality after implementation. size functional complexity today's FPGA designs require powerful simulators capable handling traditional needs ASIC designers. VeriBest'sHDL simulation products, shown Figure deliver technology-leading simulation speed capacity, well powerful debugging capabilities, easily handling largest today's FPGA designs with fast verification design debugging turnaround times. Similarly, synthesis tools deliver productivity power translating design from abstracted architecturally optimized implementation. Synthesis tools must able handle same language subset their ASIC counterparts facilitate re-targeting designs from ASICs FPGAs. They must also provide ASIC-type quality results variety FPGA architectures. VeriBest's FPGA Desktopis available with FPGA Expressfrom industry's leading ASIC synthesis provider, Synopsys®. FPGA Desktop also fully supports integration with Synplicity's® Synplifyfor Xilinx designers find that Synplify better meets their needs. While FPGA design moves towards HDL-dominated methodology, mixed schematic designs will common some time. Also, editors always best capture certain functional blocks. State diagrams commonly employed capture state machines. Similarly, many designers find flowcharts, truth tables, state tables more natural means capture certain types functionality. Finally, graphical design specification often results design blocks that more easily reused. Therefore, neither schematic-only HDL-only design capture environments sufficient support today's FPGA designs. That''s VeriBest's FPGA Desktop, shown Figure provides rich design capture editors including
Continued following page
Figure
manual logic minimization captured design boolean logic macrocell level. only additional tool needed fitter FPGA place route tool) logic design into FPGA with correct routing. fitter then generated chip programming file. Verification often consisted prototyping. Fifteen years later, thought designing million-gate FPGA using schematic design methodology defies rational thought. Today's FPGA designers adopting HDL-based design methods astonishing rates. HDL-based design, shown Figure increases your productivity allowing work higher levels abstraction register-transfer level instead boolean logic (gate) level. Central HDL-based design increased size FPGAs strategically important tools: simulation design verification synthesis automatic implementation design gate-level (FPGA place route level). Bread-board prototyping falls apart practical design verification method cost debugging
Powerful, Fast Simulation Speeds Design Verification
Figure
TECHNOLOGY SOFTWARE
REVOLUTION
Graphical Entry FPGA Desktop
engineering specifics executing each step design flow such constraining synthesis specifying block functionality. Consistent with need powerful design solution, FPGA Desktop passively manages design flow facilitating transitions between steps flow. does constrain actively managing your activity within proscribed flow. explicitly enable teams designers, FPGA Desktop allows definition multiple configurations partitioning designs across multiple designers. also identify block hierarchy your design root focal point each design step such simulation synthesis. Figure shows creation design configuration with focus portion design starting with block A_B_Compare.
Figure
schematic/block, editor, state diagram, truth tables state tables, flowcharts, boolean equations. Although today's FPGAs need powerful design software, still require productivity traditional FPGA design software solutions, need them extended teams designers; FPGAs still give time-to-market advantages. Powerful point tools address dimension your productivity your ability meet project market schedules. Tool integration, design data, flow management address remaining dimensions. tools within FPGA Desktop environment tightly integrated including third-party tools such FPGA Express, Synplify, Xilinx Foundation Series place route software. Design kits support each Xilinx device family providing additional productivity benefits. Tight integration provides with single environment learn master. Design data flow management catalysts productivity benefits integrated FPGA Desktop environment. FPGA Desktop only understands tools integrated flow, also manages design data you, whether working alone part team. Data management both user explicit, with automated management design block hierarchy source files, user implicit. FPGA Desktop implicitly manages design data flow preparing each step design flow, such creating synthesis tool's project, configuring synthesis, passing synthesized netlist Xilinx Foundation Series software place route. automating routine data management tasks, free focus
Conclusion
Xilinx continues lead industry helped create years driving FPGA device size capability forward, FPGA (and ASIC) designers evolving fully exploit generation FPGA devices replacing more ASICs with FPGAs. FPGAs replace ASICs, FPGA design moving from board engineers into chip design teams. Both experienced FPGA designers find that adopting design methods helps them meet their tight timeto-market requirements while designing ever larger more complex FPGAs. combination these FPGA technology design trends increase need FPGA design solutions that provide tools powerful enough handle ASIC designs while also delivering productivity integrated FPGA design flow. VeriBest's FPGA Desktop delivers power productivity that today's tomorrow's teams require, designing with Xilinx devices.
Configuring Designs Managing Hierarchy
Figure
"ASICs What Was," Ronald Collett, Design Technology ROI, Times, February 1999, page

REVOLUTION Steve Bailey, Solutions Manager, VeriBest Inc., sbaile

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