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Product Description Description XC4000 family Field-Programmable
Top Searches for this datasheetXC4000 High-Reliability Logic Cell Array Family Product Description Description XC4000 family Field-Programmable Gate Arrays (FPGAs) provides benefits custom CMOS VLSI, while avoiding initial cost, time delay, inherent risk conventional masked gate array. XC4000 families provide regular, flexible, programmable architecture Configurable Logic Blocks (CLBs), interconnected powerful hierarchy versatile routing resources surrounded perimeter programmable Input/Output Blocks (IOBs). XC4000-family devices have generous routing resources accommodate most complex interconnect patterns. XC4000A devices have reduced sets routing resources, sufficient their smaller size. devices customized loading configuration data into internal memory cells. FPGA either actively read configuration data external serial byte-parallel PROM (master modes), configuration data written into FPGA (slave peripheral modes). XC4000 family supported powerful sophisticated software, covering every aspect design: from schematic entry, simulation, automatic block placement routing interconnects, finally creation configuration stream. Since Xilinx FPGAs re-programmed unlimited number times, they used innovative designs where hardware changed dynamically, where hardware must adapted different user applications. March 1997 (version 1.0) Features Available Class fully compliant military temperature range only versions MIL-STD-883 Class processing complies with paragraph 1.2.1 Third Generation Field-Programmable Gate Array Abundant flip-flops Flexible function generators On-chip ultra-fast Dedicated high-speed carry propagation circuit Wide edge decoders Hierarchy interconnect lines Internal 3-state capability Eight global low-skew clock signal distribution network Flexible Array Architecture Programmable logic blocks blocks Programmable interconnects wide decoders Sub-micron CMOS Process High-speed logic Interconnect power consumption Systems-Oriented Features IEEE 1149.1-compatible boundary scan logic support Programmable output slew rate modes) Programmable input pull-up pull-down resistors 4-mA sink current output XC4003A) 8-mA sink current output pair XC4003A) Configured Loading Binary File Unlimited re-programmability programming modes XACT® Development System runs `386/486'-type Apollo, Sun-4, Sparc HP700 Interfaces popular design environments like FutureNet, Viewlogic, Mentor Graphics OrCAD Fully automatic partitioning, placement routing Interactive design editor design optimization macros, hard macros, RAM/ROM compiler Table XC4000 High-Reliability Family Field-Programmable Gate Arrays Device Appr. Gate Count: Matrix: Number CLBs: Number Flip-Flops: Bits: Number IOBs: XC4003A 3,000 3,200 XC4005 5,000 6,272 XC4010 10,000 1,120 12,800 XC4013 13,000 1,536 18,432 1997 Xilinx Inc. latest revision specifications, Xilinx WEBLINX http://www.xilinx.com XC4000 High-Reliability Logic Cell Array Family XC4000 Family Configuration Assignments CONFIGURATION MODE: <M2:M1:M0> SLAVE <1:1:1> MASTER-SER <0:0:0> SYN.PERIPH <0:1:1> ASYN.PERIPH <1:0:1> MASTER-HIGH <1:1:0> (HIGH) (LOW) (HIGH) (HIGH) (LOW) INIT-ERROR DONE PROGRAM DATA DATA DATA DATA DATA DATA DATA RCLK DATA DOUT CCLK(O) MASTER-LOW <1:0:0> (LOW) (LOW) (HIGH) (HIGH) (LOW) INIT-ERROR DONE PROGRAM DATA DATA DATA USER OPERATION PGI-I/O TDI-I/O TCK-I/O TMS-I/O SGI-I/O PGI-I/O SGI-I/O DONE PROGRAM PGI-I/O SGI-I/O CCLK TDO-(O) PGI-I/O SGI-I/O OTHERS (HIGH) (HIGH) (HIGH) (HIGH) (LOW) INIT-ERROR DONE PROGRAM (LOW) (LOW) (LOW) (HIGH) (LOW) INIT-ERROR DONE PROGRAM (HIGH) (HIGH) (LOW) (HIGH) (LOW) INIT-ERROR DONE PROGRAM DATA DATA DATA DATA DATA DATA DATA RDY/BUSY DATA DOUT CCLK (LOW) (HIGH) (HIGH) (HIGH) (LOW) INIT-ERROR DONE PROGRAM DATA DATA DATA DATA DATA DATA DATA RDY/BUSY DATA DOUT CCLK DATA DATA DATA RCLK DATA DOUT CCLK DOUT CCLK DOUT CCLK Represents pull-up before during configuration INIT open-drain output during configuration Represents input X5265 XC4003A Pinouts Description (A8) (A9) (A10) (A11) (A12) (A13) (A14) PGCK1 (A15, I/O) PGCK1 (A16, I/O) (A17) (TDI) (TCK) (TMS) SGCK2 (I/O) (M1) (M0) (M2) PGCK2 (I/O) (HDC) (LDC) (ERR, INIT) Bound Scan B10* B13* E11* Description SGCK3 (I/O) DONE PROG (D7) PGCK3 (I/O) Bound Scan K12* J11* N12* (D6) (D5) (CS0) (D4) (D3) (RS) (D2) (D1) (RCLK-BUSY/RDY) (D0, DIN) SGCK4 (DOUT, I/O) CCLK (TDO) (A0, PGCK4 (A1, I/O) (CS1, (A3) (A4) (A5) (A6) (A7) Indicates unconnected package pins Contributes only (.i) boundary scan register Boundary Scan TDO.T Boundary Scan TDO.O Boundary Scan BSCANT.UPD XC4000 High-Reliability Logic Cell Array Family Package Outline 0.100 0.690 0.008 0.070 (120 Places) Stand-Off Places) 0.040 0.010 Chamfer Side Chamfer 0.030 0.010 Places) View Gold Plate (Top Side) 1.360 0.014 1.200 0.012 Edge Chamfer 0.010 Bottom View 0.050 0.091 0.009 30°C/W 4.4°C/W Mass 11.50 Grams Dimensions Inches 0.008 Places) 0.025 0.050 0.018 0.002 Plated Kovar Side View 0.130 0.010 0.005R X5323 120-Pin Ceramic (PG120) Package Outline View (Ceramic Body) 0.020 Places) 1.290 0.020 Ceramic Tie-Bar Places) Lead Pitch 0.025 100X 0.008 0.002 0.090 0.009 0.043 (Deep 0.0175 Ref) 32°C/W 2.8°C/W Mass 10.80 Grams 0.115 Ceramic Edge 0.020 100X 0.020 (Ceramic Edge) 0.035 0.005 Lead Thickness 0.006 0.002 0.600 0.008 0.750 0.010 Bottom View (Lid View) X7140 100-Pin Ceramic (CB100) 2.580 2.300 1.500 0.020 XC4000 High-Reliability Logic Cell Array Family XC4005 Pinouts Description (A8) (A9) (A10) (A11) (A12) (A13) (A14) SGCK1(A15, I/O) PGCK1 (A16, I/O) (A17) (TDI) (TCK) (TMS) 6Bound 155* 156* 159* A12* Description SGCK2 (I/O) (M1) (M0) (M2) PGCK2 (I/O) (HDC) (LDC) (ERR,INIT) SGCK3 (I/O) DONE PROG (D7) PGCK3 (I/O) (D6) 6Bound E15* D16* N16* M15* Description 6Bound R12* T12* (D5) (CS0) (D4) (D3) (RS) (D2) 114* (D1) (RCLK-BUSY/RDY) 118* (D0, DIN) SGCK4 (DOUT, I/O) CCLK (TDO) (A0, PGCK4 (A1, I/O)127 129* (CS1, (A3) 133* 134* (A4) (A5) (A6) (A7) Indicates unconnected package pins Contributes only (.i) boundary scan register Boundary Scan TDO.T Boundary Scan TDO.O Boundary Scan BSCANT.UPD Package Outline Stand-Off Places) 0.040 0.010 0.100 Bottom View Dielectric Coat Index (A1) Edge Chamfer 0.010 Edges) 0.070 0.005 0.795 0.009 1.660 0.016 1.500 View 22°C/W 4°C/W Kovar Gold Plated 0.018 0.002 0.050 0.050 0.086 0.009 Mass 17.10 Grams Dimensions Inches X5325 156-Pin Ceramic (PG156) XC4000 High-Reliability Logic Cell Array Family Package Outline View (Ceramic Body) 0.020 0.040 Places) 1.290 0.020 1.500 0.020 1.130 0.010 Ceramic Tie-Bar Places) Lead Pitch 160X 0.025 0.002 164X 0.007 0.001 0.115 Ceramic Edge 0.043 (Deep 0.0175 Ref) 24°C/W 1.8°C/W Mass 11.50 Grams 0.086 ±0.008 0.020 164X 0.021 (Ceramic Edge) 0.035 0.005 Lead Thickness 0.002 0.006 0.001 Bottom View (Lid View) 24°C/W X5326 164-Pin Ceramic (CB164) 0.795 0.008 2.500 0.030 2.300 XC4010 Pinouts Description (A8) (A9) (A10) (A11) (A12) (A13) (A14) SGCK1 (A15, I/O) PGCK1 (A16, I/O) (A17) (TDI) (TCK) (TMS) Bound Scan 192* Description SGCK2 (I/O) PGCK2 (I/O) (HDC) (LDC) (ERR, INIT) Bound Scan Indicates unconnected package pins Contributes only (.i) boundary scan register XC4000 High-Reliability Logic Cell Array Family XC4010 Pinouts (continued) Description SGCK3 (I/O) DONE PROG (D7) PGCK3 (I/O) (D6) (D5) (CSO) (D4) Bound Scan 103* Description (D3) (RS) (D2) (D1) (RCLK-BUSY/RDY) (D0, DIN) SGCK4 (DOUT, I/O) CCLK (A0, PGCK4 (I/O, (CS1, (A3) (A4) (A5) (A6) (A7) Bound Scan 152* Indicates unconnected package pins Boundary Scan TDO.T Boundary Scan TDO.O Boundary Scan BSCANT.UPD Package Outline 0.100 0.070 (191 Places) Stand-Off Places) 0.050 Side Dielectric Coat Bottom View 0.050 0.010 Chamfer 0.030 0.010 Places) Edge Chamfer 0.010 1.860 0.019 1.700 0.890 View Gold Plate Index Side 0.090 0.010 18°C/W 1.8°C/W Mass 21.80 Grams Dimensions Inches 0.008 Places) 0.050 0.025 0.018 0.002 Plated Kovar Side View 0.005 0.130 0.010 X5329 191-Pin Ceramic (PG191) XC4000 High-Reliability Logic Cell Array Family Package Outline View (Ceramic Body) 0.020 1.510 0.020 1.720 0.020 1.350 0.014 0.040 Places) Lead Pitch 192X 0.025 196X 0.008 0.002 0.043 (Deep 0.0175 Ref) 20°C/W 1.6°C/W Mass 15.30 Grams 0.115 Ceramic Edge 0.090 ±0.009 0.020 0.021 (Ceramic Edge) 0.035 0.005 Lead Thickness 0.002 0.006 0.001 0.890 Bottom View (Lid View) 196-Pin Ceramic (CB196) 2.500 X5869 2.300 XC4013 Pinouts Description (A8) (A9) (A10) (A11) (A12) (A13) (A14) SGCK1 (A15, I/O) PGCK1 (A16, I/O) (A17) (TDI) (TCK) (TMS) PG223 CB228 P201 P202 P203 P204 P205 P206 P207 P208 P209 P210 P211 P212 P213 P214 P215 P216 P217 P218 P219 P220 P221 P222 P223 P224 P225 P226 P227 P228 Bound Scan Description I/.O SGCK2 (I/O) PGCK2 (I/O) (HDC) (LDC) (ERR,INT) PG223 CB228 Bound Scan XC4000 High-Reliability Logic Cell Array Family XC4013 Pinouts (continued) Description SGCK3 (I/O) DONE PROG (D7) PGCK3 (I/O) (D6) (D5) (CS0) (D4) PG223 CB228 P100 P101 P102 P103 P104 P105 P106 P107 P108 P109 P110 P111 P112 P113 P114 P115 P116 P117 P118 P119 P120 P121 P122 P123 P124 P125 P126 P127 P128 P129 P130 P131 P132 P133 P134 P135 P136 P137 P138 P139 P140 P141 P142 Bound Scan DescriptionPG223 (D3) (/RS) (D2) (D1) (RCLK, BUSY/RDY) (D0, DIN) SGCK4 (DOUT, I/O) CCLK (A0, PGCK4 (I/O, (CS1, (A3) (A4) (A5) (A6) (A7) CB228 P143 P144 P145 P146 P147 P148 P149 P150 P151 P152 P153 P154 P155 P156 P157 P158 P159 P160 P161 P162 P163 P164 P165 P166 P167 P168 P169 P170 P171 P172 P173 P174 P175 P176 P177 P178 P179 P180 P181 P182 P183 P184 P185 P186 P187 P188 P189 P190 P191 P192 P193 P194 P195 P196 P197 P198 P199 P200 Bound Scan Package Outline 0.100 Dielectric Coat Bottom View 0.050 0.010 0.899 0.070 (223 Places) 1.860 0.019 1.700 Stand-Off Places) Edge Chamfer 0.010 0.050 Side Chamfer 0.030 0.010 Places) 0.090-0.110 View Gold Plate Index Side 18°C/W 1.8°C/W Mass 26.00 Grams Dimensions Inches 0.008 Places) 0.050 0.025 0.018 0.002 Plated Kovar Side View 0.005 0.130 0.010 X5328 223-Pin Ceramic (PG223) XC4000 High-Reliability Logic Cell Array Family Package Outline View (Ceramic Body) 1.550 0.016 1.920 0.020 0.040 places) Lead Pitch 228X 0.025 228X 0.008 0.002 0.043 (Deep 0.0175 Ref) 0.090 ±0.009 0.020 0.021 Braze Pad) Mass 17.6 Grams Dimensions Inches 17.7°C/W 1°C/W 0.035 0.005 Lead Thickness 0.002 0.005 0.001 Ceramic Tie-Bar Places) 0.020 0.900 0.020 Bottom View (Lid View) 2.500 X5912 228-Pin Ceramic (CB228) 0.030 0.020 2.300 Static Burn-In Circuit 1.5K P100 CCLK DATA (SDI) CB100 DONE PROG INIT 1.5K 1.5K 1.5K 1.5K 1.5K 1.5K 1.5K 1.5K Notes: Unless otherwise specified, resistors metal film rated 150°C with build tolerance Capacitor tolerance, rating with temperature characteristic. resistor metal oxide rated 150°C with tolerance X7139 XC4003A (CB100) XC4000 High-Reliability Logic Cell Array Family Static Burn-In Circuit 1.5K CCLK DATA (SDI) PG120 DONE INIT PROG 1.5K 1.5K 1.5K 1.5K 1.5K 1.5K 1.5K 1.5K Notes: Unless otherwise specified, resistors metal film rated 150°C with build tolerance Capacitor tolerance, rating with temperature characteristic. resistor metal oxide rated 150°C with tolerance X7138 XC4003A (PG120) Static Burn-In Circuit 1.5K CCLK DATA PG156 INIT 1.5K 1.5K 1.5K 1.5K Notes: Unless otherwise specified, resistors metal film rated 150°C with build tolerance Capacitor tolerance, rating with temperature characteristic. resistor metal oxide rated 150°C with tolerance X7137 XC4005 (PG156) DONE PROG 1.5K 1.5K 1.5K 1.5K XC4000 High-Reliability Logic Cell Array Family Static Burn-In Circuit 1.5K P164 P163 P162 P161 P160 P158 P157 P156 P155 P154 P153 P152 P151 P150 P149 P148 P147 P146 P145 P144 P143 P142 P141 P140 P139 P138 P137 P136 P135 P134 P133 P132 P131 P130 P128 P127 P126 P125 P124 CCLK DATA (SDI) CB164 PROG DONE INIT P123 P122 P121 P120 P119 P117 P116 P115 P114 P113 P112 P111 P110 P109 P108 P107 P106 P105 P104 P103 P102 P101 P100 1.5K 1.5K 1.5K 1.5K 1.5K 1.5K 1.5K 1.5K Notes: Unless otherwise specified, resistors metal film rated 150°C with build tolerance Capacitor tolerance, rating with temperature characteristic. resistor metal oxide rated 150°C with tolerance X7136 XC4005 (CB164) Static Burn-In Curcuit 1.5K CCLK PG191 1.5K 1.5K 1.5K 1.5K 1.5K 1.5K 1.5K Notes: Unless otherwise specified, resistors metal film rated 150°C with build tolerance Capacitor tolerance, rating with temperature characteristic. resistor metal oxide rated 150°C with tolerance X7135 XC4010 (PG191) DONE INIT PROG 1.5K XC4000 High-Reliability Logic Cell Array Family Static Burn-In Circuit 1.5K P196 P195 P194 P193 P192 P191 P190 P189 P188 P187 P186 P185 P184 P183 P182 P181 P180 P179 P178 P177 P176 P175 P174 P173 P172 P171 P170 P169 P168 P167 P166 P165 P164 P163 P162 P161 P160 P159 P158 P157 P156 P155 P154 P153 P152 P151 P150 P149 P148 CCLK CB196 INIT PROG DONE P147 P146 P145 P144 P143 P142 P141 P140 P139 P138 P137 P136 P135 P134 P133 P132 P131 P130 P129 P128 P127 P126 P125 P124 P123 P122 P121 P120 P119 P118 P117 P116 P115 P114 P113 P112 P111 P110 P109 P108 P107 P106 P105 P104 P103 P102 P101 P100 1.5K 1.5K 1.5K 1.5K 1.5K 1.5K 1.5K 1.5K Notes: Unless otherwise specified, resistors metal film rated 150°C with build tolerance Capacitor tolerance, rating with temperature characteristic. resistor metal oxide rated 150°C with tolerance X6569 XC4010 (CB196) Static Burn-In Circuit 1.5K CCLK PG223 1.5K 1.5K 1.5K DONE INIT PROG 1.5K 1.5K 1.5K 1.5K 1.5K Notes: Unless otherwise specified, resistors metal film rated 150°C with build tolerance Capacitor tolerance, rating with temperature characteristic. resistor metal oxide rated 150°C with tolerance X7134 XC4013 (PG223) XC4000 High-Reliability Logic Cell Array Family Static Burn-In Circuit 1.5K P228 P227 P226 P225 P224 P223 P222 P221 P220 P219 P218 P217 P216 P215 P214 P213 P212 P211 P210 P209 P208 P207 P206 P205 P204 P203 P202 P201 P200 P199 P198 P197 P196 P195 P194 P193 P192 P191 P190 P189 P188 P187 P186 P185 P184 P183 P182 P181 P180 P179 P178 P177 P176 P175 P174 P173 P172 CCLK CB228 INIT DONE PROG P171 P170 P169 P168 P167 P166 P165 P164 P163 P162 P161 P160 P159 P158 P157 P156 P155 P154 P153 P152 P151 P150 P149 P148 P147 P146 P145 P144 P143 P142 P141 P140 P139 P138 P137 P136 P135 P134 P133 P132 P131 P130 P129 P128 P127 P126 P125 P124 P123 P122 P121 P120 P119 P118 P117 P116 P115 1.5K 1.5K 1.5K 1.5K 1.5K P100 P101 P102 P103 P104 P105 P106 P107 P108 P109 P110 P111 P112 P113 P114 1.5K 1.5K 1.5K Notes: Unless otherwise specified, resistors metal film rated 150°C with build tolerance Capacitor tolerance, rating with temperature characteristic. resistor metal oxide rated 150°C with tolerance X7133 XC4013 (CB228) Absolute Maximum Ratings Limits TSTG TSOL Supply voltage relative Input voltage with respect Voltage applied 3-state output Storage temperature (ambient) Maximum soldering temperature 1/16 Junction temperature -0.5 -0.5 +0.5 -0.5 +0.5 +150 +260 +150 Units Note: Stresses above Absolute Maximum Ratings cause permanent damage device. These stress ratings only, functional operation device these other conditions beyond those listed under Recommended Operating Conditions implied. Exposure Absolute Maximum Ratings conditions extended periods time affect device reliability. Operating Conditions °CTC+125°C, ±10% High-level input voltage (XC4000 TTL-like input thresholds) Low-level input voltage (XC4000 TTL-like input thresholds) Voltage applied 3-state output Group Subgroups Units Characteristics Over Operating Conditions °CTC+125°C, ±10% High-level input voltage -4.0 Low-level input voltage (XC4005/XC4010/XC4013) (XC4003A) ICCO IRIN IRLL Quiescent supply current (Note Leakage current Input capacitance (sample tested) pull-up (when selected) Horizontal Long Line pull-up (when selected) logic XC4003A, XC4005 XC4010, XC4013 Group Subgroups Units Note: With outputs simultaneously sinking (XC4005/XC4010/XC4013) (XC4003A). With output current loads, active input long line pull-resistors, package pins GND, configured with MakeBits "tie" option. Sales Offices North America Corporate Headquarters Xilinx, Inc. 2100 Logic Drive Jose, 95124 Tel: (408) 559-7778 Fax: (408) 559-7114 NET: hotline@xilinx.com WEB: http//www.xilinx.com Northern California Xilinx, Inc. 1281 Oakmead Parkway Suite Sunnyvale, 94086 Tel: (408) 245-9850 Fax: (408) 245-9865 Southern California Xilinx, Inc. 15615 Alton Parkway Suite Irvine, 92718 Tel: (714) 727-0780 Fax: (714) 727-3128 Hampshire Xilinx, Inc. Spit Brook Road Suite Nashua, 03060 Tel: (603) 891-1096 Fax: (603) 891-0890 Pennsylvania Xilinx, Inc. Airport Road Suite West Chester, 19380 Tel: (610) 430-3300 Fax: (610) 430-0470 Texas Xilinx, Inc. 4100 McEwen Suite Dallas, 75244 Tel: (214) 960-1043 Fax: (214) 960-0927 Illinois Xilinx, Inc. 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