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XC4000 High-Reliability Logic Cell Array Family

Product Description Description

XC4000 High-Reliability Logic Cell Array Family
Product Description Description
The XC4000 family of Field-Programmable Gate Arrays (FPGAs) provides the benefits of custom CMOS VLSI, while avoiding the initial cost, time delay, and inherent risk of a conventional masked gate array. The XC4000 families provide a regular, flexible, programmable architecture of Configurable Logic Blocks (CLBs), interconnected by a powerful hierarchy of versatile routing resources surrounded by a perimeter of programmable Input / Output Blocks (IOBs). All XC4000-family devices have generous routing resources to accommodate the most complex interconnect patterns. XC4000A devices have reduced sets of routing resources, sufficient for their smaller size. The devices are customized by loading configuration data into the internal memory cells. The FPGA can either actively read its configuration data out of an external serial or byte-parallel PROM (master modes), or the configuration data can be written into the FPGA (slave and peripheral modes). The XC4000 family is supported by powerful and sophisticated software, covering every aspect of design: from schematic entry, to simulation, to automatic block placement and routing of interconnects, and finally the creation of the configuration bit stream. Since Xilinx FPGAs can be re-programmed an unlimited number of times, they can be used in innovative designs where hardware is changed dynamically, or where hardware must be adapted to different user applications.
March 1997 (version 1.0) Features
Table 1. The XC4000 High-Reliability Family of Field-Programmable Gate Arrays Device Appr. Gate Count: CLB Matrix: Number of CLBs: Number of Flip-Flops: Max RAM Bits: Number of IOBs: XC4003A 3, 000 10 x 10 100 360 3, 200 80 XC4005 5, 000 14 x 14 196 616 6, 272 112 XC4010 10, 000 20 x 20 400 1, 120 12, 800 160 XC4013 13, 000 24 x 24 576 1, 536 18, 432 192
XC4000 High-Reliability Logic Cell Array Family
XC4000 Family Configuration Pin Assignments
TDI TCK TMS M1 (HIGH) (I) M0 (HIGH) (I) M2 (HIGH) (I) HDC (HIGH) LDC (LOW) INIT-ERROR DONE PROGRAM (I)
TDI TCK TMS M1 (LOW) (I) M0 (LOW) (I) M2 (LOW) (I) HDC (HIGH) LDC (LOW) INIT-ERROR DONE PROGRAM (I)
TDI TCK TMS M1 (HIGH) (I) M0 (HIGH) (I) M2 (LOW) (I) HDC (HIGH) LDC (LOW) INIT-ERROR DONE PROGRAM (I) DATA 7 (I) DATA 6 (I) DATA 5 (I) DATA 4 (I) DATA 3 (I) DATA 2 (I) DATA 1 (I) RDY / BUSY DATA 0 (I) DOUT CCLK (O) TDO
TDI TCK TMS M1 (LOW) (I) M0 (HIGH) (I) M2 (HIGH) (I) HDC (HIGH) LDC (LOW) INIT-ERROR DONE PROGRAM (I) DATA 7 (I) DATA 6 (I) DATA 5 (I) CS0 (I) DATA 4 (I) DATA 3 (I) RS (I) DATA 2 (I) DATA 1 (I) RDY / BUSY DATA 0 (I) DOUT CCLK (O) TDO WS (I) CS1 (I)
DATA 3 (I) DATA 2 (I) DATA 1 (I) RCLK DATA 0 (I) DOUT CCLK (O) TDO A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15
DIN (I) DOUT CCLK (I) TDO
DIN (I) DOUT CCLK (O) TDO
Represents a 50 k to 100 k pull-up before and during configuration INIT is an open-drain output during configuration (I) Represents an input
X5265
XC4003A Pinouts
Pin Description VCC I / O (A8) I / O (A9) I / O I / O I / O (A10) I / O (A11) I / O (A12) I / I (A13) I / O (A14) PGCK1 (A15, I / O) VCC GND PGCK1 (A16, I / O) I / O (A17) I / I (TDI) I / O (TCK) I / O (TMS) I / O I / O I / O I / O I / O GND VCC I / O I / O I / O I / O I / O I / O I / O I / O I / O SGCK2 (I / O) O (M1) GND I (M0) VCC I (M2) PGCK2 (I / O) I / O (HDC) I / O I / O (LDC) I / O I / O I / O I / O I / O I / O (ERR, INIT) VCC C B 1 0 0 P G 1 2 0 Bound Scan 89 G3 90 G1 32 91 F1 35 92 E1 38 93 F2 41 94 F3 44 95 D1 47 E2 96 C1 50 97 D2 53 E3 B1 98 C2 56 99 D3 59 100 C3 1 C4 2 B2 62 3 B3 65 A1 A2 4 C5 68 5 B4 71 A3 6 B5 74 7 A4 77 C6 80 8 A5 83 9 B6 86 10 A6 89 11 B7 12 C7 13 A7 92 14 A8 95 15 A9 98 B8 101 16 C8 104 17 A10 107 18 B9 110 19 A11 113 B10 20 C9 116 21 A12 119 22 B11 122 23 C10 24 C11 125 25 D11 26 B12 126 27 C12 127 28 A13 130 B13 E11 29 D12 133 30 C13 136 31 E12 139 32 D13 142 33 F11 145 34 E13 148 35 F12 151 36 F13 154 37 G12 Pin Description GND I / O I / O I / O I / O I / O I / O I / O I / O I / O SGCK3 (I / O) GND DONE VCC PROG I / O (D7) PGCK3 (I / O) C B 1 0 0 P G 1 2 0 Bound Scan 38 G11 39 G13 157 40 H13 160 41 J13 163 42 H12 166 43 H11 169 44 K13 172 45 J12 175 46 L13 178 K12 J11 47 M13 181 48 L12 184 49 K11 50 L11 51 L10 52 M12 53 M11 187 54 N13 190 N12 L9 55 M10 193 56 N11 196 57 M9 199 58 N10 202 59 L8 205 60 N9 208 61 M8 211 62 N8 214 63 M7 64 L7 65 N7 217 66 N6 220 67 N5 223 M6 226 68 L6 229 69 N4 232 70 M5 235 71 N3 238 M4 L5 72 N2 241 73 M3 244 74 L4 75 L3 76 M2 77 K3 78 L2 2 79 N1 5 M1 J3 80 K2 8 81 L1 11 82 J2 14 83 K1 17 84 H3 20 85 J1 23 86 H2 26 87 H1 29 88 G2 -
XC4000 High-Reliability Logic Cell Array Family
Package Outline
Bottom View
Dimensions in Inches
X5323
120-Pin Ceramic PGA (PG120)
Package Outline
Top View (Ceramic Body)
0.020 X 45° (4 Places)
Ceramic Tie-Bar (4 Places)
4X 0.043 Ref (Deep 0.0175 Ref)
0.115 Max at Ceramic Edge
0.020 Max
100X 0.020 Max (Ceramic Edge)
Bottom View (Lid View)
X7140
100-Pin Ceramic QFP (CB100)
2.580 Max Sq
2.300 Typ Sq
XC4000 High-Reliability Logic Cell Array Family
XC4005 Pinouts
Indicates unconnected package pins Contributes only one bit (.i) to the boundary scan register
Package Outline
Top View
Dimensions in Inches
X5325
156-Pin Ceramic PGA (PG156)
XC4000 High-Reliability Logic Cell Array Family
Package Outline
Top View (Ceramic Body)
0.020 x 45° 1 164 Pin 1 ID 41 42
0.040 x 45° (3 Places)
124 123 Ceramic Tie-Bar (4 Places)
Lead Pitch 160X 0.025 + 0.002 164X 0.007 - 0.001 0.115 Max at Ceramic Edge
4X 0.043 Ref (Deep 0.0175 Ref)
0.020 Max
164X 0.021 Max (Ceramic Edge)
Lead Thickness + 0.002 0.006 - 0.001
Bottom View (Lid View)
X5326
164-Pin Ceramic QFP (CB164)
2X 2.300 Typ Sq
XC4010 Pinouts
Indicates unconnected package pins Contributes only one bit (.i) to the boundary scan register
XC4000 High-Reliability Logic Cell Array Family
XC4010 Pinouts (continued)
Pin Description GND I / O I / O I / O I / O I / O I / O I / O I / O I / O I / O GND I / O I / O I / O I / O I / O I / O I / O I / O I / O SGCK3 (I / O) GND DONE VCC PROG I / O (D7) PGCK3 (I / O) I / O I / O I / O (D6) I / O I / O I / O I / O I / O GND I / O I / O I / O (D5) I / O (CSO) I / O I / O I / O I / O I / O (D4) I / O VCC P G 1 9 1 C B 1 9 6 Bound Scan K15 75 K16 K17 K18 L18 L17 L16 M18 M17 N18 P18 M16 N17 R18 T18 P17 N16 T17 R17 P16 U18 T16 R16 U17 R15 V18 T15 U16 T14 U15 V17 V16 T13 U14 V15 V14 T12 U13 V13 U12 V12 T11 U11 V11 V10 U10 T10 R10 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 307 310 313 316 319 322 325 328 331 334 337 340 343 346 349 352 355 358 361 364 367 370 373 376 379 382 385 388 391 394 397 400 403 406 409 412 415 418 421 424 Pin Description GND I / O (D3) I / O (RS) I / O I / O I / O I / O I / O (D2) I / O I / O I / O GND I / O I / O I / O I / O I / O (D1) I / O (RCLK-BUSY / RDY) I / O I / O I / O (D0, DIN) SGCK4 (DOUT, I / O) CCLK VCC TD0 GND I / O (A0, WS) PGCK4 (I / O, A1) I / O I / O I / O (CS1, A2) I / O (A3) I / O I / O I / O I / O GND I / O I / O I / O (A4) I / O (A5) I / O I / O I / O I / O I / O (A6) I / O (A7) GND P G 1 9 1 C B 1 9 6 Bound Scan R9 124 T9 U9 V9 V8 U8 T8 V7 U7 V6 U6 T7 V5 V4 U5 T6 V3 V2 U4 T5 U3 T4 V1 R4 U2 R3 T3 U1 P3 R2 T2 N3 P2 T1 R1 N2 M3 P1 N1 M2 M1 L3 L2 L1 K1 K2 K3 K4 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 427 430 433 436 439 442 445 448 451 454 457 460 463 466 469 472 475 478 481 484 2 5 8 11 14 17 20 23 26 29 32 35 38 41 44 47 50 53 56 59 -
Package Outline
Top View
Gold Plate Pin #1 Index Top Side
Dimensions in Inches
X5329
191-Pin Ceramic PGA (PG191)
XC4000 High-Reliability Logic Cell Array Family
Package Outline
Top View (Ceramic Body)
0.020 X 45°
0.040 X 45° (3 Places)
4X 0.043 Ref (Deep 0.0175 Ref)
0.115 Max at Ceramic Edge
0.020 Max
0.021 Max (Ceramic Edge)
Lead Thickness + 0.002 0.006 - 0.001
0.890 Max Sq
Bottom View (Lid View)
196-Pin Ceramic QFP (CB196)
2.500 Sq
X5869
2.300 Typ Sq
XC4013 Pinouts
Pin Description VCC I / O (A8) I / O (A9) I / O I / O I / O I / O I / O (A10) I / O (A11) VCC I / O I / O I / O I / O GND I / O I / O I / O I / O I / O (A12) I / O (A13) I / O I / O I / O I / O I / O (A14) SGCK1 (A15, I / O) VCC GND PGCK1 (A16, I / O) I / O (A17) I / O I / O I / O (TDI) I / O (TCK) I / O I / O I / O I / O I / O I / O GND I / O I / O I / O (TMS) I / O VCC I / O I / O I / O I / O I / O I / O I / O I / O GND VCC I / O PG223 J4 J3 J2 J1 H1 H2 H3 G1 G2 H4 G4 F1 E1 G3 F2 D1 C1 E2 F3 D2 F4 E4 B1 E3 C2 B2 D3 D4 C3 C4 B3 C5 A2 B4 C6 A3 B5 B6 D5 D6 C7 A4 A5 B7 A6 D7 D8 C8 A7 B8 A8 B9 C9 D9 D10 P29 CB228 P201 P202 P203 P204 P205 P206 P207 P208 P209 P210 P211 P212 P213 P214 P215 P216 P217 P218 P219 P220 P221 P222 P223 P224 P225 P226 P227 P228 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 VCC P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 Bound Scan 74 77 80 83 86 89 92 95 98 101 104 107 110 113 116 119 122 125 128 131 134 137 140 143 146 149 152 155 158 161 164 167 170 173 176 179 182 185 188 191 194 197 200 203 206 209 212 215 218 Pin Description I / O I / O I / O I / O I / O I / O I / O VCC I / .O I / O I / O I / O GND I / O I / O I / O I / O I / O I / O I / O I / O I / O I / O I / O SGCK2 (I / O) M1 GND M0 VCC M2 PGCK2 (I / O) I / O (HDC) I / O I / O I / O I / O (LDC) I / O I / O I / O I / O I / O I / O GND I / O I / O I / O I / O VCC I / O I / O I / O I / O I / O I / O I / O I / O (ERR, INT) VCC GND PG223 B10 A9 A10 A11 C11 D11 D12 B11 A12 B12 A13 C12 D13 D14 B13 A14 A15 C13 B14 A16 B15 C14 A17 B16 C15 D15 A18 D16 C16 B17 E16 C17 D17 B18 E17 F16 C18 D18 F17 E15 F15 G16 E18 F18 G17 G18 H16 H17 G15 H15 H18 J18 J17 J16 CB228 P30 P31 P32 P33 P34 P35 P36 P37 P38 P39 P40 P41 P42 P43 P44 P45 P46 P47 P48 P49 P50 P51 P52 P53 P54 P55 P56 P57 P58 P59 P60 P61 P62 P63 P64 P65 P66 P67 P68 P69 P70 P71 P72 P73 P74 P75 P76 VCC P77 P78 P79 P80 P81 P82 P83 P84 P85 P86 Bound Scan 221 224 227 230 233 236 239 242 245 248 251 254 257 260 263 266 269 272 275 278 281 284 287 290 293 294 295 298 301 304 307 310 313 316 319 322 325 328 331 334 337 340 343 346 349 352 355 358 361 364 -
XC4000 High-Reliability Logic Cell Array Family
XC4013 Pinouts (continued)
Pin Description VCC GND I / O I / O I / O I / O I / O I / O I / O I / O VCC I / O I / O I / O I / O GND I / O I / O I / O I / O I / O I / O I / O I / O I / O I / O I / O SGCK3 (I / O) GND DONE VCC PROG I / O (D7) PGCK3 (I / O) I / O I / O I / O I / O I / O (D6) I / O I / O I / O I / O I / O GND I / O I / O I / O I / O VCC I / O (D5) I / O (CS0) I / O I / O I / O I / O I / O (D4) I / O VCC PG223 J15 K15 K16 K17 K18 L18 L17 L16 L15 M15 M18 M17 N18 P18 M16 N15 P15 N17 R18 T18 P17 N16 T17 R17 P16 U18 T16 R16 U17 R15 V18 T15 U16 T14 U15 R14 R13 V17 V16 T13 U14 V15 V14 T12 R12 R11 U13 V13 U12 V12 T11 U11 V11 V10 U10 T10 R10 CB228 P85 P86 P87 P88 P89 P90 P91 P92 P93 P94 P95 P96 P97 P98 P99 P100 P101 P102 P103 P104 P105 P106 P107 P108 P109 P110 P111 P112 P113 P114 P115 P116 P117 P118 P119 P120 P121 P122 P123 P124 P125 P126 P127 P128 P129 P130 P131 P132 P133 VCC P134 P135 P136 P137 P138 P139 P140 P141 P142 Bound Scan 367 370 373 376 379 382 385 388 391 394 397 400 403 406 409 412 415 418 421 424 427 430 433 436 439 442 445 448 451 454 457 460 463 466 469 472 475 478 481 484 487 490 493 496 499 502 505 508 Pin DescriptionPG223 GND R9 I / O (D3) T9 I / O ( / RS) U9 I / O V9 I / O V8 I / O U8 I / O T8 I / O (D2) V7 I / O U7 VCC I / O V6 I / O U6 I / O R8 I / O R7 GND T7 I / O R6 I / O R5 I / O V5 I / O V4 I / O U5 I / O T6 I / O (D1) V3 I / O (RCLK, BUSY / RDY) V2 I / O U4 I / O T5 I / O (D0, DIN) U3 SGCK4 (DOUT, I / O) T4 CCLK V1 VCC R4 TDO U2 GND R3 I / O (A0, WS) T3 PGCK4 (I / O, A1) U1 I / O P3 I / O R2 I / O (CS1, A2) T2 I / O (A3) N3 I / O P4 I / O N4 I / O P2 I / O T1 I / O R1 I / O N2 GND M3 I / O P1 I / O N1 I / O M4 I / O L4 VCC I / O (A4) M2 I / O (A5) M1 I / O L3 I / O L2 I / O L1 I / O K1 I / O (A6) K2 I / O (A7) K3 GND K4 CB228 P143 P144 P145 P146 P147 P148 P149 P150 P151 P152 P153 P154 P155 P156 P157 P158 P159 P160 P161 P162 P163 P164 P165 P166 P167 P168 P169 P170 P171 P172 P173 P174 P175 P176 P177 P178 P179 P180 P181 P182 P183 P184 P185 P186 P187 P188 P189 P190 P191 P192 P193 P194 P195 P196 P197 P198 P199 P200 Bound Scan 511 514 517 520 523 526 529 532 535 538 541 544 547 550 553 556 559 562 565 568 571 574 577 2 5 8 11 14 17 20 23 26 29 32 35 38 41 44 47 50 53 56 59 62 65 68 71 -
Package Outline
0.070 Dia Typ (223 Places)
Stand-Off Pin (4 Places)
Top Edge Chamfer 0.010 X 45° TYP
0.050 X 45° Pin #1 Side
Top View
Gold Plate Pin #1 Index Top Side
Dimensions in Inches
X5328
223-Pin Ceramic PGA (PG223)
XC4000 High-Reliability Logic Cell Array Family
Package Outline
Top View (Ceramic Body)
0.040 X 45° (3 places)
4X 0.043 Ref (Deep 0.0175 Ref)
0.020 Max
0.021 Max (At Braze Pad)
Lead Thickness + 0.002 0.005 - 0.001
Ceramic Tie-Bar (4 Places)
0.020 X 45°
0.900 Max Sq
0.020 Max Typ
Bottom View (Lid View)
X5912
228-Pin Ceramic QFP (CB228)
4X 2.300 Typ Sq
Static Burn-In Circuit
10 1.5K 1µf
VCC GND
P100 P99 P98 P97 P96 P95 P94 P93 P92 P91 P90 P89 P88 P87 P86 P85 P84 P83 P82 P81 P80 P79 P78 P77 P76
P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24
VCC CCLK DATA IN (SDI)
GND VCC
CB100
GND VCC
M1 GND M0 GND DONE
D7 PROG VCC VCC M2 INIT VCC GND HDC LDC
P75 P74 P73 P72 P71 P70 P69 P68 P67 P66 P65 P64 P63 P62 P61 P60 P59 P58 P57 P56 P55 P54 P53 P52 P51
P25 P26 P27 P28 P29 P30 P31 P32 P33 P34 P35 P36 P37 P38 P39 P40 P41 P42 P43 P44 P45 P46 P47 P48 P49 P50 2K 1.5K 1.5K 1.5K
X7139
XC4003A (CB100)
XC4000 High-Reliability Logic Cell Array Family
Static Burn-In Circuit
10 1µf
VCC GND
C4 B2 B3 A1 A2 C5 B4 A3 B5 A4 C6 A5 B6 A6 B7 C7 A7 A8 A9 B8 C8 A10 B9 A11 B10 C9 A12 B11 C10 C11
VCC CCLK DATA IN (SDI)
GND VCC
PG120
GND VCC
M1 GND M0 GND DONE INIT VCC GND HDC VCC M2 LDC
D7 PROG VCC
L3 L4 M3 N2 L5 M4 N3 M5 N4 L6 M6 N5 N6 N7 L7 M7 N8 M8 N9 L8 N10 M9 N11 M10 L9 N12 N13 M11 M12 L10
1.5K 1.5K
D11 B12 C12 A13 B13 E11 D12 C13 E12 D13 F11 E13 F12 F13 G12 G11 G13 H13 J13 H12 H11 K13 J12 L13 K12 J11 M13 L12 K11 L11 2K 1.5K 1.5K 1.5K
X7138
XC4003A (PG120)
Static Burn-In Circuit
VCC GND
C4 B3 A1 A2 C5 B4 A3 A4 C6 B5 B6 A5 C7 B7 A6 A7 A8 C8 B8 C9 B9 A9 B10 C10 A10 A11 B11 C11 A12 B12 A13 A14 C12 B13 B14 A15 C13 A16
VCC CCLK DATA IN
GND VCC
PG156
GND VCC
M1 GND M0 GND INIT VCC GND GND HDC VCC M2 LDC
C14 B15 B16 D14 C15 D15 E14 C16 E15 D16 F14 F15 E16 F16 G14 G15 G16 H16 H15 H14 J14 J15 J16 K16 K15 K14 L16 M16 L15 L14 N16 M15 P16 M14 N15 P15 N14 R16 P14 R15
X7137
XC4005 (PG156)
GND DONE
D7 PROG VCC
P3 R2 T2 P4 R3 R4 P5 T3 R5 P6 T4 R6 T5 P7 R7 T6 T7 T8 P8 R8 P9 R9 T9 R10 P10 T10 T11 R11 P11 T12 R12 T13 T14 P12 R13 T15 T16 R14 P13
1.5K 1.5K
XC4000 High-Reliability Logic Cell Array Family
Static Burn-In Circuit
10 1µf
VCC GND
P164 P163 P162 P161 P160 P158 P157 P156 P155 P154 P153 P152 P151 P150 P149 P148 P147 P146 P145 P144 P143 P142 P141 P140 P139 P138 P137 P136 P135 P134 P133 P132 P131 P130 P128 P127 P126 P125 P124
P1 P2 P3 P4 P5 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P26 P27 P28 P29 P30 P31 P32 P33 P34 P35 P37 P38 P39 P40 P41
VCC CCLK DATA IN (SDI)
GND GND
GND VCC
CB164
GND VCC
GND GND
M1 GND M0
D7 PROG VCC GND DONE GND INIT VCC GND GND HDC LDC
P123 P122 P121 P120 P119 P117 P116 P115 P114 P113 P112 P111 P110 P109 P108 P107 P106 P105 P104 P103 P102 P101 P100 P99 P98 P97 P96 P95 P94 P93 P92 P91 P90 P89 P87 P86 P85 P84 P83
P42 P43 P44 P45 P46 P48 P49 P50 P51 P52 P53 P54 P55 P56 P57 P58 P59 P60 P61 P62 P63 P64 P65 P66 P67 P68 P69 P70 P71 P72 P73 P74 P75 P76 P77 P78 P79 P80 P81 P82 2K 1.5K 1.5K 1.5K
VCC M2
X7136
XC4005 (CB164)
Static Burn-In Curcuit
J3 J4 K4 K3 K2 K1 L1 L2 L3 M1 M2 N1 P1 M3 N2 R1 T1 P2 N3 T2 R2 P3 U1 VCC GND GND
D4 C3 C4 B3 C5 A2 B4 C6 A3 B5 B6 C7 A4 A5 B7 A6 C8 A7 B8 A8 B9 C9 D9 D10 C10 B10 A9 A10 A11 C11 B11 A12 B12 A13 C12 B13 A14 A15 C13 B14 A16 B15 C14 A17 B16 C15 D15 A18
VCC CCLK DIN
GND GND
GND VCC
PG191
GND VCC
R4 V1 T4 U3 T5 U4 V2 V3 T6 U5 V4 V5 T7 U6 V6 U7 V7 T8 U8 V8 V9 U9 T9 R9 R10 T10 U10 V10 V11 U11 T11 V12 U12 V13 U13 T12 V14 V15 U14 T13 V16 V17 U15 T14 U16 T15 V18 R15
GND GND
1.5K 1.5K
D15 C16 B17 E16 C17
D17 B18 E17 F16 C18 D18 F17 G16 E18 F18 G17 G18 H16 H17 H18 J18 J17 J16 J15 K15 K16 K17 K18 L18 L17 L16 M18 M17 N18 P18 M16 N17
R18 T18 P17 N16 T17 R17 P16 U18 T16 R16 U18
X7135
XC4010 (PG191)
GND DONE
M1 GND M0 GND INIT VCC GND GND HDC VCC LDC M2
D7 PROG VCC
XC4000 High-Reliability Logic Cell Array Family
Static Burn-In Circuit
VCC GND
P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31 P32 P33 P34 P35 P36 P37 P38 P39 P40 P41 P42 P43 P44 P45 P46 P47 P48 P49
P196 P195 P194 P193 P192 P191 P190 P189 P188 P187 P186 P185 P184 P183 P182 P181 P180 P179 P178 P177 P176 P175 P174 P173 P172 P171 P170 P169 P168 P167 P166 P165 P164 P163 P162 P161 P160 P159 P158 P157 P156 P155 P154 P153 P152 P151 P150 P149 P148
VCC CCLK DIN
GND VCC
CB196
GND VCC
M1 GND M0 GND INIT VCC GND GND HDC VCC LDC M2
D7 PROG VCC GND DONE
P147 P146 P145 P144 P143 P142 P141 P140 P139 P138 P137 P136 P135 P134 P133 P132 P131 P130 P129 P128 P127 P126 P125 P124 P123 P122 P121 P120 P119 P118 P117 P116 P115 P114 P113 P112 P111 P110 P109 P108 P107 P106 P105 P104 P103 P102 P101 P100 P99
1.5K 1.5K
P50 P51 P52 P53 P54 P55 P56 P57 P58 P59 P60 P61 P62 P63 P64 P65 P66 P67 P68 P69 P70 P71 P72 P73 P74 P75 P76 P77 P78 P79 P80 P81 P82 P83 P84 P85 P86 P87 P88 P89 P90 P91 P92 P93 P94 P95 P96 P97 P98 2K 1.5K 1.5K 1.5K
X6569
XC4010 (CB196)
Static Burn-In Circuit
10 1µf
VCC GND
GND TD0
D4 C3 C4 B3 C5 A2 B4 C6 A3 B5 B6 D5 D6 C7 A4 A5 B7 A6 D7 D8 C8 A7 B8 A8 B9 C9 D9 D10 C10 B10 A9 A10 A11 C11 D11 D12 B11 A12 B12 A13 C12 D13 D14 B13 A14 A15 C13 B14 A16 B15 C14 A17 B16 C15 D15 A18
VCC CCLK DIN
GND GND
GND VCC
PG223
GND VCC
GND GND
D16 C16 B17 E16 C17 D17 B18 E17 F16 C18 D18 F17 E15 F15 G16 E18 F18 G17 G18 H16 H17 G15 H15 H18 J18 J17 J16 J15 K15 K16 K17 K18 L18 L17 L16 L15 M15 M18 M17 N18 P18 M16 N15 P15 N17 R18 T18 P17 N16 T17 R17 P16 U18 T16 R16 U17
GND DONE
M1 GND M0 GND INIT VCC GND GND HDC VCC M2 LDC
D7 PROG GND
R4 V1 T4 U3 T5 U4 V2 V3 T6 U5 V4 V5 R5 R6 T7 R7 R8 U6 V6 U7 V7 T8 U8 V8 V9 U9 T9 R9 R10 T10 U10 V10 V11 U11 T11 V12 U12 V13 U13 R11 R12 T12 V14 V15 U14 T13 V16 V17 R13 R14 U15 T14 U16 T15 V18 R15
X7134
XC4013 (PG223)
XC4000 High-Reliability Logic Cell Array Family
Static Burn-In Circuit
10 1µf
VCC GND
P228 P227 P226 P225 P224 P223 P222 P221 P220 P219 P218 P217 P216 P215 P214 P213 P212 P211 P210 P209 P208 P207 P206 P205 P204 P203 P202 P201 P200 P199 P198 P197 P196 P195 P194 P193 P192 P191 P190 P189 P188 P187 P186 P185 P184 P183 P182 P181 P180 P179 P178 P177 P176 P175 P174 P173 P172
P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31 P32 P33 P34 P35 P36 P37 P38 P39 P40 P41 P42 P43 P44 P45 P46 P47 P48 P49 P50 P51 P52 P53 P54 P55 P56 P57
VCC CCLK DIN
GND GND
GND VCC
CB228
GND VCC
GND GND
M1 GND M0 INIT VCC GND HDC VCC M2 LDC GND DONE GND GND VCC
D7 PROG VCC
P171 P170 P169 P168 P167 P166 P165 P164 P163 P162 P161 P160 P159 P158 P157 P156 P155 P154 P153 P152 P151 P150 P149 P148 P147 P146 P145 P144 P143 P142 P141 P140 P139 P138 P137 P136 P135 P134 P133 P132 P131 P130 P129 P128 P127 P126 P125 P124 P123 P122 P121 P120 P119 P118 P117 P116 P115
P58 P59 P60 P61 P62 P63 P64 P65 P66 P67 P68 P69 P70 P71 P72 P73 P74 P75 P76 P77 P78 P79 P80 P81 P82 P83 P84 P85 P86 P87 P88 P89 P90 P91 P92 P93 P94 P95 P96 P97 P98 P99 P100 P101 P102 P103 P104 P105 P106 P107 P108 P109 P110 P111 P112 P113 P114 2K 1.5K 1.5K 1.5K
XC4013 (CB228)
Absolute Maximum Ratings
Note: Stresses above the Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time may affect device reliability.
Operating Conditions
DC Characteristics Over Operating Conditions
Sales Offices
North America
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Europe
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