AN99 Interfacing Xicor EEPROM Watchdog Timer Family Hitachi H8/30
|
|
|
Top Searches for this datasheet
Applications Staff, February 1997 following code demonstrates Xicor serial EEPROM watchdog timer could interfaced Hitachi H8/3000 microcontroller family when connected shown Fig. interface uses four port pins available family devices implement interface. Additional Xicor code found Xicor through Xicor FaxBack system) that will implement interface between other serial devices
AN99
Interfacing Xicor EEPROM Watchdog Timer Family Hitachi H8/3000 Microcontrollers
microcontroller family. Xicor reached toll free 1-800-258-8864, (408) area code internationally 1-408-943-0655. Xicor's will support 19.2K baud rate modem parity, words, stop bit, local echo). These listings found HITACHI (Special Interest Group). Xicor application notes also available through Xicor's FaxBack system (408) 954-1627.
XTAL AVcc AVss Vref
9.8304MHz 22pF 22pF EXTAL RESO CLKOUT STBY P6.0 P6.1 P6.2 P6.3 P6.4 P6.5 P6.6 P7.0 P7.1 P7.2 P7.3 P7.4 P7.5 P7.6 P7.7 P8.0 P8.1 P8.2 P8.3 P8.4 P9.0 P9.1 P9.2 P9.3 P9.4 P9.5 H8/3042 (FP)
RESET
X25043 RESET
Figure Typical hardware connection interfacing H8/3042 microcontroller
Xicor, Inc. 1511 Buckeye Drive Milpitas, 95035 (408) 432-8888
AN99-1
Xicor .h8300h .file "h8x25xx4.asm" h8x25xx4.asm Demonstration code interfacing Xicor Hitachi H8/3042 Revision: 1.00 02/04/97
AN99
Expects H8/3042 hard-wired Mode 8-bit bus-width, Expanded address space (0x00000-0xFFFFF), Internal disabled, Internal enabled (0xFF710-0xFFF0F), 9.8304 xtal .include "h8stddef.inc" H8/3042 standard register definitions
H8/3042 specific equates .equ .equ .equ .equ H8RAMTOP, H8RAMBOT, RXD0, INTMASK, 0xFFF0F 0xFF710 bit_2 0b11000000 Highest onboard address (2048 bytes) Lowest onboard address Receive data port/SCI Interrupt Mask bits)
Xicor X25xx4 device-specific equates .equ .equ .equ .equ .equ .equ .equ .equ .equ .equ .equ .equ .equ .equ .equ .equ .equ .equ .equ SCK, XICOR, XICORDDR, DDRSETUP, WREN, WRDI, WRSR, RDSR, WRITE, READ, STATUSREG, WIPBIT, ADDRBIT, PAGESIZE, MAXPOLLS, bit_0 bit_1 bit_2 bit_3 bit_4 PBDR PBDDR 0b11110111 0x06 0x04 0x01 0x05 0x02 0x03 0x00 bit_0 bit_3 Port Port Port Port Port Chip Select input out) Serial data Input out) Serial ClocK input out) Serial data Output Write Protect input out)
H8/3042 data port assignment (PB) H8/3042 data direction port assignment Port Data Direction Register setup WRite ENable latch instruction WRite DIsable latch instruction WRite Status Register instruction ReaD Status Register instruction WRITE memory instruction READ memory instruction
Status Register Write Progress status Read/Write instruction address Bytes page Maximum number poll attempts
Main equates .equ .equ .equ .equ .equ .equ .equ .equ .equ .equ .equ .equ .equ .equ .equ .equ STACKTOP, ALLONES, BIGWRITE, RAMBFR0, RAMBFR1, RAMBFR2, DATABYTE0, DATABYTE1, DATABYTE2, DATABYTE3, PWRUPFLGS, XADDRB, XADDRP, XADDRBP, XADDRBW, H8RAMLOC0, H8RAMTOP-4 Stack initializes here builds down 0b11111111 bits Test number bytes write H8RAMBOT Start read/write buffer on-board H8RAMBOT+PAGESIZE Second read/write buffer RAMBFR1+BIGWRITE Third read/write buffer 0xF0 Test byte 0x0F 0x55 2/Power-up flag 0xAA 256*DATABYTE3+DATABYTE2 0xAA55 Test byte write/read address Test page write/read address 0x195 Test block protect read/write address 0x037 EEPROM BigWrite destination H8RAMBOT+1047 Power-up test location
AN99-2
Xicor .equ H8RAMLOC1, H8RAMBOT+1597
AN99
Start code .org 0x00000 .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long .long 0x00000100 _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int _bogus_int
H8/3042 Interrupt vector jump table Must reside address 0x00000 RESET reserved reserved reserved reserved reserved reserved external interrupt (NMI) Trap Instruction sources) Trap Instruction sources) Trap Instruction sources) Trap Instruction sources) External Interrupt IRQ0 External Interrupt IRQ1 External Interrupt IRQ2 External Interrupt IRQ3 External Interrupt IRQ4 External Interrupt IRQ5 reserved reserved WOVI Watchdog timer Refresh controller reserved reserved IMIA0 GRA0 compare match/input capture IMIB0 GRB0 compare match/input capture OVI0 overflow reserved IMIA1 GRA1 compare match/input capture IMIB1 GRB1 compare match/input capture OVI1 overflow reserved IMIA2 GRA2 compare match/input capture IMIB2 GRB2 compare match/input capture OVI2 overflow reserved IMIA3 GRA3 compare match/input capture IMIB3 GRB3 compare match/input capture OVI3 overflow reserved IMIA4 GRA4 compare match/input capture IMIB4 GRB4 compare match/input capture OVI4 overflow reserved DEND0A DMAC group DEND0B DMAC group DEND1A DMAC group DEND1B DMAC group reserved reserved reserved reserved ERI0 receive error chan RXI0 receive data full chan TXI0 transmit data empty chan TEI0 transmit chan ERI1 receive error chan RXI1 receive data full chan TXI1 transmit data empty chan TEI1 transmit chan
AN99-3
Xicor .long _bogus_int _bogus_int: .org #0b11000000,ccr 0x000100 #INTMASK,ccr #STACKTOP,er7 _init_xiport:16 #WP,@XICOR _wren_cmnd:16 #0b00110000,r0l _wrsr_cmnd:16 #H8RAMLOC0,er1 @er1,r0l #H8RAMLOC1,er2 @er2,r0h #PWRUPFLGS,r3 r3l,@er1 r3h,@er2 r0,r3 _skip_wdt Initialization Disable interrupts Initialize Stack pointer Initialize X25xx4 port Write Protect line high enable X25xx4 writes Enable writing X25xx4 Setup disable Point power-up flag location fetch flag other flag, location fetch Setup flag compare (and re-write) Store first flag second (we've powered-up reset) brought here? Yes, skip Watch Timer exercise
AN99
Disable interrupts
_powerup: mov.l bset mov.b _main: mov.l mov.b mov.l mov.b mov.w mov.b mov.b cmp.w
Exercise X25xx4 Watch Timer time _wren_cmnd:16 #0b00100000,r0l _wrsr_cmnd:16 #30788,r3 #1,r3 _wdtdly_loop _wdog_reset:16 _wdt_wait:16 enable writing X25xx4 Setup 200ms enable Setup loop count (100ms @9.8304MHz) Crank counter Done? Reset WDT(verifies reset) Spin here until kicks back reset
mov.b _wdt_delay: mov.w _wdtdly_loop: dec.w _wdt_wait:
Skip Watch Timer done once, byte Read/Write exercise r0l,r0l #H8RAMLOC0,er1 r0l,@er1 #H8RAMLOC1,er1 r0l,@er1 _rdsr_cmnd:16 _wren_cmnd:16 #DATABYTE0,r0l #XADDRB,r1 _byte_write:16 #XADDRB,r1 _byte_read:16 _wren_cmnd:16 #DATABYTE1,r0l #XADDRB,r1 _byte_write:16 #XADDRB,r1 _byte_read:16 Setup null byte clear power-up flags Point power-up flag location clear flag other flag, location clear (now reset recycles WDT) Read X25xx4 status register Enable writing X25xx4 Setup data single byte write Setup X25xx4 target address write Setup X25xx4 source address fetch Enable writing X25xx4 Setup data single byte write Setup X25xx4 target address write Setup X25xx4 source address fetch
_skip_wdt: xor.b mov.l mov.b mov.l mov.b mov.b mov.w mov.w mov.b mov.w mov.w
AN99-4
Xicor Page Read/Write exercise mov.w mov.l mov.w mov.l mov.w _wren_cmnd:16 #XADDRP,r1 #_dataset0,er2 _page_write:16 #XADDRP,r1 #RAMBFR0,er2 #PAGESIZE,e1 _read_seq:16 Enable writing X25xx4 Setup X25xx4 target page address Point source data write page Again, setup X25xx4 source page address Point destination buffer onboard Setup byte read count read page
AN99
Sequential Read/Write exercise r0,r0 #RAMBFR1,er2 r0l,@er2 #1,er1 #1,r0 #BIGWRITE,r0 _bigwr_setup #BIGWRITE,e1 #XADDRBW,r1 #RAMBFR1,er2 _wren_cmnd:16 _write_seq:16 #BIGWRITE,e1 #XADDRBW,r1 #RAMBFR2,er2 _read_seq:16 Initialize byte sequence (0->BIGWRITE-1) point destination Store byte buffer Bump pointer next location Count bytes stored/generate next byte Have done all? continue
xor.w mov.l _bigwr_setup: mov.b inc.l inc.w cmp.w mov.w mov.w mov.l mov.w mov.w mov.l
Setup X25xx4 'big write' (count Enable writing X25xx4 write Setup read back!
Block Protect exercise mov.b mov.w not.b mov.b mov.b mov.w mov.w _wren_cmnd:16 #0b00111100,r0l _wrsr_cmnd:16 #XADDRBP,r1 _byte_read:16 r0l,r1l _wren_cmnd:16 r1l,r0l #XADDRBP,r1 _byte_write:16 #XADDRBP,r1 _byte_read:16 _end_loop Enable writing X25xx4 Setup Block Protect whole array protect Setup X25xx4 source address (protected) fetch One's complement, re-write verify Temporarily preserve Enable writing X25xx4 Recover data single byte write Setup X25xx4 target address (protected) write Setup X25xx4 source address fetch
_end_loop:
Terminal infinite loop
X25xx4 Interface Subroutines Name: Function: Calls: Expects: Returns: Registers: Remarks _init_xiport Initializes port directions None Nothing Nothing Must called once initially setup port #DDRSETUP,r0l r0l,@XICORDDR #CS,@XICOR
_init_xiport: mov.b mov.b bset
Chip Select disable X25xx4
AN99-5
Xicor bclr bclr bclr Name: Function: Calls: Expects: Returns: Registers: Remarks: #SI,@XICOR #SCK,@XICOR #WP,@XICOR Drop Serial Input X25xx4 Drop clock Write Protect line low, disable writes
AN99
_wren_cmnd Sends command enable writing Xicor X25xx4 EEPROM _send_byte Nothing Nothing
_wren_cmnd: bclr bclr mov.b bclr bset
#SCK,@XICOR #CS,@XICOR #WREN,r0l _send_byte:16 #SCK,@XICOR #CS,@XICOR
Setup Write Enable instruction high
Name: _wrdi_cmnd Function: Sends command disable writing Xicor X25xx4 EEPROM Calls: _send_byte Expects: Nothing Returns: Nothing Registers: Remarks: #SCK,@XICOR #CS,@XICOR #WRDI,r0l _send_byte:16 #SCK,@XICOR #CS,@XICOR Setup Write Disable instruction high
_wrdi_cmnd: bclr bclr mov.b bclr bset Name: Function:
_wrsr_cmnd Sends command which enables writing WD0, WD1, bits Xicor X25xx4 EEPROM status register Calls: _send_byte, _poll_write Expects: Block Protect/Watchdog Timer bits Returns: Nothing Registers: r0l, Remarks: r0,e0 #SCK,@XICOR #CS,@XICOR #WRSR,r0l _send_byte:16 e0,r0 _send_byte:16 #SCK,@XICOR #CS,@XICOR _poll_write:16 Temporarily preserve WDT/BP bits Setup Write Status Register instruction
_wrsr_cmnd: mov.w bclr bclr mov.b mov.w bclr bset
Recover WDT/BP bits high
AN99-6
Xicor Name: Function: _rdsr_cmnd Sends command which reads contents Xicor X25xx4 EEPROM status register Calls: _send _byte, _recv_byte Expects: Nothing Returns: Status Registers: Remarks: #SCK,@XICOR #CS,@XICOR #RDSR,r0l _send_byte:16 _recv_byte:16 #SCK,@XICOR #CS,@XICOR Setup Read Status Register instruction high
AN99
_rdsr_cmnd: bclr bclr mov.b bclr bset Name: Function: Calls: Expects: Returns: Registers: Remarks:
_byte_write Writes single byte Xicor X25xx4 EEPROM memory array _send_byte, _poll_write Byte sent r0l, address (0x0000-0x01FF) Nothing r0l,
_byte_write: bclr bclr mov.w mov.b mov.b mov.b mov.w bclr bset Name: Function: Calls: Expects: Returns: Registers: Remarks:
#SCK,@XICOR #CS,@XICOR r0,e0 #WRITE,r0l _send_byte:16 r1h,r0l _send_byte:16 r1l,r0l _send_byte:16 e0,r0 _send_byte:16 #SCK,@XICOR #CS,@XICOR _poll_write:16
Temporarily preserve byte Setup Write instruction
Fetch address byte Fetch address byte Recover byte high
_byte_read Reads single byte from Xicor X25xx4 EEPROM memory array _send_byte, _recv_byte Serial EEPROM byte address (0x0000-0x01FF) Byte read r0l,
_byte_read: bclr bclr mov.b mov.b mov.b bclr bset
#SCK,@XICOR #CS,@XICOR #READ,r0l _send_byte:16 r1h,r0l _send_byte:16 r1l,r0l _send_byte:16 _recv_byte:16 #SCK,@XICOR #CS,@XICOR
Setup Read instruction Fetch address byte Fetch address byte send Receive byte from EEPROM high
AN99-7
Xicor _page_write Sends full page bytes) Xicor X25xx4 EEPROM _send_byte, _poll_write Serial EEPROM destination starting address pointer source bytes Returns: Nothing Registers: r0l, r0h, Remarks: #SCK,@XICOR #CS,@XICOR #WRITE,r0l _send_byte:16 r1h,r0l _send_byte:16 r1l,r0l #0b11100000,r0l _send_byte:16 #PAGESIZE,r3l @er2+,r0l _send_byte:16 _page_wrloop #SCK,@XICOR #CS,@XICOR _poll_write:16 Setup Write instruction Fetch address byte Fetch address byte Mask drivel page boundary Name: Function: Calls: Expects:
AN99
_page_write: bclr bclr mov.b mov.b mov.b and.b mov.b _page_wrloop: mov.b dec.b bclr bset Name: Function: Calls: Expects:
Fetch byte send, point next Click another sent byte high
_read_seq Reads sequence bytes from Xicor X25xx4 Serial EEPROM _send_byte, _recv_byte EEPROM source starting address (0x0000-0x01FF), count bytes read pointer start destination storage Returns: Byte array read memory Registers: r0l, r0h, Remarks: #SCK,@XICOR #CS,@XICOR #READ,r0l _send_byte:16 r1h,r0l _send_byte:16 r1l,r0l _send_byte:16 _recv_byte:16 r0l,@er2 #1,er2 #1,e1 _read_seqloop #SCK,@XICOR #CS,@XICOR Setup Read instruction Fetch address byte Fetch address byte
_read_seq: bclr bclr mov.b mov.b mov.b _read_seqloop: mov.b inc.l dec.w bclr bset Name: Function: Calls: Expects:
Store EEPROM byte into memory Point next storage location Click another byte read high
_write_seq Writes sequence bytes Xicor X25xx4 Serial EEPROM _send_byte, _poll_write, _wren_cmnd EEPROM destination starting address (0x0000-0x01FF), count bytes write pointer start source storage Returns: Nothing Registers: r0l, r0h, er2, Remarks: Takes advantage page write mode minimize write times
AN99-8
Xicor _write_seq: bclr bclr mov.w mov.b mov.b mov.b _write_seqloop: mov.b dec.w inc.w mov.w and.b or.w bclr bset _wrseq_pagend: bclr bset or.w mov.w _wrseq_done: Name: Function:
AN99
#SCK,@XICOR #CS,@XICOR r1,e3 #WRITE,r0l _send_byte:16 r1h,r0l _send_byte:16 r1l,r0l _send_byte:16 @er2+,r0l _send_byte:16 #1,e1 #1,e3 e3,r3 #0b00011111,r3l _wrseq_pagend e1,e1 _write_seqloop #SCK,@XICOR #CS,@XICOR _poll_write:16 #SCK,@XICOR #CS,@XICOR _poll_write:16 e1,e1 _wrseq_done _wren_cmnd:16 e3,r1 _write_seq
preserve EEPROM destination address Setup Write instruction
Fetch address byte Fetch address byte Fetch byte write point next Click another byte written Point next destination address scratchpad Keep destination address page bits '00000' means prior address page byte count zero? continue with this page high
high write still progress EEPROM? byte count zero? Yes, we're done more re-enable writing Recover next EEPROM address expected Back EEPROM
_send_byte Sends byte Xicor X25xx4 EEPROM, serially shifting first Calls: None Expects: Byte sent Returns: Nothing Registers: r0l, Remarks: #8,r0h #SCK,@XICOR #SI,@XICOR #SCK,@XICOR _send_loop #SI,@XICOR Setup count Slip next into Carry Copy Carry port high Click Continue done
_send_byte: mov.b _send_loop: bclr rotxl.b bset dec.b bclr
AN99-9
Xicor Name: Function: _recv_byte Receives byte from Xicor X25xx4 EEPROM, serially shifting first Calls: None Expects: Nothing Returns: Received byte Registers: r0l, Remarks: #8,r0h #SCK,@XICOR Setup count high Guarantee limited clock rate Copy input port Carry Slip Carry into Click Continue done
AN99
_recv_byte: mov.b _recv_loop: bset bclr rotxl.b dec.b Name: Function:
#SCK,@XICOR #SO,@XICOR _recv_loop
_poll_write Polls completion non-volatile write cycle examining Write-In-Progress status register Calls: _rdsr_cmnd Expects: Nothing Returns: Nothing Registers: Remarks: #MAXPOLLS,r1l _rdsr_cmnd:16 #WIPBIT,r0l _poll_loop1 _poll_loop Setup maximum number poll attempts Fetch X25xx4 Status Register content Write-In-Progress zero? Yes, write complete click another poll attempt haven't exceeded maximum polls
_poll_write: mov.b _poll_loop: btst dec.b _poll_loop1: Name: Function: Calls: Expects: Returns: Registers: Remarks:
_wdog_reset Resets watchdog timer None Nothing Nothing None
_wdog_reset: bclr bset Data tables
#CS,@XICOR
#CS,@XICOR
.align _dataset0: .byte .byte .byte
DATABYTE0 DATABYTE1 DATABYTE2
AN99-10
Xicor .byte DATABYTE3
AN99
AN99-11
Other recent searches
XN04609 - XN04609 XN04609 Datasheet
XN4609 - XN4609 XN4609 Datasheet
TNE3C - TNE3C TNE3C Datasheet
SRC1206E - SRC1206E SRC1206E Datasheet
SPRA104 - SPRA104 SPRA104 Datasheet
RE1020 - RE1020 RE1020 Datasheet
M35SP-8 - M35SP-8 M35SP-8 Datasheet
Privacy Policy | Disclaimer
© 2012 Datasheet Archive
