AN03 Interfacing X24C44/45 NOVRAMs Zilog Microcontrollers se

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AN03 Interfacing X24C44/45 NOVRAMs Zilog Microcontrollers se

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Applications Staff, June 1995 following code demonstrates Xicor X24C44 X24C45 serial NOVRAMs could interfaced Zilog microcontroller family when connected shown Fig. interface uses three port pins available family devices implement interface. Additional Xicor code found Xicor through Xicor back system) that will implement interface between X24C01 serial PROM X24C01A/02/04/08/16
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Interfacing X24C44/45 NOVRAMs Zilog Microcontrollers
serial PROM family microcontroller family. Xicor reached toll free 1800-258-8864, (408) area code internationally 1-408-943-0655. Xicor's will support 19.2K baud rate modem parity, words, stop bit, local echo). These listings found ZILOG (Special Interest Group). Xicor application notes also available through Xicor's FaxBack system (408) 954-1627.
74HC04
74HC04
XTAL1 XTAL2 RESET Z8681
RECALL X24C44
Figure Typical hardware connection interfacing X24C44 microcontroller family
Xicor, Inc. 1511 Buckeye Drive Milpitas, 95035 (408) 432-8888
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Xicor THIS CODE DESIGNED DEMONSTRATE X24C44 COULD INTERFACED MICROCONTROLLER. INTERFACE USES LINES FROM PORT (P27, P26, P25) COMMUNICATE. PINS X24C44 TIED TOGETHER WHICH ALLOWS LESS PORT LINE USED. CODE SHOWN DEMONSTRATES RCL, WREN, READ, WRITE, STORE INSTRUCTIONS. REMAINING INSTRUCTIONS (WRDS ENAS) ISSUED USING SAME ROUTINE OTHER NON-DATA INSTRUCTIONS. PROGRAM ISSUES SEQUENCE INSTRUCTIONS READ CONTENTS ADDRESS STORES SAME VALUE ADDRESS SEQUENCE INSTRUCTIONS FOLLOWS SETS PREVIOUS RECALL LATCH WREN SETS WRITE ENABLE LATCH READ DATA FROM ADDRESS READ WRITE DATA READ DURING STEP WRITTEN ADDRESS RAM'S CONTENTS TRANSFERED EEPROM DATA TRANSFER PERFORMED WITH MOST SIGNIFICANT FIRST. SKHI .equ 020h GENERATED PORT CEHI .equ 040h GENERATED PORT DIOHI .equ 080h GENERATED PORT SKLO .equ 0DFh GENERATED PORT CELO .equ 0BFh GENERATED PORT DIOLO .equ 07Fh GENERATED PORT WRDS .equ 080h RESET WRITE ENABLE LATCH .equ 081h TRANSFERS FROM EEPROM SLEEP .equ 082h PLACES PART INTO POWER DOWN MODE WRITE .equ 083h WRITE WREN .equ 084h WRITE ENABLE LATCH .equ 085h TRANSFERS FROM EEPROM RAM, RESETS WRITE ENABLE LATCH READ .equ 086h READ DATAHI .equ REGISTER WHERE HIGH ORDER DATA STORED DATALO .equ REGISTER WHERE ORDER DATA STORED ADDR .equ REGISTER WHERE PART ADDRESS STORED COUNT .equ LOOP COUNT VARIABLE INST .equ REGISTER WHERE INSTRUCTION STORED TEMP .equ SCRATCH REGISTER START EXECUTION AFTER RESET RESETV: .org 0FF0Ch RESET VECTOR LOCATION 0FF0Fh CHANGE PROGRAM COUNTER FROM 00XXH FFXXH
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Xicor INITIALIZE PROCESSOR INITL: .org 0FF0Fh INITIALIZE PROCESSOR p0,#0FFh MAKE PORT0 (ADD 8-15) 0FFH p1m,#96h MAKE PORT0 UPPER ORDER ADDRESS #00h REGISTER POINTER FIRST BANK p2,#00h INITIALIZE PORT 000H p2m,#00h MAKE PORT OUTPUT REGISTER p3m,#01h MAKE PORT2 OUTPUTS HAVE ACTIVE HIGHS spl,#7Fh STACK POINTER 007FH sph,#00h BEGIN1 JUMP START PROGRAM BEGINNING PROGRAM CODE BEGIN1: .org 0E000h INST,#RCL ENABLE RECALL LATCH call CEHIGH BRING HIGH call OUTBYT SEND INSTRUCTION EEPROM call CELOW BRING BACK INST,#WREN WRITE ENABLE LATCH call CEHIGH call OUTBYT call CELOW ADDR,#05h READ ADDRESS STORE DATA call RDWRD DATALO DATAHI ADDR,#09h WRITE DATA DATALO DATAHI call WRWRD INTO ADDRESS INST,#STO PERFORM STORE OPERATION call CEHIGH call OUTBYT call CELOW DONE: DONE LOOP UNTIL RESET WRITE WORD SPECIFIED DATAHI DATALO. ADDRESS WRITTEN SPECIFIED ADDR. WRWRD: call CEHIGH ENABLE EEPROM INST,ADDR LOAD ADDRESS WRITE INST JUSTIFY ADDRESS INSTRUCTION INST INST INST,#WRITE BUILD WRITE INSTRUCTION call OUTBYT SEND WRITE INSTRUCTION EEPROM INST,DATAHI call OUTBYT SEND UPPER BYTE DATA INST,DATALO call OUTBYT SEND LOWER BYTE DATA call CELOW DISABLE EEPROM
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Xicor READ WORD ADDRESS SPECIFIED ADDR. DATA WILL STORED DATALO DATAHI. RDWRD: call CEHIGH READ ADDRESS SPECIFIED ADDR INST,ADDR INST JUSTIFY ADDRESS READ INST INST INST,#READ MASK READ INSTRUCTION call SEND7 SEND BITS READ INSTRUCTION p2m,#DIOHI MAKE DATA LINE INPUT call CLOCK SEND EIGHTH CLOCK PULSE READ INSTRUCTION COUNT,#10h PREPARE SHIFT BITS BITX: TEMP,p2 READ VALUE TEMP NO1: DATALO DATAHI DATAHI call CLOCK SEND CLOCK PULSE djnz COUNT,BITX LOOP WHILE READING DATA p2m,#00h MAKE DATA LINE OUTPUT call CELOW DISABLE PART SEND DATA PART. DATA SENT LOCATED INST. SEND7: COUNT,#07h SHIFT BITS READ INSTRUCTION LOOPO OUTBYT: COUNT,#08h PREPARE SHIFT BITS LOOPO: INST FIND DATA SHIFT c,SEND1 SEND DATA p2,#DIOLO ENDBIT SEND1: p2,#DIOHI ENDBIT: call CLOCK SEND CLOCK SIGNAL djnz COUNT,LOOPO LOOP WHILE STILL SHIFTING DATA BRING HIGH CEHIGH: p2,#CEHI BRING HIGH BRING CELOW: p2,#CELO BRING
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Xicor ISSUE CLOCK PULSE. CLOCK: p2,#SKHI SEND CLOCK PULSE (BRING HIGH) p2,#SKLO BRING .end
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AN03 Interfacing X24C44/45 NOVRAMs Zilog Microcontrollers se

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