Overview Features 6262 Standard fault tolerant differential

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Overview Features 6262 Standard fault tolerant differential

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KORMORAN-2-IC
Overview Features
6262
Standard fault tolerant differential CAN-transceiver (TLE6254 cell) failure management power mode management data transmission rate kBaud Low-dropout voltage regulator Side Switches Three High Side Switches Power under-voltage reset generator supervisor Window watchdog Programable time base Integrated fail-safe mechanism Standard SPI-Interface Wide input voltage temperature range Enhanced power P-DSO-Package Type 6262 Ordering Code request
P-DSO-28-6 Enhanced Power
Package P-DSO-28-6
Description 6262 monolithic integrated circuit P-DSO-28-6 package, which incorporates failure tolerant speed CAN-transceiver differential mode data transmission, dropout voltage regulator internal external supply well interface control monitor Further there integrated three high side switches, side switches, window watchdog circuit reset circuit. Both, window watchdog reset function referring time base that programmable external resistor. designed withstand severe conditions automotive applications.
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Configuration (top view)
CANH CANL OUTH1 OUTL1 OUTL2 OUTH2 OUTH3
P-DSO-28-6
(enhanced power package)
Figure
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Definitions Functions Symbol CANH CANL Function CAN-H line; HIGH dominant state Termination input CANH Reset output; open drain output; integrated pull active CAN-L line; dominant state Termination input CANL Ground; reduce thermal resistance place cooling areas close this pins. High side output controlled input and/or input, short circuit protected side output controlled, with active zener side output controlled, with active zener High side output controlled High side output controlled, power mode controlled internal autotiming function selected Power supply; block directly with ceramic capacitor interface chip select not; active input; serial communication enabled pulling terminal low; input should only transitioned when low; internal active pull requires CMOS logic level inputs interface data out; this tristate output transfers diagnosis data control device; output will remain 3-stated unless device selected Chip-Select-Not (CSN); table diagnosis protocol interface data receives serial data from control device; serial data transmitted control word with Least Significant (LSB) being transferred first: input active pull down requires CMOS logic level inputs; will accept data falling edge CLK-signal; table input data protocol interface clock input; clocks shiftregister; internal active pull down requires CMOS logic level inputs
OUTH1
OUTL1
OUTL2 OUTH2 OUTH3
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Definitions Functions (cont'd) Symbol Function Output voltage regulator; logic supply, block with 100nF external ceramic capacitor directly external capacitor Receive data output; Transmit data input; integrated pull Pulse width control; high side switch Oscillator input; time base power reset, watchdog window stand timer HS3, program connect external resistor
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Functional Block Diagram
OUTL1 Charge Pump Drive OUTL2 Drive Protection Drive Switch Fail Detect OUTH2 Drive OUTH3 Drive OUTH1
UVLO
Timer Reset Generator Window Watchdog Standby Sleep Control
Band
Fail Management
CANH CANL
Output Stage Output Stage
Driver Temp. Protect Input Stage
Filter
Receiver
Fail Detect
Figure
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Circuit Description
6262 monolithic which incorporates failure tolerant speed CANtransceiver differential mode data transmission, dropout voltage regulator internal external supply well interface control monitor Further there integrated three high side switches, side switches, window watchdog circuit reset circuit. Both, window watchdog reset function referring time base that programmable external resistor. Figure shows block schematic diagram 6262 Table mode truth table Feature Reset Watchdog transmit receive OUTHS OUTHS OUTHS OUTHS3-auto timing3) OUTLS OUTLS
normal mode ON1)
Receive-only mode ON1)
VBAT stand-by mode ON1) OFF2)
output current only active when watchdog undercurrent function activated wake-up monitored setting output only active when selected also active when driven input automatically disabled when reset occurs automatically disabled when reset watchdog reset respectively, occurs watchdog disabled undercurrent function
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Transceiver 6262 optimized speed data transmission kbaud automotive applications. Normally differential signal transmitted received respectively. When wiring failure (see table detected device automatically switches dedicated CANH CANL single-wire mode maintain communication necessary. Therefore equipped with differential receiver four single ended comparators (two each line). avoid false triggering external influences single wire modes activated after certain delay time. soon failure disappears transceiver switches back differential mode after another time delay. failures monitored diagnosis protocol SPI. Therefore possible distinguish failures failure groups bits (see table reduce caused transceiver dynamic slopes CANL CANH signals both limited symmetric. This allows unshielded twisted parallel pair wires bus. During single-wire transmission (bus-failure) performance system degraded from differential mode. differential receiver threshold typ. -2.8 This ensures correct reception normal operation mode well failure cases with noise margin high possible. When failures detected, defective wire disabled switching affected termination output stage. CAN-transceiver offers three different operation modes that controlled SPI: normal operation mode, Receive-only mode Vbat stand-by mode. Please state diagram (figure Vbat stand-by mode output voltage switched case wake-up lines lines respectively, 6262 automatically sets output LOW. send respectively receive messages CAN-transceiver normal operation mode receive-only mode microcontroller. When reset occurs transceiver circuit automatically switched Vbat-stand-by mode because input bits automatically this event. thermal shutdown CAN-transceiver circuit monitored diagnosis
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Start Power
Normal Mode NSTB
NSTB
NSTB
RxD-Only NSTB
NSTB
NSTB
Vbat Stand-By NSTB
NSTB
NSTB
To-Sleep Mode NSTB
Figure State Diagram
Dropout Voltage Regulator 6262 able drive external loads output voltage tolerance less than addition regulator circuit drives internal loads like CANtransceiver circuit. external reverse current protection recommended prevent output capacitor from being discharged negative transients input voltage. Stability output voltage guaranteed output capacitors CVCC Nevertheless applications require much larger output capacitance buffer output voltage case input voltage negative transients. Furthermore function e.g. reset 3V-supervisor circuit supported larger output capacitance because their reaction times. Therefore output capacitance CVCC recommended.
version: 2.00 date: 2000-01-23
Preliminary Data 6262
(serial peripheral interface) 16-bit wide programming word input word (see table read data input this synchronized with clock input supplied diagnosis word appears synchronously data output (see table transmission cycle begins when chip selected chip select input After input returns from word that been read becomes control word. output switches tristate status this point. details timing please refer figure Oscillator internal delay times referring internal oscillator frequency, which external resistor from GND. oscillator frequency resulting internal cycling time calculated equations:
Window Watchdog, Reset 3V-Supervisor When output voltage exceeds reset threshold voltage reset output switched HIGH after delay time cycles. This necessary defined start microcontroller when application switched soon under-voltage condition output voltage (VCC VRT) appears, reset output switched again. signal guaranteed down output voltage Please refer fig.11, reset timing diagram. Should output voltage fall short 3V-supervisor threshold internal flipflop LOW. diagnosis monitors this. normal operation this flip-flop activated input This feature useful e.g. monitor that data microcontroller might damaged application connected first time. After above described delayed reset (LOW HIGH transition window watchdog circuit started opening long open window cycles. microcontroller service watchdog trigger signal interface (input watchdog trigger detected falling edge sampling cycles HIGH followed cycles input long open window ensures simple fast
version: 2.00 date: 2000-01-23
Preliminary Data 6262
synchronization 6262 watchdog timing watchdog services microcontroller. After first trigger watchdog serviced meeting open window cycles that follows closed window cycles. correct watchdog service immediately results starting next closed window. Please refer fig. watchdog timing diagram. trigger signal does meet open window (trigger early late) reset output period cycles. Afterwards long open window started again. addition, diagnosis HIGH monitor watchdog reset. Both, undervoltage reset watchdog reset setting input bits LOW. avoid cyclic wake-up microcontroller power mode (sleep mode) watchdog circuit automatically disabled output currents (ICC ICCWD). activate this feature input HIGH. this under-current mode side switches switched automatically 6262 guarantee failsave operation application. When microcontroller returns back normal mode (ICC ICCWD) first closed window transformed open window that total open window time cycles. This ensures more simple fast synchronization 6262 watchdog timing watchdog services microcontroller. High Side Switch high side output OUTH1 able switch loads on-resistance typ. 25°C. This switch controlled either input input When input used enabled setting input HIGH. case both control inputs being active signal masked signal (see fig. High Side Switch Timing Diagram). diagnosis monitors thermal shutdown switches, whereas flags thermal prewarning. this microcontroller able reduce power dissipation 6262 switching functions minor priority before temperature threshold thermal shutdown reached. Further OUTH1 protected against short circuit overload. diagnosis indicates overload OUTH1. soon under-voltage condition supply voltage VUVOFF), switches automatically disabled under-voltage lockout circuit. This flagged diagnosis Moreover switches disabled when reset occurs. High Side Switch high side output OUTH2 able switch loads on-resistance typ. 25°C. This switch controlled input
version: 2.00 date: 2000-01-23
Preliminary Data 6262
diagnosis monitors thermal shutdown switches, whereas flags thermal prewarning. this microcontroller able reduce power dissipation 6262 switching functions minor priority before temperature threshold thermal shutdown reached. soon under-voltage condition supply voltage VUVOFF), switches automatically disabled under-voltage lockout circuit. This flagged diagnosis Moreover switches disabled when reset occurs. High Side Switch high side output OUTH3 able switch loads on-resistance typ. 25°C. This switch controlled input bits supply external wake-up circuits power mode (sleep mode Vbat-stand-by mode), output OUTH3 periodically activated internal oscillator circuit. activating this feature input bits have HIGH. autotiming period internal cycle times; on-time cycles. case watchdog reset autotiming period shorter. diagnosis monitors thermal shutdown switches, whereas flags thermal prewarning. this microcontroller able reduce power dissipation 6262 switching functions minor priority before temperature threshold thermal shutdown reached. soon under-voltage condition supply voltage VUVOFF), switches automatically disabled under-voltage lockout circuit. This flagged diagnosis Moreover switches disabled when reset occurs. Side Switches side outputs OUTL1 OUTL2 able switch loads Their on-resistance (typ.) 25°C. This switches controlled input bits case high inrush currents built zener circuit (typ. activates switches protect them. diagnosis monitors thermal shutdown switches, whereas flags thermal prewarning. this microcontroller able reduce power dissipation 6262 switching functions minor priority before temperature threshold thermal shutdown reached. diagnosis bits giving feedback about current status OUTL1/OUTL2. soon undervoltage condition supply voltage VUVOFF), switches automatically disabled under-voltage lockout circuit. This flagged diagnosis addition outputs OUTL1 OUTL2 also disabled when watchdog switched undercurrent state when reset occurs.
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Table Input Data Protocol used used used used Enable Enable Transmit Stand-By Watchdog Control Supervisor Enable LS-Switch LS-Switch Auto Timing HS-Switch HS-Switch HS-Switch Watchdog Trigger
Table Diagnosis Data Protocol Thermal Shutdown Transceiver Thermal Shutdown Switches Failure Failure Failure Failure Failure Failure Status Status used Undervoltage Lockout Window Watchdog Reset Overload Temperature Prewarning
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Table line failure cases (according 11519-2) failure failure description CANL line interrupted CANH line interrupted CANL shorted Vbat, CANL CANH shorted CANL shorted CANH shorted Vbat; CANH CANL shorted CANH
failure) CANL shorted Vcc; CANL
failure) CANH shorted Vcc; CANH
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Electrical Characteristics Absolute Maximum Ratings Symbol Limit Values min. max. Unit Remarks
Parameter
Voltages Supply voltage Supply voltage Regulator output voltage input voltage (CANH, CANL) input voltage (CANH, CANL)
VCANH/L VCANH/L
-0.3 -0.3 -0.3 -0.3
0.5s; tp/T
0.5s; tp/T human body model; 100pF, 1.5k human body model; 100pF, 1.5k
Logic input voltages (DI, CLK, CSN, OSC, PWM, TxD) Logic output voltage (DO, RxD) Termination input voltage (RTH, RTL) Electrostatic discharge voltage CANH, CANL Electrostatic discharge voltage Currents Output current; Output current; OUTH1 Output current; OUTH2 Output current; OUTH3 Output current; OUTL1 Output current; OUTL2
+0.3
VDO/RO/RD -0.3 VESD VESD
-0.3 -4000 -2000
+0.3
+0.3 4000 2000
IOUTH1 IOUTH2 IOUTH3 IOUTL1 IOUTL2
-0.7 -0.5 -0.2 -0.2
internally limited internally limited 0.5s; tp/T 0.5s; tp/T 0.5s; tp/T 0.5s; tp/T
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Preliminary Data 6262
Absolute Maximum Ratings (cont'd) Symbol Limit Values min. max. Unit Remarks
Parameter
Temperatures Junction temperature Storage temperature
Tstg
Note: Maximum ratings absolute ratings; exceeding these values cause irreversible damage integrated circuit.
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Operating Range Symbol Limit Values min. max. V/µs
After rising above Outputs tristate Outputs tristate
Parameter Supply voltage Supply voltage slew rate Supply voltage increasing Supply voltage decreasing Logic input voltage (DI, CLK, CSN, PWM, TxD) Output current Output current Output capacitor clock frequency OSC-Adjust Resistor Junction temperature Thermal Resistances Junction Junction ambient
Unit
Remarks
-0.5 -0.3 -0.3 -0.3
fCLK ROSC
0.1s
Ta=-40°C; 10kHz
Rthj-pin Rthj-a
measured
Thermal Prewarning Shutdown (junction temperatures) Thermal prewarning temperature Thermal shutdown temp. Ratio temp.
TjPW TjSD
diagnosis word; hysteresis 30°K (typ.) hysteresis 30°K (typ.) hysteresis 10°K (typ.)
TjSD TjPW 1.05
Thermal shutdown temp. TjSD
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Electrical Characteristics
-100 normal mode; outputs open; CANtransceiver circuitry: voltages with respect ground; positive current defined flowing into pin; unless otherwise specified.
Parameter
Symbol
Limit Values min. typ. max.
Unit Test Condition
Quiescent current Current consumption Quiescent current
ISSB1 ISSB2
power mode; VS=12V; Tj=25°C active; sleep mode; VS=12V; Tj=25°C
ISSB1
Quiescent current
ISSB2
Voltage Regulator; Output voltage Output voltage Line regulation Load regulation
5.00
0.1mA ICC< 30mA 100µA 10mA 0.1mA ICC< 30mA; Vss; 22µF; 100Hz< <100kHz note
Power supply ripple rejection PSRR Output current limit Drop voltage
0.15 0.45
ICCmax
Oscillator; Oscillating frequency Internal cycling time (1/32 fOSC)-1
fOSC tCYL
62.8
ROSC 453k ROSC 453k
measured when output voltage dropped from nominal value obtained 13.5 input voltage
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Electrical Characteristics (cont'd)
-100 normal mode; outputs open; CANtransceiver circuitry: voltages with respect ground; positive current defined flowing into pin; unless otherwise specified.
Parameter
Symbol
Limit Values min. typ. max.
Unit Test Condition
Reset Generator; Reset threshold voltage Reset output voltage
4.65
(VCC VRT) (IRO
Reset high output voltage Reset pull current Reset reaction time Reset delay time cyl.)
VCC+
10.2
ROSC 453k
Supervisor; (bit diagnosis word) Supervisor threshold voltage Supervisor reaction time
diagnosis
Watchdog Generator
Closed window time cyl.) Open window time cyl.) Watchdog reset-puls time tWDR
Watchdog trigger time cyl.) Watchdog activating current
10.2
12.3 12.7
ROSC 453k ROSC 453k ROSC 453k ROSC 453k Watchdog when ICCWD SPIinput
ICCWD
Watchdog activating current hysteresis
ICCWDhys
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Electrical Characteristics (cont'd)
-100 normal mode; outputs open; CANtransceiver circuitry: voltages with respect ground; positive current defined flowing into pin; unless otherwise specified.
Parameter Long open window cyl.)
Symbol
Limit Values min. typ. 16.2 max. 20.4 12.2
Unit Test Condition
ROSC 453k sleep mode OFF) normal mode
ICCWDhys
Switches Under-Voltage Lockout (bit diagnosis word) UV-Switch-ON voltage UV-Switch-OFF voltage UV-ON/OFF-Hysteresis
4.50
5.35 4.85
6.00 5.20
increasing decreasing
High Side Output OUTH1; (controlled input word) Static Drain-Source ON-Resistance; IOUTH1 -0.25 Active zener voltage
RDSON
-0.5 -0.3 -0.5
IOUTH1 0.25 IOUTH1 0.25 VOUTH1 OUTH1; OUTH1;
VOUTH1 Clamp diode forward voltage VOUTH1 Leakage current IOLH1 Switch delay time tdONH1
Switch delay time Overcurrent shutdown threshold Shutdown delay time Current limit
-5.0 -100
-3.0
tdOFFH1 ISDH1 tdSDH1 IOCLH1
-1.0 -2.0
-0.6 -1.0
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Electrical Characteristics (cont'd)
-100 normal mode; outputs open; CANtransceiver circuitry: voltages with respect ground; positive current defined flowing into pin; unless otherwise specified.
Parameter
Symbol
Limit Values min. typ. max.
Unit Test Condition
Input control OUTH1; (high active) H-input voltage threshold L-input voltage threshold Hysteresis input voltage Pull down current Input capacitance
VIHY
*Vcc
*VCC
5.25
High Side Output OUTH2; (controlled input word) Static Drain-Source ON-Resistance; IOUTH2 -0.25 Active zener voltage
RDSON
-0.5
IOUTH2 0.25 IOUTH2 0.25 VOUTH2 high OUTH2; high OUTH2;
VOUTH2 Clamp diode forward voltage VOUTH2 Leakage current IOLH1 Switch delay time tdONH1
Switch delay time
-5.0 -100
-3.0
tdOFFH1
High Side Output OUTH3; (controlled input word) Static Drain-Source ON-Resistance; IOUTH3 -0.15 Active zener voltage
RDSON
-0.5
IOUTH3 0.15 IOUTH3 0.15 VOUTH3
VOUTH3 Clamp diode forward voltage VOUTH3 Leakage current IOLH3
-5.0 -100
-3.0
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Electrical Characteristics (cont'd)
-100 normal mode; outputs open; CANtransceiver circuitry: voltages with respect ground; positive current defined flowing into pin; unless otherwise specified.
Parameter Leakage current Switch delay time Switch delay time Auto time period (128 cyl.) Auto time duty cycle cyl.)
Symbol
Limit Values min. typ. 1/64 max.
Unit Test Condition
VOUTH3 high OUTH3; high OUTH3; ROSC 453k; SPI-bit reset referring tPH3
IOLH3 tdONH3 tdOFFH3 tPH3
D.C.
Side Output OUTL1 (bit input word) Static Drain-Source ON-Resistance; IOUTL1 Active zener clamp voltage Leakage current Switch delay time Switch delay time
RDSON
IOUTL1 VOUTL1 85°C high OUTL1; high OUTL1;
VOUTL1 IOLL1 tdONL1 tdOFFL1
Side Output OUTL2 (bit input word) Static Drain-Source ON-Resistance; IOUTL2 Active zener clamp voltage Leakage current Switch delay time Switch delay time
RDSON
IOUTL2 VOUTL2 85°C high OUTL2; high OUTL2;
VOUTL2 IOLL2 tdONL2 tdOFFL2
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Electrical Characteristics (cont'd)
-100 normal mode; outputs open; CANtransceiver circuitry: voltages with respect ground; positive current defined flowing into pin; unless otherwise specified.
Parameter
Symbol
Limit Values min. typ. max.
Unit Test Condition
CAN-Transceiver Receiver Output HIGH level output voltage level output voltage Transmission Input HIGH level input voltage threshold level input voltage threshold HIGH level input current level input current Lines CANL, CANH Differential receiver recessive-to-dominant threshold voltage Differential receiver dominant-to-recessive threshold voltage CANH recessive output voltage CANL recessive output voltage CANH dominant output voltage
250µA
1.25mA
-140 -600
-200
VdRxD(rd)
-2.8
-2.5
-2.2
VdRxD(dr)
-3.1
-2.9
-2.5
VCANHr VCANLr VCANHd
VCC; RRTH VCC; RRTL ICANH
-1.4
-1.0
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Electrical Characteristics (cont'd)
-100 normal mode; outputs open; CANtransceiver circuitry: voltages with respect ground; positive current defined flowing into pin; unless otherwise specified.
Parameter
CANL dominant output voltage CANH output current
Symbol
Limit Values min. typ.
Unit Test Condition
ICANL VCANH sleep mode; VCANH VCANL sleep mode; VCANL normal operation mode
max.
VCANLd ICANH
-110
CANL output current
ICANL
Voltage detection threshold Vdet(th) short-circuit battery voltage CANH CANL CANH wake-up voltage threshold CANL wake-up voltage threshold
VWAKEH VWAKEL
CANH single-ended receiver VCANH threshold CANL single-ended receiver threshold CANL leakage current CANH leakage current
failure cases failure case
VCANL ICANLl ICANHl
VCANL 13.5 V;VS VCANH
Termination Outputs RTL, switch-on resistance switch series resistance
RRTL RoRTL
VBAT-stand-by
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Electrical Characteristics (cont'd)
-100 normal mode; outputs open; CANtransceiver circuitry: voltages with respect ground; positive current defined flowing into pin; unless otherwise specified.
Parameter
ground switch-on resistance output voltage pull-down current pull-up current leakage current leakage current
Symbol
Limit Values min. typ.
Unit Test Condition
max.
RRTH VoRTH IRTHpd IRTLpu IRTL,I IRTH,I
-120
Vbat-stand-by mode failure cases failure cases VRTL 13.5 V;VS VRTH V;Tj
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Electrical Characteristics (cont'd)
-100 normal mode; outputs open; CANtransceiver circuitry: voltages with respect ground; positive current defined flowing into pin; unless otherwise specified.
Parameter
Symbol
Limit Values min. typ. max.
Unit Test Condition
CAN-Transceiver Dynamic Characteristics CANH CANL output transition time recessive-todominant CANH CANL output transition time dominant-torecessive Minimum dominant time wake-up CANL CANH Failure cases detection time Failure case detection time Failure cases recovery time Failure cases recovery time Failure cases detection time Failure cases detection time Failure cases detection time Failure cases recovery time
90%; 90%; stand-by mode; 13.5
twu(min) tfail
stand-by modes; 13.5 stand-by modes; 13.5 stand-by modes; 13.5
tfail
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Electrical Characteristics (cont'd)
-100 normal mode; outputs open; CANtransceiver circuitry: voltages with respect ground; positive current defined flowing into pin; unless otherwise specified.
Parameter
Symbol
Limit Values min. typ.
Unit Test Condition
failures failure cases failure failure cases failure cases =100 failure cases =100 failures failure cases failure failure cases failure cases failure cases
max.
Propagation delay tPD(L) TxD-to-RxD (recessive dominant)
Propagation delay tPD(H) TxD-to-RxD HIGH (dominant recessive)
Edge-count difference (falling edge) between CANH CANL failure cases detection Edge-count difference (rising edge) between CANH CANL failure cases recovery permanent dominant disable time
tTxD
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Electrical Characteristics (cont'd)
-100 normal mode; outputs open; CANtransceiver circuitry: voltages with respect ground; positive current defined flowing into pin; unless otherwise specified.
Parameter
Symbol
Limit Values min. typ. max.
Unit Test Condition
SPI-Interface Logic Inputs H-input voltage threshold L-input voltage threshold Hysteresis input voltage Pull current Pull down current Input capacitance CSN, Logic Output H-output voltage level L-output voltage level Tri-state leakage current Tri-state input capacitance
VIHY IICSN IICLK/DI
-100
VCSN
5.25
VDOH VDOL IDOLK
IDOH
IDOL VCSN VCSN 5.25
Data Input Timing Clock period Clock high time Clock time Clock before
tpCLK tCLKH tCLKL tbef
1000
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Electrical Characteristics (cont'd)
-100 normal mode; outputs open; CANtransceiver circuitry: voltages with respect ground; positive current defined flowing into pin; unless otherwise specified.
Parameter setup time setup time Clock after high setup time hold time Input signal rise time Input signal fall time Data Output Timing rise time fall time enable time disable time valid time
Symbol
Limit Values min. typ. max.
Unit Test Condition
tlead tlag tbeh tDISU tDIHO trIN tfIN
trDO tfDO tENDO tDISDO tVADO
impedance high impedance VCC; 0.7VCC;
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Timing Diagrams
High rising edge CLK: enabled. Status information transfered Output Shift Register
time High: Data from Shift-Register transfered Output Power Switches
actual Data
Data
Data will accepted falling edge CLK-Signal previous Status actual Status
State will change rising edge CLK-Signal
Data
actual Data
Figure Data Transfer Timing
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Figure SPI-Input Timing
Figure Turn OFF/ON Time
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Figure Valid Data Delay Time Valid Time
Figure Enable Disable Time
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Preliminary Data 6262
Figure High Side Switch1 Timing Diagram
input
(SPI input
HSSwitch1
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Figure Watchdog Time-out Definitions
closed window
open window
Figure Watchdog Timing Diagram
Trigger tLOW tCW+tOW tLOW tLOW tLOW
Reset
tWDR
Watchdog timer reset
normal operation
timeout long)
normal operation
timeout short)
normal operation
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Preliminary Data 6262
Figure Reset Timing Diagram
Trigger
tLOW
tLOW
tLOW
Reset
tWDR
Watchdog timer reset
diagnosis
start
HIGH
normal operation
undervoltage
start
activation microcontroller
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Application
Vbat
CANH CANL
OUTL2 OUTL1 OUTH3 OUTH2 OUTH1
6262
Figure Application Circuit
version: 2.00 date: 2000-01-23
Preliminary Data 6262
Package Outlines P-DSO-28-6 (Plastic Dual Small Outline Package)
Sorts Packing Package outlines tubes, trays etc. contained Data Book "Package Information". Dimensions
version: 2.00 date: 2000-01-23
GPS05123
Preliminary Data 6262
Edition 1999-10-12 Published Infineon Technologies St.-Martin-Strasse D-81541 Infineon Technologies AG1999 Rights Reserved.
Attention please! information herein given describe certain components shall considered warranted characteristics. Terms delivery rights technical change reserved. hereby disclaim warranties, including limited warranties non-infringement, regarding circuits, descriptions charts stated herein. Infineon Technologies approved CECC manufacturer. Information further information technology, delivery terms conditions prices please contact your nearest Infineon Technologies Office Germany Infineon Technologies Representatives worldwide (see address list). Warnings technical requirements components contain dangerous substances. information types question please contact your nearest Infineon Technologies Office. Infineon Technologies Components only used life-support devices systems with express written approval Infineon Technologies, failure such components reasonably expected cause failure that life-support device system, affect safety effectiveness that device system. Life support devices systems intended implanted human body, support and/or maintain sustain and/or protect human life. they fail, reasonable assume that health user other persons endangered.
version: 2.00 date: 2000-01-23

Overview Features 6262 Standard fault tolerant differential

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