µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY 16-BIT SINGLE-CHIP MI
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INTEGRATED CIRCUIT
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
16-BIT SINGLE-CHIP MICROCONTROLLERS
DESCRIPTION
µPD78F4216A/78F4218A
78F4216AY/78F4218AY
products
µPD784216A/784218A,
784216AY/784218AY Subseries 78K/IV Series. µPD78F4216A/78F4218A have flash memory place internal µPD784216A/784218A. incorporation flash memory allows program written erased while mounted target board. µPD78F4216AY/78F4218AY based µPD78F4216A/78F4218A Subseries with addition multimaster-supporting interface. Detailed function descriptions provided following user's manuals. sure read them before designing. µPD784216A, 784216AY Subseries User's Manual Hardware: U13570E µPD784218A, 784218AY Subseries User's Manual Hardware: U12970E 78K/IV Series User's Manual Instructions: U10905E
FEATURES
compatible with mask products Flash memory: (µPD78F4216A/78F4216AY) (µPD78F4218A/78F4218AY) Internal RAM: 8,192 bytes (µPD78F4216A/78F4216AY) 12,800 bytes (µPD78F4218A/78F4218AY) Supply voltage:
APPLICATIONS
Cellular phones, PHS, cordless telephones, CD-ROM, equipment
Unless otherwise specified, references this document µPD78F4218AY refer µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY.
information this document subject change without notice. Before using this document, please confirm that this latest version.
devices/types available every country. Please check with local representative availability additional information.
Document U14125EJ1V0DS00 (1st edition) Date Published November 2000 CP(K) Printed Japan
2000
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
ORDERING INFORMATION
Part Number Package 100-pin plastic LQFP (fine pitch) 100-pin plastic 100-pin plastic LQFP (fine pitch) 100-pin plastic 100-pin plastic LQFP (fine pitch) 100-pin plastic 100-pin plastic LQFP (fine pitch) 100-pin plastic Internal (Bytes) Internal (Bytes) 8,192 8,192 12,800 12,800 8,192 8,192 12,800 12,800
µPD78F4216AGC-8EU µPD78F4216AGF-3BA µPD78F4218AGC-8EU µPD78F4218AGF-3BA µPD78F4216AYGC-8EU µPD78F4216AYGF-3BA µPD78F4218AYGC-8EU µPD78F4218AYGF-3BA
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
78K/IV SERIES LINEUP
Products mass-production Products under development Supports Supports multimaster
PD784038Y PD784038
PD784225Y PD784225
80-pin, correction added Supports multimaster
Standard models
PD784026
Enhanced converter, 16-bit timer, power management
Enhanced internal memory capacity Pin-compatible with PD784026 Supports multimaster
PD784216AY PD784216A
100-pin, enhanced internal memory capacity
µPD784218AY PD784218A
Enhanced internal memory capacity, correction added
PD784054 PD784046
ASSP models
PD784956A
inverter control
On-chip 10-bit converter
PD784967
Enhanced functions PD784938A, enhanced internal memory capacity.
PD784938A
Enhanced functions PD784908, enhanced internal memory capacity, correction added. Supports multimaster
PD784908
On-chip IEBuscontroller
PD784928Y µPD784915
Software servo control On-chip analog circuit VCRs Enhanced timer
PD784928
Enhanced functions PD784915
µPD784976
On-chip controller/driver
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
OVERVIEW FUNCTIONS (1/2)
Part Number Item Number basic instructions (mnemonics) General-purpose registers Minimum instruction execution time bits registers banks, bits registers banks (memory mapping) ns/320 ns/640 ns/1,280 ns/2,560 (@fXX 12.5 operation with main system clock) (@fXT 32.768 operation with subsystem clock) 8,192 bytes 12,800 bytes
µPD78F4216A, µPD78F4216AY
µPD78F4218A, µPD78F4218AY
Internal memory Memory space ports
Flash memory
with program data spaces combined Total CMOS input CMOS N-ch open-drain bits bits Timer/event counter: (16-bit) Timer counter Pulse output Capture/compare register output Square wave output One-shot pulse output Pulse output output Square wave output Pulse output output Square wave output Pulse output output Square wave output Pulse output output Square wave output Pulse output output Square wave output Pulse output output Square wave output
Pins with additional functionsNote
Pins with pull-up resistor direct drive output Middle-voltage
Real-time output port Timer/event counter
Timer/event counter Timer counter (8-bit) Compare register Timer/event counter Timer counter (8-bit) Compare register Timer/event counter Timer counter (8-bit) Compare register Timer/event counter Timer counter (8-bit) Compare register Timer/event counter Timer counter (8-bit) Compare register Timer/event counter Timer counter (8-bit) Compare register Serial interface converter converter
UART/IOE (3-wire serial I/O): channels (on-chip baud rate generator) (3-wire serial I/O, multimaster supporting busNote channel 8-bit resolution channels 8-bit resolution channels
Notes Pins with additional functions included with pins. µPD78F4216AY, 78F4218AY only
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
OVERVIEW FUNCTIONS (2/2)
Part Number Item Clock output Buzzer output Watch timer Watchdog timer Standby Interrupt Hardware sources Software sources Non-maskable Maskable
µPD78F4216A, µPD78F4216AY
µPD78F4218A, µPD78F4218AY
Selectable from fXX, fXX/2, fXX/2 fXX/2 fXX/2 fXX/2 fXX/2 fXX/2 Selectable from fXX/2 fXX/2 fXX/2 fXX/2 channel channel HALT/STOP/IDLE modes power consumption mode (with subsystem clock): HALT/IDLE modes (internal: external: instruction, BRKCS instruction, operand error Internal: external: Internal: external: programmable priority levels service modes: Vectored interrupt/macro service/context switching
Supply voltage Package
100-pin plastic LQFP (fine pitch) 100-pin plastic
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
CONTENTS DIFFERENCES AMONG MODELS µPD784216A/784216AY, 784218A/784218AY SUBSERIES
CONFIGURATION (TOP VIEW) BLOCK DIAGRAM FUNCTIONS Port Pins Non-Port Pins Circuits Recommended Connections Unused Pins
INTERNAL MEMORY SIZE SWITCHING REGISTER (IMS) PROGRAMMING FLASH MEMORY. Selecting Communication Mode Flash Memory Programming Function Connecting Flashpro Flashpro
ELECTRICAL SPECIFICATIONS PACKAGE DRAWINGS RECOMMENDED SOLDERING CONDITIONS APPENDIX DEVELOPMENT TOOLS APPENDIX RELATED DOCUMENTS
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
DIFFERENCES AMONG MODELS µPD784216A/784216AY, 784218A/784218AY SUBSERIES
only difference among µPD784214A, 784215A, 784216A, 784217A, 784218A lies internal memory capacity. µPD784214AY, 784215AY, 784216AY, 784217AY, 784218AY models with addition control function. µPD78F4216A, 78F4216AY, 78F4218A, 78F4218AY provided with KB/256 flash memory instead mask above models. These differences summarized Table 1-1. Table 1-1. Differences Among Models µPD784216A/784216AY, 784218A/784218AY Subseries
Part Number Item Internal
µPD784214A, µPD784214AY µPD784215A, µPD784215AY µPD784216A, µPD784216AY µPD784217A, µPD784217AY µPD784218A, µPD784218AY µPD78F4216A, µPD78F4216AY µPD78F4218A, µPD78F4218AY
(Mask ROM) 3,584 bytes
(Mask ROM)
(Mask ROM) 12,800 bytes
(Mask ROM)
(Flash memory) 8,192 bytes ProvidedNote
(Flash memory) 12,800 bytes
Internal
5,120 bytes
8,192 bytes
Internal memory size switching register (IMS) correction
provided
provided
Provided
provided provided
Provided
External access status function Supply voltage Electrical specifications Recommended soldering conditions
provided
Provided
Provided
Refer data sheet each device.
provided
Provided
provided provided Provided
Provided
TEST
Provided provided
Note internal flash memory capacity internal capacity changed using internal memory size switching register (IMS). Caution There differences noise immunity noise radiation between flash memory mask versions. When pre-producing application with flash memory version then mass-producing with mask version, sure conduct sufficient evaluations commercial samples (not engineering samples) mask version.
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
CONFIGURATION (TOP VIEW)
100-pin plastic LQFP (fine pitch)
µPD78F4216AGC-8EU, µPD78F4218AGC-8EU, µPD78F4216AYGC-8EU, µPD78F4218AYGC-8EU
P30/TO0 P103/TI8/TO8 P102/TI7/TO7 P101/TI6/TO6 P100/TI5/TO5
P37/EXANote P36/TI01 P35/TI00 P34/TI2 P33/TI1
P67/ASTB P66/WAIT
P32/TO2 P31/TO1
P120/RTP0 P121/RTP1 P122/RTP2 P123/RTP3 P124/RTP4 P125/RTP5 P126/RTP6 P127/RTP7 RESET P00/INTP0 P01/INTP1 P02/INTP2/NMI P03/INTP3 P04/INTP4 P05/INTP5 P06/INTP6 AVDDNote AVREF0 P10/ANI0 P62/A18 P61/A17 P60/A16 P57/A15 P56/A14 P55/A13 P54/A12 P53/A11 P52/A10 P51/A9 P50/A8 P47/AD7 P46/AD6 P45/AD5 P44/AD4 P43/AD3 P42/AD2 P41/AD1 P40/AD0 P87/A7 P86/A6 P85/A5 P84/A4 P83/A3
P11/ANI1 P12/ANI2 P13/ANI3 P14/ANI4 P15/ANI5 P16/ANI6 P17/ANI7 AVSSNote P130/ANO0 P131/ANO1 AVREF1
P70/RxD2/SI2 P71/TxD2/SO2
P72/ASCK2/SCK2 P20/RxD1/SI1 P21/TxD1/SO1
P22/ASCK1/SCK1 P23/PCL P24/BUZ P25/SI0/SDA0Note
P80/A0 P81/A1
Notes Connect directly pull-down resistor normal operation mode. Connect pull-down resistor system which on-chip flash memory written while mounted target board. pull-down connection, recommended resistor with resistance ranging from Connect AVDD VDD. Connect AVSS VSS. SCL0 SDA0 pins available µPD78F4216AY, 78F4218AY only. available µPD78F4218A, 78F4218AY only.
Data Sheet U14125EJ1V0DS00
P26/SO0 P27/SCK0/SCL0Note
P82/A2
P65/WR P64/RD P63/A19
VPPNote
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
100-pin plastic
µPD78F4216AGF-3BA, µPD78F4218AGF-3BA, µPD78F4216AYGF-3BA, µPD78F4218AYGF-3BA
P55/A13 P54/A12 P53/A11 P52/A10 P51/A9 P50/A8 P47/AD7 P46/AD6 P45/AD5 P44/AD4 P43/AD3 P42/AD2 P41/AD1 P40/AD0 P87/A7 P86/A6 P85/A5 P57/A15 P56/A14
P60/A16 P61/A17 P62/A18 P63/A19 P64/RD P65/WR P66/WAIT P67/ASTB P100/TI5/TO5 P101/TI6/TO6 P102/TI7/TO7 P103/TI8/TO8 P30/TO0 P31/TO1 P32/TO2 P33/TI1 P34/TI2 P35/TI00 P36/TI01 P37/EXANote VPPNote P120/RTP0 P121/RTP1 P84/A4 P83/A3 P82/A2 P81/A1 P80/A0 P27/SCK0/SCL0Note P26/SO0 P25/SI0/SDA0Note P24/BUZ P23/PCL P22/ASCK1/SCK1 P21/TxD1/SO1 P20/RxD1/SI1 P72/ASCK2/SCK2 P71/TxD2/SO2 P70/RxD2/SI2 AVREF1 P131/ANO1 P130/ANO0 AVSSNote P17/ANI7 P16/ANI6 P15/ANI5 P14/ANI4 P13/ANI3 P12/ANI2 P11/ANI1 P10/ANI0 AVREF0 AVDDNote
P124/RTP4 P125/RTP5 P126/RTP6 P127/RTP7
Notes Connect directly pull-down resistor normal operation mode. Connect pull-down resistor system which on-chip flash memory written while mounted target board. pull-down connection, recommended resistor with resistance ranging from Connect AVDD VDD. Connect AVSS VSS. SCL0 SDA0 pins available µPD78F4216AY, 78F4218AY only. available µPD78F4218A, 78F4218AY only.
RESET P00/INTP0 P01/INTP1 P02/INTP2/NMI P03/INTP3 P04/INTP4 P05/INTP5 P06/INTP6
P122/RTP2 P123/RTP3
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
A19: AD7: ANI0 ANI7: ANO0, ANO1: ASCK1, ASCK2: ASTB: AVDD: AVREF0, AVREF1: AVSS: BUZ:
Note
Address Address/Data Analog Input Analog Output Asynchronous Serial Clock Address Strobe Analog Power Supply Analog Reference Voltage Analog Ground Buzzer Clock
P120 P127: P130, P131: PCL: RESET: RTP0 RTP7: RxD1, RxD2: SCK0 SCK2: SCL0Note SDA0Note SI2: SO2: TI00, TI01, TI1, TI2, TI8: TxD1, TxD2: VDD: VPP: VSS: WAIT: XT1, XT2:
Port Port Programmable Clock Read Strobe Reset Real-time Output Port Receive Data Serial Clock Serial Clock Serial Data Serial Input Serial Output Timer Input Transmit Data Power Supply Programming Power Supply Ground Wait Write Strobe Crystal (Main System Clock) Crystal (Subsystem Clock)
External Access Status Output Interrupt from Peripherals Non-maskable Interrupt Port Port Port Port Port Port Port Port Port Port Port
INTP0 INTP6: NMI: P06: P17: P27: P37: P47: P57: P67: P72: P87: P95: P100 P103:
TO2, TO8: Timer Output
Notes SCL0 SDA0 pins available µPD78F4216AY, 78F4218AY only. available µPD78F4218A, 78F4218AY only.
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
BLOCK DIAGRAM
INTP2/NMI INTP0, INTP1, INTP3 INTP6 TI00 TI01
Programmable interrupt controller Timer/event counter bits) Timer/event counter bits) Timer/event counter bits) Timer/event counter bits) Timer/event counter bits) Timer/event counter bits) Timer/event counter bits) Watch timer 78K/IV core
UART/IOE1 Baud-rate generator UART/IOE2 Baud-rate generator Clocked serial interface
RxD1/SI1 TxD1/SO1 ASCK1/SCK1 RxD2/SI2 TxD2/SO2 ASCK2/SCK2 SI0/SDA0Note SCK0/SCL0Note
TI5/TO5
WAIT ASTB EXANote
TI6/TO6
Flash memory Port Port Port Port Port Port
P100 P103 P120 P127 P130, P131 RESET
TI7/TO7
TI8/TO8
Watchdog timer
Port Port
RTP0 RTP7 NMI/INTP2 ANO0 ANO1 AVREF1 AVSS P03/INTP3 ANI0 ANI7 AVREF0 AVDD AVSS
Real-time output port
Port Port
converter
Port Port Port
converter Clock output control Buzzer output
System control
Notes This function supports interface available µPD78F4216AY, 78F4218AY only.
available µPD78F4218A, 78F4218AY only.
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
FUNCTIONS Port Pins (1/2)
Name Input Alternate Function INTP0 INTP1 INTP2/NMI INTP3 INTP4 INTP5 INTP6 ANI0 ANI7 Port (P1): 8-bit input only port Port (P2): 8-bit port Input/output specified 1-bit units. Whether specifying input mode output mode, on-chip pull-up resistor specified 1-bit units means software. Function Port (P0): 7-bit port Input/output specified 1-bit units. Whether specifying input mode output mode, on-chip pull-up resistor specified 1-bit units means software.
RxD1/SI1 TxD1/SO1 ASCK1/SCK1 SI0/SDA0Note SCK0/SCL0Note
TI00 TI01 EXANote
Port (P3): 8-bit port Input/output specified 1-bit units. Whether specifying input mode output mode, on-chip pull-up resistor specified 1-bit units means software.
Port (P4): 8-bit port Input/output specified 1-bit units. When used input port, on-chip pull-up resistor specified means software. LEDs driven directly. Port (P5): 8-bit port Input/output specified 1-bit units. When used input port, on-chip pull-up resistor specified means software. LEDs driven directly.
Notes
This SDA0 SCL0 available µPD78F4216AY, 78F4218AY only. This function available µPD78F4218A, 784218AY only.
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Port Pins (2/2)
Name Alternate Function WAIT ASTB RxD2/SI2 TxD2/SO2 ASCK2/SCK2 Port (P7): 3-bit port Input/output specified 1-bit units. Whether specifying input mode output mode, on-chip pull-up resistor specified 1-bit units means software. Port (P8): 8-bit port Input/output specified 1-bit units. Whether specifying input mode output mode, on-chip pull-up resistor specified 1-bit units means software. interrupt control flag (KRIF) when falling edge detected this port. Port (P9): N-ch open-drain middle-voltage port 6-bit port Input/output specified 1-bit units. LEDs driven directly. Port (P10): 4-bit port Input/output specified 1-bit units. Whether specifying input mode output mode, on-chip pull-up resistor specified 1-bit units means software. Port (P12): 8-bit port Input/output specified 1-bit units. Whether specifying input mode output mode, on-chip pull-up resistor specified 1-bit units means software. Port (P13): 2-bit port Input/output specified 1-bit units. Function Port (P6): 8-bit port Input/output specified 1-bit units. When used input port, on-chip pull-up resistor specified means software.
P100 P101 P102 P103 P120 P127
TI5/TO5 TI6/TO6 TI7/TO7 TI8/TO8
RTP0 RTP7
P130, P131
ANO0, ANO1
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Non-Port Pins (1/2)
Name TI00 TI01 RxD1 RxD2 TxD1 TxD2 ASCK1 ASCK2 SDA0 SCK0 SCK1 SCK2 SCL0 INTP0 INTP1 INTP2 INTP3 INTP4 INTP5 INTP6
Note Note
Input
Alternate Function P100/TO5 P101/TO6 P102/TO7 P103/TO8
Function External count clock input 16-bit timer counter Capture trigger signal input capture/compare register External count clock input 8-bit timer counter External count clock input 8-bit timer counter External count clock input 8-bit timer counter External count clock input 8-bit timer counter External count clock input 8-bit timer counter External count clock input 8-bit timer counter 16-bit timer output (shared 14-bit output) 8-bit timer output (shared 8-bit output)
Output
P100/TI5 P101/TI6 P102/TI7 P103/TI8
Input
P20/SI1 P70/SI2
Serial data input (UART1) Serial data input (UART2) Serial data output (UART1) Serial data output (UART2) Baud rate clock input (UART1) Baud rate clock input (UART2) Serial data input (3-wire serial Serial data input (3-wire serial Serial data input (3-wire serial Serial data output (3-wire serial Serial data output (3-wire serial Serial data output (3-wire serial Serial data input/output bus) Serial clock input/output (3-wire serial Serial clock input/output (3-wire serial Serial clock input/output (3-wire serial Serial clock input/output bus) Non-maskable interrupt request input External interrupt request input
Output
P21/SO1 P71/SO2
Input
P22/SCK1 P72/SCK2
Note
Input
P25/SDA0 P20/RxD1 P70/RxD2
Output
P21/TxD1 P71/TxD2
P25/SI0 P27/SCL0Note P22/ASCK1 P72/ASCK2 P27/SCK0
Input
P02/INTP2 P02/NMI
Note This function available µPD78F4216AY, 78F4218AY only.
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Non-Port Pins (2/2)
Name RTP0 RTP7 WAIT ASTB EXANote RESET ANI0 ANI7 ANO0, ANO1 AVREF0 AVREF1 AVDD AVSS Input Output Output Input Input Input Input Output P130, P131 converter analog input converter analog output converter reference voltage input converter reference voltage input converter positive power supply. Connect VDD. converter converter. Connect VSS. Positive power supply Flash memory programming mode setting. Applying high-voltage program write/verify. Connect this directly pull-down resistor normal operation mode. Connect pull-down resistor system which on-chip flash memory written while mounted target board. pull-down connection, recommended resistor with resistance ranging from Connecting crystal resonator subsystem clock oscillation Output Output Output Output Output Alternate Function P120 P127 Function Clock output (for trimming main system clock subsystem clock) Buzzer output Real-time output port that outputs data synchronization with trigger Lower address/data expanding memory externally Lower address expanding memory externally Middle address expanding memory externally Higher address expanding memory externally Strobe signal output reading from external memory Strobe signal output writing external memory Wait insertion external memory access Strobe output that externally latches address information output ports through access external memory Status signal output external memory access System reset input Connecting crystal resonator main system clock oscillation
Note available µPD78F4218A, 78F4218AY only.
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Circuits Recommended Connections Unused Pins
circuit type each recommended connections unused pins shown Table 4-1. each type input/output circuit, refer Figure 4-1. Table 4-1. Types Circuits Recommended Connection Unused Pins (1/2)
Name P00/INTP0 P01/INTP1 P02/INTP2/NMI P03/INTP3 P06/INTP6 P10/ANI0 P17/ANI7 P20/RxD1/SI1 P21/TxD1/SO1 P22/ASCK1/SCK1 P23/PCL P24/BUZ P25/SI0/SDA0Note P26/SO0 P27/SCK0/SCL0
Note
Circuit Type
Recommended Connection Unused Pins Input: Independently connect resistor Output: Leave open
10-K 10-L 10-K 10-L
Input
Connect Input: Independently connect resistor Output: Leave open
10-K 10-L 10-K 12-E 10-M 12-E
P30/TO0 P32/TO2 P33/TI1, P34/TI2 P35/TI00, P36/TI01 P37/EXA
Note
P40/AD0 P47/AD7 P50/A8 P57/A15 P60/A16 P63/A19 P64/RD P65/WR P66/WAIT P67/ASTB P70/RxD2/SI2 P71/TxD2/SO2 P72/ASCK2/SCK2 P80/A0 P87/A7 P100/TI5/TO5 P101/TI6/TO6 P102/TI7/TO7 P103/TI8/TO8 P120/RTP0 P127/RTP7 P130/ANO0, P131/ANO1
10-M 12-E 13-D
12-E 12-F
Notes SDA0 SCL0 pins available µPD78F4216AY, 78F4218AY only. available µPD78F4218A, 78F4218AY only.
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Table 4-1. Types Circuits Recommended Connection Unused Pins (2/2)
Name RESET AVREF0 AVREF1 AVDD AVSS Connect Connect this directly pull-down resist normal operation mode. Connect pull-down resistor system which on-chip flash memory written while mounted target board. pull-down connection, recommended resistor with resistance ranging from Circuit Type Input Connect Leave open Connect Connect Recommended Connection Unused Pins
Remark Because circuit type numbers standardized among Series products, they sequential some models (i.e., some circuits provided).
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Figure 4-1. Types Circuits (1/2)
Type Type 10-K
Pullup enable Data P-ch
P-ch
IN/OUT Open drain Output disable Schmitt-triggered input with hysteresis characteristics N-ch
Type
Type 10-L
Pullup enable Data P-ch
P-ch
Pullup enable Data IN/OUT P-ch
P-ch
IN/OUT Open drain Output disable N-ch
Output disable
N-ch
Input enable Type Type 10-M
Pullup enable Data P-ch
P-ch
Pullup enable Data IN/OUT P-ch
P-ch
IN/OUT Output disable N-ch
Output disable
N-ch
Type
Type 12-E
P-ch N-ch
Comparator
Pullup enable Data P-ch
P-ch
VREF (Threshold voltage) Output disable Input enable Input enable P-ch Analog output voltage N-ch
IN/OUT
N-ch
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Figure 4-1. Types Circuits (2/2)
Type 12-F Data P-ch IN/OUT Output disable Input enable N-ch P-ch N-ch
Type Feedback cut-off P-ch
Analog output voltage
Type 13-D IN/OUT Data Output disable N-ch
P-ch
Middle-voltage input buffer
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
INTERNAL MEMORY SIZE SWITCHING REGISTER (IMS)
register that software used specify part internal memory that used. setting this register, internal memory µPD78F4218AY mapped identically that mask version with different internal memory (ROM RAM) capacity. with 8-bit memory manipulation instruction. RESET input sets FFH. µPD78F4216A, 78F4216AY Figure 5-1. Internal Memory Size Switching Register (IMS) Format Address: 0FFFCH
After reset:
ROM1
ROM0 RAM1 RAM0
ROM1
ROM0
Internal Capacity Selection
RAM1
RAM0 3,072 bytes 4,608 bytes 6,114 bytes 7,680 bytes
Peripheral Capacity Selection
Caution provided mask versions (µPD784214A, 784215A, 784216A, µPD784214AY, 784215AY, 784216AY). Table shows setting values make memory mapping same that mask versions. Table 5-1. Setting Value Internal Memory Size Switching Register (IMS)
Target Mask Version Setting Value
µPD784214A, 784214AY µPD784215A, 784215AY µPD784216A, 784216AY
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
µPD78F4218A, 78F4218AY Figure 5-2. Internal Memory Size Switching Register (IMS) Format Address: 0FFFCH
After reset:
ROM1
ROM0 RAM1 RAM0
ROM1
ROM0
Internal Capacity Selection
RAM1
RAM0 3,072 bytes 6,656 bytes 7,168 bytes 12,288 bytes
Peripheral Capacity Selection
Caution provided mask versions (µPD784217A, 784218A, 784217AY, 784218AY). Table shows setting values make memory mapping same that mask versions. Table 5-2. Setting Value Internal Memory Size Switching Register (IMS)
Target Mask Version Setting Value
µPD784217A, 784217AY µPD784218A, 784218AY
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
PROGRAMMING FLASH MEMORY
flash memory written with µPD78F4218AY mounted target board (on-board). connect dedicated flash programmer (Flashpro (part number: FL-PR2), Flashpro (part number: FL-PR3, PGFP3) host machine target system. Writing flash memory also performed using flash memory writing adapter connected Flashpro Flashpro III. Remark FL-PR2 FL-PR3 products Naito Densei Machida Mfg. Co., Ltd.
Selecting Communication Mode
Select serial
write flash memory, Flashpro Flashpro serial communication. selected number pulses shown Table 6-1. Table 6-1. Communication Modes
Communication Mode 3-wire serial Number Channels Pins Used
communication mode from those listed Table format shown Figure 6-1. Each communication mode
Number Pulses
SCK0/P27/SCL0
Note
SO0/P26 Note SI0/P25/SDA0 SCK1/ASCK1/P22 SO1/TxD1/P21 SI1/RxD1/P20 SCK2/ASCK2/P72 SO2/TxD2/P71 SI2/RxD2/P70 Handshake
Note
SCK0/P27/SCL0
Note
SO0/P26 Note SI0/P25/SDA0 P24/BUZ UART TxD1/SO1/P21 RxD1/SI1/P20 TxD2/SO2/P71 RxD2/SI2/P70
Notes SCL0 SDA0 pins available µPD78F4216AY, 78F4218AY only. This made available µPD78F4216A, 78F4216AY (other than standard) This made available µPD78F4218A, 78F4218AY (other than standard) Caution sure select communication mode with number pulses shown Table 6-1.
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Figure 6-1. Communication Mode Selecting Format
pulses RESET Flash programming mode
Flash Memory Programming Function
flash memory written transferring receiving commands data selected communication mode. major functions flash memory programming listed Table 6-2. Table 6-2. Major Functions Flash Memory Programming
Function Batch erasure Block erasure Description Erases contents memory. Erases contents specified memory block with memory block consisting Checks erased status entire memory. Checks erased status specified block. Writes flash memory based write start address number data written bytes). Compares contents memory with input data. Compares contents specified memory block with input data.
Batch blank check Block blank check Data write
Batch verify Block verify
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Connecting Flashpro Flashpro
Flashpro Flashpro µPD78F4218AY connected differently depending selected communication mode (3-wire serial UART). communication modes. Figure 6-2. Connection Flashpro Flashpro 3-Wire Serial Mode Figures show connections respective
RESET Flashpro Flashpro SCK0 SCK1 SCK2
PD78F4218AY
Figure 6-3. Connection Flashpro Handshake Mode
RESET SCK0 Flashpro
PD78F4218AY
Figure 6-4. Connection Flashpro Flashpro UART Mode
RESET Flashpro Flashpro RxD1 RxD2 TxD1 TxD2
PD78F4218AY
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings 25°C)
Parameter Supply voltage Symbol AVDD AVSS AVREF0 AVREF1 Input voltage Analog input voltage Output voltage Output current, Total Total P10, P12, Total pins Output current, high Total pins Operating ambient temperature Storage temperature converter reference voltage input converter reference voltage input Other than programming Analog input N-ch open drain Conditions Ratings -0.3 +6.5 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 +10.5 AVSS AVREF0 -0.3 +125 Unit
Tstg
Caution
Product quality suffer absolute maximum rating exceeded even momentarily parameter. That absolute maximum ratings rated values which product verge suffering physical damage, therefore product must used under conditions that ensure that absolute maximum ratings exceeded.
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Operating Conditions
Operating ambient temperature (TA): +85°C Supply voltage clock cycle time: Figure Operating voltage with subsystem clock operation: Figure 7-1. Supply Voltage Clock Cycle Time (CPU Clock Frequency: fCPU)
10,000
8,000
Clock cycle time tCYK [ns]
Guaranteed operating range
Supply voltage
Capacitance 25°C,
Parameter Input capacitance Symbol Unmeasured pins returned Conditions Other than Port Port Other than Port Port capacitance Other than Port Port MIN. TYP. MAX. Unit
Output capacitance
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Main System Clock Oscillator Characteristics +85°C)
Resonator Ceramic resonator crystal resonator Recommended Circuit
Parameter Oscillation frequency (fX)
Conditions
MIN.
TYP.
MAX. 12.5 6.25 3.125
Unit
External clock
input frequency (fX)
12.5 6.25 3.125
input high-/lowlevel width (tWXH, tWXL) input rising/falling time (tXR, tXF)
PD74HCU04
Cautions When using main system clock oscillator, wire follows area enclosed broken lines above figures avoid adverse effect from wiring capacitance. Keep wiring length short possible. cross wiring with other signal lines. route wiring near signal line through which high fluctuating current flows. Always make ground point oscillator capacitor same potential VSS. ground capacitor ground pattern through which high current flows. fetch signals from oscillator. When main system clock stopped system operated subsystem clock, subsystem clock should switched back main system clock after oscillation stabilization time secured program. Remark resonator selection oscillator constant, users required either evaluate oscillation themselves apply resonator manufacturer evaluation.
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Subsystem Clock Oscillator Characteristics +85°C)
Resonator Crystal resonator Recommended Circuit
Parameter Oscillation frequency (fXT) Oscillation stabilization timeNote
Conditions
MIN.
TYP. 32.768
MAX.
Unit
External clock
input frequency (fXT) input high-/lowlevel width (tXTH, tXTL)
PD74HCU04
14.3
15.6
Note Time required stabilize oscillation after applying supply voltage (VDD). Cautions When using subsystem clock oscillator, wire follows area enclosed broken lines above figures avoid adverse effect from wiring capacitance. Keep wiring length short possible. cross wiring with other signal lines. route wiring near signal line through which high fluctuating current flows. Always make ground point oscillator capacitor same potential VSS. ground capacitor ground pattern through which high current flows. fetch signals from oscillator. When main system clock stopped device operating subsystem clock, wait until oscillation stabilization time been secured program before switching back main system clock. Remark resonator selection oscillator constant, users required either evaluate oscillation themselves apply resonator manufacturer evaluation.
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Characteristics +85°C, AVDD AVSS (1/3)
Parameter Input voltage, Symbol VIL1 Note Conditions VIL2 P06, P20, P22, P33, P34, P70, P72, P100 P103, RESET (N-ch open drain) P17, P130, P131 VIL5 XT1, VIL6 P25, Input voltage, high VIH1 Note VIH2 P06, P20, P22, P33, P34, P70, P72, P100 P103, RESET (N-ch open drain) P17, P130, P131 VIH5 XT1, VIH6 P25, Output voltage, VOL1 pins other than P47, P57, Note P47, Note VOL2 Output voltage, high VOH1
Note Note Note
MIN. 0.7VDD 0.8VDD 0.8VDD 0.85VDD 0.7VDD 0.8VDD 0.7VDD 0.8VDD 0.8VDD 0.85VDD 0.7VDD 0.8VDD
TYP.
MAX. 0.3VDD 0.2VDD 0.2VDD 0.15VDD 0.3VDD 0.2VDD 0.3VDD 0.2VDD 0.2VDD 0.1VDD 0.3VDD 0.2VDD
Unit
VIL3
VIL4
VIH3
VIH4
Except XT1, XT1,
-100 Input leakage current, ILIL1 ILIL2 Input leakage current, high ILIH1 ILIH2 ILIH3 Output leakage current, Output leakage current, high ILOL1 ILOH1
Note
Except XT1, XT1,
(N-ch open drain) VOUT VOUT
Notes P21, P23, P24, P26, P32, P37, P47, P57, P67, P71, P87, P120 P127
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Characteristics +85°C, AVDD AVSS (2/3)
µPD78F4216A, 78F4216AY
Parameter Supply voltage Symbol IDD1 Operation mode Conditions 12.5 MHz, ±10% MHz, ±10% MHz, IDD2 HALT mode 12.5 MHz, ±10% MHz, ±10% MHz, IDD3 IDLE mode 12.5 MHz, ±10% MHz, ±10% MHz, IDD4 Operation modeNote kHz, ±10% kHz, ±10% kHz, kHz, IDD5 HALT modeNote kHz, ±10% kHz, ±10% kHz, kHz, IDD6 IDLE modeNote kHz, ±10% kHz, ±10% kHz, kHz, Data retention voltage Data retention current VDDDR IDDDR HALT, IDLE modes STOP mode ±10% Pull-up resistor MIN. TYP. MAX. Unit
Note When main system clock stopped subsystem clock operating. Remark Unless otherwise specified, characteristics alternate-function pins same those port pins.
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Characteristics +85°C, AVDD AVSS (3/3)
µPD78F4218A, 78F4218AY
Parameter Supply voltage Symbol IDD1 Operation mode Conditions 12.5 MHz, ±10% MHz, ±10% MHz, IDD2 HALT mode 12.5 MHz, ±10% MHz, ±10% MHz, IDD3 IDLE mode 12.5 MHz, ±10% MHz, ±10% MHz, IDD4 Operation modeNote kHz, ±10% kHz, ±10% kHz, kHz, IDD5 HALT modeNote kHz, ±10% kHz, ±10% kHz, kHz, IDD6 IDLE modeNote kHz, ±10% kHz, ±10% kHz, kHz, Data retention voltage Data retention current VDDDR IDDDR HALT, IDLE modes STOP mode ±10% Pull-up resistor MIN. TYP. MAX. Unit
Note When main system clock stopped subsystem clock operating. Remark Unless otherwise specified, characteristics alternate-function pins same those port pins.
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Characteristics +85°C, AVDD AVSS
Read/write operation (1/2)
Parameter Cycle time Symbol tCYK Conditions Address setup time ASTB) tSAST ±10% ±10% Address hold time (from ASTB) tHSTLA ±10% ±10% ASTB high-level width tWSTH ±10% ±10% Address hold time (from tHRA ±10% ±10% Delay time from address tDAR ±10% ±10% Address float time (from tFAR ±10% ±10% Data input time from address tDAID ±10% ±10% Data input time from ASTB tDSTID ±10% ±10% Data input time from tDRID MIN. (0.5 (0.5 (0.5 0.5T 0.5T 0.5T (0.5 (0.5 (0.5 0.5T 0.5T 0.5T (2.5 (2.5 (2.5 (1.5 (1.5 (1.5 0.5T 0.5T 0.5T TYP. MAX. Unit
±10% ±10%
Delay time from ASTB
tDSTR
±10% ±10%
Data hold time (from
tHRID
±10% ±10%
Remark tCYK 1/fXX (fXX: main system clock frequency) (during address wait), otherwise, Number waits
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Characteristics
Read/write operation (2/2)
Parameter Address active time from Symbol tDRA Conditions ±10% ±10% Delay time from ASTB tDRST ±10% ±10% low-level width tWRL ±10% ±10% Delay time from address tDAW ±10% ±10% Address hold time (from tHRD ±10% ±10% Delay time from ASTB data tDSTOD output ±10% ±10% Delay time from data tDWOD output ±10% ±10% Delay time from ASTB tDSTW ±10% ±10% Data setup time tSODWR ±10% ±10% Data hold time (from tHWOD ±10% 0.5T 0.5T 0.5T (1.5 (1.5 (1.5 0.5T 0.5T 0.5T 0.5T 0.5T 0.5T (1.5 (1.5 (1.5 MIN. 0.5T 0.5T 0.5T 0.5T 0.5T 0.5T (1.5 (1.5 (1.5 0.5T 0.5T 0.5T 0.5T 0.5T 0.5T 0.5T 0.5T 0.5T TYP. MAX. Unit
±10% Delay time from ASTB tDWST ±10% ±10% low-level width tWWL ±10% ±10%
Remark tCYK 1/fXX (fXX: main system clock frequency) (during address wait), otherwise, Number wait states
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Characteristics
External wait timing
Parameter Input time from address WAIT Symbol tDAWT Conditions ±10% ±10% Input time from ASTB WAIT tDSTWT ±10% ±10% Hold time from ASTB WAIT tHSTWT ±10% ±10% Delay time from ASTB WAIT tDRWTL tDSTWTH ±10% ±10% Input time from WAIT ±10% ±10% Hold time from WAIT tHRWT ±10% ±10% Delay time from WAIT tDRWTH ±10% ±10% Data input time from WAIT tDWTID ±10% ±10% Delay time from WAIT tDWTR ±10% ±10% Delay time from WAIT tDWTW ±10% ±10% Input time from WAIT tDWWTL ±10% ±10% Hold time from WAIT tHWWT ±10% ±10% Delay time from WAIT tDWWTH ±10% ±10% 0.5T 0.5T 0.5T 0.5T 0.5T 0.5T 0.5T 0.5T 0.5T (0.5 (0.5 (0.5 (1.5 (1.5 (1.5 MIN. TYP. MAX. 1.5T 1.5T 1.5T Unit
Remark tCYK 1/fXX (fXX: main system clock frequency) (during address wait), otherwise, Number wait states
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Serial Operation +85°C, AVDD AVSS
3-wire serial mode (SCK: Internal clock output)
Parameter cycle time Symbol tKCY1 Conditions MIN. 3,200 high-/low-level width tKH1, tKL1 tSIK1 1,500 hold time (from SCK) output delay time (from SCK) tKSI1 tKSO1 TYP. MAX. Unit
setup time SCK)
3-wire serial mode (SCK: External clock input)
Parameter cycle time Symbol tKCY2 Conditions MIN. 3,200 high-/low-level width tKH2 tKL2 tSIK2 1,600 hold time (from SCK) output delay time (from SCK) tKSI2 tKSO2 TYP. MAX. Unit
setup time SCK)
UART mode
Parameter ASCK cycle time Symbol tKCY3 Conditions MIN. 1,667 ASCK high-/low-level width tKH3 tKL3 TYP. MAX. Unit
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
mode
Parameter
Symbol MIN.
Standard Mode MAX. 1,000
High-Speed Mode MIN. MAX. 0.9Note
Unit
SCL0 clock frequency free time (between stop start conditions) Hold timeNote1 Low-level width SCL0 clock High-level width SCL0 clock Setup time start/restart conditions Data hold When using CBUStime compatible master When using Data setup time Rise time SDA0 SCL0 signals Fall time SDA0 SCL0 signals Setup time stop condition Pulse width spike restricted input filter Load capacitance each line
fCLK tBUF
tLOW tHIGH
0Note
Note Note
0Note
0.1Cb
0.1CbNote
Notes start condition, first clock pulse generated after hold time. fill undefined area SCL0 falling edge, necessary device provide internal SDA0 signal VIHmin.) with least hold time. device does extend SCL0 signal low-level hold time (tLOW), only maximum data hold time needs satisfied. high-speed mode used standard mode system. this case, conditions described below must satisfied. device does extend SCL0 signal low-level hold time device extends SCL0 signal low-level hold time sure transmit data SDA0 line before SCL0 line released (tRmax. 1,000 1,250 standard mode specification) Total capacitance line (unit:
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Other Operations +85°C, AVDD AVSS
Parameter high-/low-level width Symbol tWNIL tWNIH tWITL tWITH tWRSL tWRSH INTP0 INTP6 Conditions MIN. TYP. MAX. Unit
Interrupt input high-/low-level width
RESET high-/low-level width
Clock Output Operation +85°C, AVDD AVSS
Parameter cycle time high-/low-level width Symbol tCYCL tCLL tCLH tCLR tCLF Conditions 0.5T MIN. TYP. MAX. 31,250 15,615 Unit
rise/fall time
Remark tCYK 1/fXX (fXX: Main system clock frequency) Divided frequency ratio software When using main system clock: When using subsystem clock:
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Converter Characteristics +85°C, AVDD AVSS
Parameter Resolution Overall error
Notes
Symbol
Conditions
MIN.
TYP.
MAX. ±1.2 ±1.6
Unit bits %FSR
AVREF0 AVREF0
%FSR
Conversion time Sampling time Analog input voltage Reference voltage Resistance between AVREF0 AVSS
tCONV tSAMP VIAN AVREF0 RAVREF0 When converting
24/fXX AVSS
AVREF0 AVDD
Notes Quantization error (±1/2 LSB) included. Overall error indicated ratio full-scale value. Remark Main system clock frequency
Converter Characteristics +85°C, AVDD AVSS
Parameter Resolution Overall error
Notes
Symbol
Conditions
MIN.
TYP.
MAX. ±0.6 ±1.2
Unit Bits %FSR
AVREF1 VDD, AVREF1 VDD,
%FSR
Settling time
Load conditions:
AVREF1 AVREF1 AVREF1
Output resistance Reference voltage AVREF1 current
AVREF1 AIREF1
DACS0,
only channel
Notes Quantization error (±1/2 LSB) included. Overall error indicated ratio full-scale value.
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Data Retention Characteristics +85°C, AVDD AVSS
Parameter Data retention voltage Data retention current Symbol VDDDR IDDDR STOP mode VDDDR ±10% VDDDR rise time fall time hold time (from STOP mode setting) STOP release signal input time Oscillation stabilization wait time tRVD tFVD tHVD Conditions MIN. TYP. MAX. Unit
tDREL tWAIT Crystal resonator Ceramic resonator
0.9VDDDR 0.1VDDDR VDDDR
Low-level input voltage High-level input voltage
RESET, P00/INTP0 P06/INTP6
Timing Test Points
0.8VDD Test points
0.8VDD
0.45
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Timing Waveforms
Read operations
(CLK) tCYK
(Output)
Lower address
Lower address
(Output) tDAID
Higher address tHRA tDRA Hi-Z Data (Input) tHRID tFAR Hi-Z
Higher address
tDSTID (I/O) Hi-Z Lower address (Output) tSAST ASTB (Output) tHSTLA
Lower address (Output)
tWSTH tDSTR tDAR tDRID tWRL tDRWTL tDAWT tDRWTH tHRWT tDWTR tDWTID tDRST
(Output)
WAIT (Input) tDSTWT tDSTWTH tHSTWT
Remark signal output from pins when unused.
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Write operation
(CLK) tCYK
(Output)
Lower address
Lower address
(Output) tDAID
Higher address tHWA tDAW Hi-Z Data (Output) tHWOD tFAR tSODWR Hi-Z
Higher address
tDSTOD (Output) Hi-Z Lower address (Output) tSAST ASTB (Output) tHSTLA
Lower address (Output)
tWSTH tDSTW tDAW tDWOD tWWL tDWWTL tDAWT tDWWTH tHWWT tDWTW tDWTID tDWST
(Output)
WAIT (Input) tDSTWT tDSTWTH tHSTWT
Remark signal output from pins when unused.
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Serial Operation
3-wire serial mode
tKCY1, tKH1, tKL1, tKSO1, tKSI1, tSIK1, SI/SO
UART mode
tKCY3 tKH3 ASCK tKL3
mode (µPD78F4216AY, 78F4218AY only)
SCL0
tHIGH
SDA0 tBUF Stop condition Start condition Restart condition Stop condition
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Clock Output Timing
tCLH tCLL
CLKOUT tCLR tCYCL tCLF
Interrupt Input Timing
tWNIH tWNIL
tWITH
tWITL
INTP0 INTP6
Reset Input Timing
tWRSH
tWRSL
RESET
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Clock Timing
tWXH tWXL
1/fX
tXTH
tXTL
1/fXT
Data Retention Characteristics
STOP mode setting
tHVD tFVD
VDDDR tRVD tDREL tWAIT
RESET
(Cleared falling edge)
(Cleared rising edge)
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Flash Memory Programming Characteristics (VDD AVDD AVSS 10.3
Basic characteristics
Parameter Operating frequency Symbol Conditions Supply voltage
Note
MIN.
TYP.
MAX. 12.5 6.25 3.125
Unit Times
0.2VDD
VPPL VPPH Upon low-level detection Upon high-level detection Upon high-voltage detection
0.9VDD
1.1VDD 10.3
supply current supply current Write count Operating temperature Storage temperature
Note
CWRT Tstg TPRG
Note2
Note
Programming temperature
Notes µPD78F4216A, 78F4216AY
standard: 10.3 ±0.3 standard: 10.0 ±0.3
Operation cannot guaranteed when number writes exceeds times. case
µPD78F4216A 78F4216AY with standard, operation cannot guaranteed when number
writes exceeds times. µPD78F4216A, 78F4216AY standard: +60°C µPD78F4216A, 78F4216AY standard: +80°C Cautions writing successful write operation, execute program command again, execute verify command confirm normal completion write operation. (µPD78F4216A, 78F4216AY: standard) Handshake mode supported following products.
µPD78F4216A, 78F4216AY: Other than standard µPD78F4218A, 78F4218AY: Other than standard
Remark fifth alphabetic character from left number indicates standard product. After executing program command, execute verify command confirm normal completion write operation. Handshake mode write mode that uses P24.
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Flash Memory Programming Characteristics (VDD AVDD AVSS 10.3
Serial write operation characteristics
Parameter setup time setup time RESET time count start time from RESET Count execution time counter high-level width counter low-level width counter noise elimination width Symbol tPSRON tDRPSR tPSRRF tRFCF tCOUNT tNFW Conditions high voltage high voltage high voltage MIN. TYP. MAX. Unit
Flash Memory Write Mode Setting Timing
VPPH VPPL tPSRON tPSRRF tCOUNT RESET (input) tDRPSR tRFCF
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
PACKAGE DRAWINGS
100-PIN PLASTIC LQFP (FINE PITCH) (14x14)
detail lead
NOTE Each lead centerline located within 0.08 true position (T.P.) maximum material condition.
ITEM
MILLIMETERS 16.00±0.20 14.00±0.20 14.00±0.20 16.00±0.20 1.00 1.00 0.22 +0.05 -0.04 0.08 0.50 (T.P.) 1.00±0.20 0.50±0.20 0.17 +0.03 -0.07 0.08 1.40±0.05 0.10±0.05 1.60 MAX.
S100GC-50-8EU, 8EA-2
Remark external dimensions material version same those mass-produced version.
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
100-PIN PLASTIC (14x20)
detail lead
NOTE Each lead centerline located within 0.15 true position (T.P.) maximum material condition.
ITEM
MILLIMETERS 23.6±0.4 20.0±0.2 14.0±0.2 17.6±0.4 0.30±0.10 0.15 0.65 (T.P.) 1.8±0.2 0.8±0.2 0.15+0.10 -0.05 0.10 2.7±0.1 0.1±0.1 5°±5° MAX.
P100GF-65-3BA1-4
Remark external dimensions material version same those mass-produced version.
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
RECOMMENDED SOLDERING CONDITIONS
µPD78F4218AY should soldered mounted under following recommended conditions. details recommended soldering conditions, refer document Semiconductor Device Mounting Technology Manual (C10535E). soldering methods conditions other than those recommended below, contact your sales representative. Table 9-1. Surface Mounting Type Soldering Conditions
µPD78F4216AGC-8EU:100-pin plastic LQFP (fine pitch)
µPD78F4218AGC-8EU:100-pin plastic LQFP (fine pitch) µPD78F4216AYGC-8EU:100-pin plastic LQFP (fine pitch) µPD78F4218AYGC-8EU: 100-pin plastic LQFP (fine pitch)
Soldering Method Soldering Conditions Recommended Condition Symbol IR35-107-2
Infrared reflow
Package peak temperature: 235°C, Time: seconds max. 210°C higher), Note Count: times less, Exposure limit: days (after that, prebake 125°C hours)
Package peak temperature: 215°C, Time: seconds max. 200°C higher), Note Count: times less, Exposure limit: days (after that, prebake 125°C hours)
VP15-107-2
Partial heating
temperature: 300°C max., Time: seconds max. (per row)
Note After opening pack, store 25°C less less allowable storage period. Caution different soldering methods together (except partial heating).
µPD78F4216AGF-3BA:100-pin plastic
µPD78F4218AGF-3BA:100-pin plastic µPD78F4216AYGF-3BA:100-pin plastic µPD78F4218AYGF-3BA: 100-pin plastic
Soldering Method Soldering Conditions Recommended Condition Symbol IR35-00-2
Infrared reflow
Package peak temperature: 235°C, Time: seconds max. 210°C higher), Count: times less Package peak temperature: 215°C, Time: seconds max. 200°C higher), Count: times less Solder bath temperature: 260°C max., Time: seconds max., Count: Once, Preheating temperature: 120°C max. (package surface temperature) temperature: 300°C max., Time: seconds max. (per row)
VP15-00-2
Wave soldering
WS60-00-1
Partial heating
Caution
different soldering methods together (except partial heating).
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
APPENDIX DEVELOPMENT TOOLS
following development tools available system development using µPD78F4218AY. Also refer Cautions using development tools. Language processing software
RA78K4 CC78K4 DF784218 CC78K4-L Assembler package common 78K/IV Series compiler package common 78K/IV Series Device file common µPD784216A, 784216AY, 784218A, 784218AY Subseries compiler library source file common 78K/IV Series
Flash memory writing tools
Flashpro (Part number: FL-PR2), Flashpro (Part number: FL-PR3, PG-FP3) FA-100GF FA-100GC Dedicated flash programmer microcontroller incorporating flash memory
Adapter writing 100-pin plastic (GF-3BA type) flash memory. Connection must performed accordance with target product. Adapter writing 100-pin plastic LQFP (GC-8EU type) flash memory. Connection must performed accordance with target product.
Debugging tools When IE-78K4-NS in-circuit emulator used
IE-78K4-NS IE-70000-MC-PS-B IE-70000-98-IF-C IE-70000-CD-IF-A IE-70000-PC-IF-C IE-70000-PCI-IF IE-784225-NS-EM1 NP-100GF NP-100GC EV-9200GF-100 TGC-100SDW ID78K4-NS SM78K4 DF784218 In-circuit emulator common 78K/IV Series Power supply unit IE-78K4-NS Interface adapter required when PC-9800 series (except notebook type) used host machine supported) card cable when PC-9800 series notebook used host machine (PCMCIA socket supported) Interface adapter required when using PC/AT supported)
compatibles host machine (ISA
Interface adapter required when using that incorporates host machine Emulation board emulate µPD784216A, 784216AY, 784218A, 784218AY Subseries Emulation probe 100-pin plastic (GF-3BA type) Emulation probe 100-pin plastic LQFP (GC-8EU type) Socket mounted target system board made 100-pin plastic (GF-3BA type) Conversion adapter connect NP-100GC target system board which 100-pin plastic LQFP (GC-8EU type) mounted Integrated debugger IE-78K4-NS System simulator common 78K/IV Series Device file common µPD784216A, 784216AY, 784218A, 784218AY Subseries
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
When IE-784000-R in-circuit emulator used
IE-784000-R IE-70000-98-IF-C IE-70000-PC-IF-C IE-70000-PCI-IF IE-78000-R-SV3 IE-784225-NS-EM1 IE-784000-R-EM IE-78K4-R-EX3 EP-784218GF-R EP-78064GC-R EV-9200GF-100 TGC-100SDW ID78K4 SM78K4 DF784218 In-circuit emulator common 78K/IV Series Interface adapter required when PC-9800 series (except notebook type) used host machine supported) Interface adapter required when using PC/AT compatibles host machine (ISA supported) Interface adapter required when using that incorporates host machine Interface adapter cable required when used host machine Emulation board emulate µPD784216A, 784216AY, 784218A, 784218AY Subseries Emulation board common 78K/IV Series Emulation probe conversion board required when using IE-784225-NS-EM1 IE-784000-R. Emulation probe 100-pin plastic (GF-3BA type) Emulation probe 100-pin plastic LQFP (GC-8EU type) Socket mounted target system board made 100-pin plastic (GF-3BA type) Conversion adapter connect EP-78064GC-R target system board which 100-pin plastic LQFP (GC-8EU type) mounted Integrated debugger IE-784000-R System simulator common 78K/IV Series Device file common µPD784216A, 784216AY, 784218A, 784218AY Subseries
Real-time
RX78K/IV MX78K4 Real-time 78K/IV Series 78K/IV Series
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Cautions using development tools ID78K4-NS, ID78K4, SM78K4 used combination with DF784218. CC78K4 RX78K/IV used combination with RA78K4 DF784218. FL-PR2, FL-PR3, FA-100GF, FA-100GC, NP-100GF, NP-100GC products made Naito Densei Machida Mfg. Co., Ltd. (TEL: +81-44-822-3813). TGC-100SDW product made TOKYO ELETECH CORPORATION. further information, contact Daimaru Kogyo, Ltd. Tokyo Electronic Division (TEL: +81-3-3820-7112) Osaka Electronic Division (TEL: +81-6-6244-6672) third party development tools, Single-Chip Microcontroller Development Tool Selection Guide (U11069E). host machine suitable each software follows:
Host Machine [OS] Software RA78K4 CC78K4 ID78K4-NS ID78K4 SM78K4 RX78K/IV MX78K4 PC-9800 series [Windows] PC/AT compatibles [Japanese/English Windows] Note
Note
HP9000 Series [HP-UX SPARCstation [SunOS Solaris NEWS (RISC) [NEWS-OS
Note Note
Note DOS-based software
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
APPENDIX RELATED DOCUMENTS
Documents related devices
Document Name Document U14121E
µPD784214A, 784215A, 784216A, 784217A, 784218A, 784214AY, 784215AY, 784216AY, 784217AY, 784218AY Data Sheet µPD78F4216A, 78F4216AY, 78F4218A, 78F4218AY Data Sheet µPD784216A, 784216AY Subseries User's Manual Hardware µPD784218A, 784218AY Subseries User's Manual Hardware
78K/IV Series User's Manual Instructions 78K/IV Series Instruction Table 78K/IV Series Instruction 78K/IV Series Application Note Software Basics
This document U13570E U12970E U10905E
Documents related development tools (user's manuals)
Document Name RA78K4 Assembler Package Language Operation RA78K Structured Assembler Preprocessor CC78K4 Compiler Language Operation IE-78K4-NS IE-784000-R IE-784218-R-EM1 IE-784225-NS-EM1 EP-78064 SM78K4 System Simulator Windows Based SM78K Series System Simulator Reference External Part User Open Interface Specifications Reference Reference Reference Document U11162E U11334E U11743E U11571E U11572E U13356E U12903E U12155E U13742E EEU-1469 U10093E U10092E
ID78K4-NS Integrated Debugger Based ID78K4 Integrated Debugger Windows Based ID78K4 Integrated Debugger HP-UX, SunOS, NEWS-OS Based
U12796E U10440E U11960E
Caution
related documents listed above subject change without notice. sure latest version each document designing.
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Documents related embedded software (user's manuals)
Document Name 78K/IV Series Real-Time Fundamental Installation Debugger 78K/IV Series MX78K4 Fundamental Document U10603E U10604E
Other documents
Document Name SEMICONDUCTOR SELECTION GUIDE Products Packages (CD-ROM) Semiconductor Device Mounting Technology Manual Quality Grades Semiconductor Devices Semiconductor Device Reliability/Quality Control System Guide Prevent Damage Semiconductor Devices Electrostatic Discharge (ESD) Guide Microcomputer-Related Products Third Party Document X13769X C10535E C11531E C10983E C11892E
Caution
related documents listed above subject change without notice. sure latest version each document designing.
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
[MEMO]
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
[MEMO]
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
[MEMO]
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
NOTES CMOS DEVICES
PRECAUTION AGAINST SEMICONDUCTORS Note: Strong electric field, when exposed device, cause destruction gate oxide ultimately degrade device operation. Steps must taken stop generation static electricity much possible, quickly dissipate once, when occurred. Environmental control must adequate. When dry, humidifier should used. recommended avoid using insulators that easily build static electricity. Semiconductor devices must stored transported anti-static container, static shielding conductive material. test measurement tools including work bench floor should grounded. operator should grounded using wrist strap. Semiconductor devices must touched with bare hands. Similar precautions need taken boards with semiconductor devices HANDLING UNUSED INPUT PINS CMOS Note: connection CMOS device inputs cause malfunction. connection provided input pins, possible that internal input level generated noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar NMOS devices. Input levels CMOS devices must fixed high using pull-up pull-down circuitry. Each unused should connected with resistor, considered have possibility being output pin. handling related unused pins must judged device device related specifications governing devices. STATUS BEFORE INITIALIZATION DEVICES Note: Power-on does necessarily define initial status device. Production process does define initial operation status device. Immediately after power source turned devices with reset function have been initialized. Hence, power-on does guarantee out-pin levels, settings contents registers. Device initialized until reset signal received. Reset operation must executed immediately after power-on devices having reset function.
IEBus trademark Corporation. Windows either registered trademark trademark Microsoft Corporation United States and/or other countries. PC/AT trademark International Business Machines Corporation. HP9000 series HP-UX trademarks Hewlett-Packard Company. SPARCstation trademark SPARC International, Inc. Solaris SunOS trademarks Microsystems, Inc. NEWS NEWS-OS trademarks Sony Corporation.
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Regional Information
Some information contained this document vary from country country. Before using product your application, pIease contact office your country obtain list authorized representatives distributors. They will verify:
Device availability Ordering information Product release schedule Availability related technical literature Development environment specifications (for example, specifications third-party tools components, host computers, power plugs, supply voltages, forth) Network requirements
addition, trademarks, registered trademarks, export restrictions, other legal issues also vary from country country.
Electronics Inc. (U.S.)
Santa Clara, California Tel: 408-588-6000 800-366-9782 Fax: 408-588-6130 800-729-9288
Electronics (Germany) GmbH
Benelux Office Eindhoven, Netherlands Tel: 040-2445845 Fax: 040-2444580
Electronics Hong Kong Ltd.
Hong Kong Tel: 2886-9318 Fax: 2886-9022/9044
Electronics Hong Kong Ltd. Electronics (France) S.A.
Velizy-Villacoublay, France Tel: 01-30-67 Fax: 01-30-67 Seoul Branch Seoul, Korea Tel: 02-528-0303 Fax: 02-528-4411
Electronics (Germany) GmbH
Duesseldorf, Germany Tel: 0211-65 Fax: 0211-65
Electronics (France) S.A. Electronics (UK) Ltd.
Milton Keynes, Tel: 01908-691-133 Fax: 01908-670-290 Madrid Office Madrid, Spain Tel: 91-504-2787 Fax: 91-504-2860
Electronics Singapore Pte. Ltd.
United Square, Singapore Tel: 65-253-8311 Fax: 65-250-3583
Electronics Taiwan Ltd. Electronics Italiana s.r.l.
Milano, Italy Tel: 02-66 Fax: 02-66
Electronics (Germany) GmbH
Scandinavia Office Taeby, Sweden Tel: 08-63 Fax: 08-63
Taipei, Taiwan Tel: 02-2719-2377 Fax: 02-2719-5951
Brasil S.A.
Electron Devices Division Guarulhos-SP Brasil Tel: 55-11-6462-6810 Fax: 55-11-6462-6829
J00.7
Data Sheet U14125EJ1V0DS00
µPD78F4216A, 78F4218A, 78F4216AY, 78F4218AY
Purchase components conveys license under Philips Patent Rights these components system, provided that system conforms Standard Specification defined Philips.
related documents indicated this publication include preliminary versions. However, preliminary versions marked such.
information this document current August, 2000. information subject change without notice. actual design-in, refer latest publications NEC's data sheets data books, etc., most up-to-date specifications semiconductor products. products and/or types available every country. Please check with sales representative availability additional information. part this document copied reproduced form means without prior written consent NEC. assumes responsibility errors that appear this document. does assume liability infringement patents, copyrights other intellectual property rights third parties arising from semiconductor products listed this document other liability arising from such products. license, express, implied otherwise, granted under patents, copyrights other intellectual property rights others. Descriptions circuits, software other related information this document provided illustrative purposes semiconductor product operation application examples. incorporation these circuits, software information design customer's equipment shall done under full responsibility customer. assumes responsibility losses incurred customers third parties arising from these circuits, software information. While endeavours enhance quality, reliability safety semiconductor products, customers agree acknowledge that possibility defects thereof cannot eliminated entirely. minimize risks damage property injury (including death) persons arising from defects semiconductor products, customers must incorporate sufficient safety measures their design, such redundancy, fire-containment, anti-failure features. semiconductor products classified into following three quality grades: "Standard", "Special" "Specific". "Specific" quality grade applies only semiconductor products developed based customer-designated "quality assurance program" specific application. recommended applications semiconductor product depend quality grade, indicated below. Customers must check quality grade each semiconductor product before using particular application. "Standard": Computers, office equipment, communications equipment, test measurement equipment, audio visual equipment, home electronic appliances, machine tools, personal electronic equipment industrial robots "Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment medical equipment (not specifically designed life support) "Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems medical equipment life support, etc. quality grade semiconductor products "Standard" unless otherwise expressly specified NEC's data sheets data books, etc. customers wish semiconductor products applications intended NEC, they must contact sales representative advance determine NEC's willingness support given application. (Note) "NEC" used this statement means Corporation also includes majority-owned subsidiaries. "NEC semiconductor products" means semiconductor product developed manufactured defined above).
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