modules, operation. breakpoints enable single-step ADMC401 PROCES

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modules, operation. breakpoints enable single-step ADMC401 PROCES

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ADMC401 PROCESSOR BOARD
modules, operation. breakpoints enable single-step
ADMC401 PROCESSOR BOARD compact, highly flexible evaluation development board single-chip DSP-based high-performance motor controller, ADMC401. ADMC401 motor controller provides following significant features: MIPS, Fixed-Point, 16-bit Core. 24-Bit Internal Program Memory RAM. 24-Bit Internal Program Memory ROM. 16-Bit Internal Data Memory RAM. 14-Bit Address 24-Bit Data External Memory Expansion Input, 12-Bit Pipeline Flash Analog Digital Converter inputs with total conversion time. Three-Phase, 16-bit, Center-Based Generator. Incremental Encoder Interface Unit with Companion Encoder Event Timer. General Purpose Lines, Configurable Inputs, Outputs, Interrupt Sources Trip Sources. Internal Power-On Reset System (POR). Two-Channel Event Timer Unit. Peripheral Interrupt Controller. Synchronous Serial Ports. Variable-Frequency, 8-Bit, Auxiliary Outputs. 16-Bit Watchdog Timer. General Purpose, Interval Timer with Prescaler.
processor board designed compact size that relevant input output signals brought three connector headers underneath board. processor board contains following features components: ADMC401 Single-Chip DSP-Based Controller. External that used expand both program data memory externally. socket byte wide EPROM that used boot load internal and/or external program and/or data memory. 12.96 crystal associated capacitors provide CLKIN frequency. jumper enable internal power-on reset system ADMC401 external reset provided push button switch. socket serial memory device (ROM E2PROM) that used serial boot loading power stand alone operation. isolated UART interface Motion Control Debugger. signals optically isolated from remainder processor board. AD7306 used drive appropriate signals 9-way UART connector. input power supply connector that accepts (VDD), (±AVDD) GND. used drive digital circuits analog portion ADMC401. supplies used analog interface circuits processor board. board dc-dc converter that provides isolated supply UART interface circuit. Analog interface circuits that correctly offset analog input signals inputs ADMC401. Eight independent analog interface circuits included: each channel ADMC401. board precision 2.048V voltage reference using REF191, that used provide input reference ADCs ADMC401. reference voltage also brought connector underneath board.
Refer ADMC401 datasheet full description features ADMC401. ADMC401 PROCESSOR BOARD intended compact, highly integrated evaluation software development platform ADMC401 controller. processor board permits access through UART connection Motion Control Debugger software that operates under Windows 95or Windows NTTM. Motion Control Debugger used download executable code, examine contents registers, program memory data memory, executable
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82-001922-01
Embedded Control Systems Group, Analog Devices, 1999
Analog Devices, Inc., 1999
ADMC401 PROCESSOR BOARD
Jumpers that permit setting polarity, enabling disabling PWMTRIP input enabling disabling serial memory device socket. Additional jumpers included board allow selection either internal external voltage reference with system ADMC401. Three socket blocks underneath processor board that permit access input output signals interest. three sockets comprise digital sockets (IF1 IF3) analog socket (IF2).
provides isolated supply UART interface. processor board laid with separate analog digital ground planes that connected link (JP2) close power supply terminal block noise immunity. This link should removed. processor board indicates correct connection supply. +AVDD -AVDD supplies power operational amplifiers used analog interface section. These amplifiers correctly offset analog inputs board interface inputs ADMC401. Appropriate decoupling capacitors provided processor board three power supply inputs (VDD, +AVDD -AVDD) reduce noise coupling from external power supplies. However, best performance, well-regulated external power supplies correct wiring recommended. arrangement input power supply connector illustrated Figure
ADMC401 PROCESSOR BOARD operate stand-alone mode, where user must supply only appropriate power supply voltages either UART connection Motion Control Debugger suitable serial memory device. this case, user must provide suitable connectors interface various input output signals expansion connectors underneath board. Alternatively, processor board plugged into ADMC CONNECTOR BOARD. connector board provides easy access relevant input output signals appropriate connectors terminal blocks. connector board also provides easy interface International Rectifier PowIRtrainmodules permit development complete motor control solutions. addition, connector board adds functionality including 8-channel, 12-bit, serial DAC, differential line receiver interface incremental encoder with differential outputs, large prototype area system expansion. Refer documentation ADMC CONNECTOR BOARD further details.
-AVDD +AVDD
POWER SUPPLY REQUIREMENTS
ADMC401 PROCESSOR BOARD contains 4-way terminal block connection external power supplies. correct operation, following supplies required: (VDD) (+AVDD) (-AVDD) Ground supply powers digital logic circuits processor board, including ADMC401 controller. addition, used analog voltage supply ADMC401 input dc-dc converter that
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Figure Power Supply Connector ADMC401 Processor Board.
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Analog Devices, Inc., 1999
ADMC401 PROCESSOR BOARD
FUNCTIONAL DESCRIPTION BOARD
PROCESSOR
complete schematics ADMC401 PROCESSOR BOARD provided this document. Refer these schematics exact description functionality processor board. This section intended functional description only major elements board. UART Interface UART interface Motion Control Debugger provided ADMC401 PROCESSOR BOARD 9-way D-type connector (P1). order separate ADMC401 power conversion stage used complete motor drive system, UART interface optically isolated from remainder processor board. Motion Control Debugger communicates through serial port (SPORT1) ADMC401 using DR1B pins. addition, ADMC401 reset signal (ICRESET) sent UART interface ensure that processor board reset detected Motion Control Debugger. three signals, DR1B, ICRESET optically isolated using HCPL0630 dual isolators U5). signals ICRESET considered outputs these signals sent from processor board debugger. These signals applied opto-isolator. Conversely, signal DR1B considered input received processor board. This signal isolated using second isolator secondary supply optical isolators produced processor board NME0505S power supply (isolated dc-dc converter). ADMC401 PROCESSOR BOARD also contains AD7306 transceiver that converts signals appropriate levels suitable UART connection standard serial cable used connect from 9-way female socket processor board appropriate port baud rate port used from ADMC401 Comm Config software that part Motion Control Debugger.
functional block diagram UART interface circuit shown Figure direction three signals indicated figure. Refer full schematics this document full circuit. Recall that secondary supply optical isolators AD7306 derived processor board isolated dc-dc converter, NME0505S (U1).
ADMC401
AD7306
OPTO
RESET
Debugger
OPTO
DR1B
Figure Functional Block Diagram UART Interface Motion Control Debugger ADMC401 PROCESSOR BOARD.
Power Reset Circuit ADMC401 contains integrated power-on reset (POR) circuit that provides output reset signal from ADMC401 power-up power supply voltage falls below threshold level. ADMC401 reset using internal power-on reset circuit connecting RESET (jumper position) alternatively from external source using RESET (jumper position). pressing push button switch, voltage level RESET brought below threshold level. Resistor capacitor limit rise voltage RESET allow core's internal clock stabilize. RESET signal also UART interface, described previously, permit Motion Control Debugger detect system reset. Serial Interface normal program development, envisaged that Motion Control Debugger would used download executable code ADMC401 PROCESSOR BOARD. However, program development stabilizes, required operate processor board stand-alone mode target application. this
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ADMC401 PROCESSOR BOARD
reason, processor board contains 8-pin socket (U7) installation serial memory device that used boot load program data memory ADMC401. Either one-time programmable serial device, such XC1765D Xilinx, electrically erasable devices such AT17C65 E2PROM from Atmel 37LV65 from Microchip recommended. These devices provide sufficient capacity boot load entire internal program data memory space ADMC401. larger areas memory must boot loaded, compatible higher capacity serial memory devices must chosen (i.e. XC17128D, AT17C128 37LV128 higher). cases, application executable file converted form suitable serial memory devices using MAKEPROM utility that installed part Motion Control Debugger. both memory devices, three-wire connection SPORT1 ADMC401 used. illustration connection serial memory device ADMC401 shown Figure connection 12.96 crystal associated capacitors also shown figure.
ADMC401
XTAL CLKOUT MMAP BMODE DR1A SCLK1 RESET RFS1/SROM DATA RESET CLKIN 12.96
ADMC401 from memory device rate CLKOUT/26 (approx. 1MHz processor board with 12.96 crystal). serial memory device present, ADMC401 automatically converts UART communication mode. chip enable line (CEB) serial memory device tied jumper (JP6) processor board. This jumper used either GND. order enable serial memory device socket, necessary this (position 23). Conversely, SROM E2PROM left socket disabled tying (position 1-2). programming serial memory device pulled high processor board disable this feature. However, this also connected (pin IF1B) interface connector underneath processor board. This enables this pulled external hardware that writing E2PROM would possible. Obviously, necessary respect particular operational requirements chosen serial E2PROM such feature attempted. Clearly, this programming feature applicable only E2PROMs one-time programmable serial ROMs.
Analog Interface ADMC401 PROCESSOR BOARD permits eight analog inputs from User Interface Connector, IF2A (pins eight channels ADMC401. eight analog inputs IF2A User Interface Connector range from +2V. Gain Calibration input also from IF2A connector Gain ADMC401. There separate interface circuit each eight channels ADMC401 included processor board. These analog interface circuits convert nominally signals interface connector signals centered ADMC401 reference voltage level (either internally derived 2.0V level externally provided 2.048V level). analog interface circuits, consisting high-performance operational amplifiers precision resistor networks, effectively offset analog inputs reference voltage level.
SERIAL E2PROM
Figure Connection serial memory (ROM E2PROM) crystal ADMC401.
DATA line serial memory device connected DR1A ADMC401. RESET line memory connected RFS1 SROM ADMC401 line memory driven SCLK1 ADMC401. Following activation RESET ADMC401, RFS1 SROM pulsed reset serial memory device. Subsequently, data clocked synchronously into
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ADMC401 PROCESSOR BOARD
Three AD8044 quad operational amplifiers used (U8, U11) analog interface configured summing unity-gain stages. used interface VIN0, VIN1, VIN2 VIN3 analog inputs. used buffer VIN4, VIN5, VIN6 VIN7 inputs. input also level shifted buffered same using operational amplifier U11. This applied GAIN compensation input ADMC401. Precision resistor networks (RN1 RN5) used input feedback resistors ensure accurate gain matching channels. addition, feedback capacitors used provide simple low-pass filtering with 59kHz cut-off frequency analog inputs. analog inputs applied ADMC401 single-ended fashion, that inverting inputs sample hold amplifiers ADMC401 (ASHAN BSHAN) connected buffered version reference voltage. representation analog interface circuit channels shown Figure seen schematics this document, each analog input stage also contains small filter operational amplifier output.
R=10 C=270
Jumper used SENSE ADMC401 either AVDD levels. Connecting SENSE AVDD (JP1 position selects external voltage reference operation. this mode, ADMC401 accepts input voltage reference VREF pin. order connect external voltage reference ADMC401 evaluation board, necessary insert jumper. This connects external voltage reference from REF191 device VREF ADMC401. signal also buffered operational amplifier used level shift applied analog signals connector well being connected ASHAN BSHAN inputs sample hold amplifiers). order operate with internally derived voltage reference ADMC401, jumper must tied position that SENSE connected REFCOM (=GND). Additionally, jumper must left open. ADMC401 provides reference VREF that buffered applied ASHAN BSHAN inputs. buffered VREF signal also used level shifting circuitry jumper third setting that permits SENSE input tied VREF input. This setting permitted. summary appropriate settings jumpers internal external voltage reference operation are:
INTERNAL Reference: position open EXTERNAL Reference: position closed
+AVDD
VREFBUF
AD8044
VIN0
-AVDD
Figure Configuration analog interface circuit ADMC401 PROCESSOR BOARD.
Reference Voltage Generation ADMC401 PROCESSOR BOARD contains external voltage reference, REF191 (U10) that used provide precise 2.048V output. evaluation board configured operate from either internal (ADMC401 generated) external voltage reference. jumpers control selection either internal external voltage reference.
addition, reference voltage level buffered (opamp U11A). Additionally, voltage reference VREF ADMC401 analog interface connector (pin IF2A), underneath processor board, where used external circuitry. However, recommended that this signal buffered prior other circuitry.
External Memory Interface Provision made processor board expand both program data memory externally ADMC401. There three sockets (U12, U14)
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ADMC401 PROCESSOR BOARD
processor board into which external chips inserted. processor board designed operate with CY7C199 memory devices from Cypress AS7C256 memory devices from Alliance. external memory capable zero wait state operation. three external memory chips each arranged 8bit memory array. When connected this way, lower recognized data memory upper recognized program memory. selection made using data memory select strobe upper address line memory devices. course, this space available because areas external memory devices whose addresses identical internal memory space ADMC401 unused external memory chips. three memory devices (U12, U14) used external program memory, where provides byte (D0-D7), provides middle byte (D8D15) provides high byte (D16-D23) external 24-bit program memory word. external data memory accesses, only used since 16-bit data memory word read/written data lines (D8-D23). These external chips provide additional 24-bits external program memory RAM. This program memory block arranged contiguous address space starting address 0x1000. Program memory read write accesses address range 0x1000 0x3FFF will access this external memory. Additionally, U12, expand external data memory ADMC401. total, external 16-bits external data memory enabled. particular, this external memory appears 16-bit block between addresses 0x0000 0x1FFF. additional 16-bit block enabled between addresses 0x2400 0x2FFF. Read write accesses data memory these address spaces will access external memory. There additional 16-bit block external data memory space ADMC401 (from addresses 0x3000 0x37FF) that mapped external memory ADMC401 Evaluation Board. particular NAND gate logic detects attempt access external data memory this space disables memory chip enable strobe (MEMCE\). This space
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reserved provide space external data memory into which users desired external peripherals (e.g. Digital Analog Converters, FPGAs, Resolver Digital Converters etc.). There also interface socket (U15) external byte-wide EPROM that used boot load ADMC401 (when MMAP BMODE pins both tied LO). circuit been laid accommodate 27C512 EPROM device, although provided with evaluation board. default, ADMC401 Evaluation, both MMAP BMODE pins tied through pull-up resistors. This necessary because only this mode that internal Monitor enabled. However, EPROM boot mode must selected, then MMAP BMODE pins accessible IF1C connector will need tied user. course, monitor Motion Control Debugger will operate this configuration. following signals brought, directly from ADMC401, User Interface Connector, IF1, easy access external expansion, required. address lines (AD0 AD13) data lines D23) memory select lines PMS, DMS, read/write strobe lines request/grant control lines powerdown pins PWD, PWDACK mode select pins (MMAP, BMODE)
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ADMC401 PROCESSOR BOARD
Jumper Settings ADMC401 PROCESSOR BOARD contains jumpers that: Permit selection SENSE (JP1). Permit selection internal/ external RESET (JP3). Permit enabling/disabling PWMTRIP input (JP4). Permit selection polarity (JP5). Permit enabling/disabling SROM/E2PROM socket (JP6). Permit selection external Voltage Reference. settings these jumpers described Table Connecting jumper position ties PWMTRIP ADMC401 permanently enables outputs. other hand, connecting jumper position connects PWMTRIP ADMC401 GND, thereby permanently disabling outputs. third alternative leave jumper unconnected. this case, PWMTRIP ADMC401 connected interface connector IF3B that it's value defined external circuitry. Connecting position ties PWMPOL ADMC401 enables active outputs. other hand, connecting position creates active outputs from ADMC401. appropriate setting this jumper determined exact nature gate drive circuit target system. PWMPOL also connected interface connector that state detected altered external hardware Connecting position, ties chip enable (CEB) serial memory socket (U7) disables memory device. serial memory device required, jumper must placed position enable memory. link that connects analog digital ground planes processor board together. correct operation, this link must removed. Jumper Position Function
SENSE Allowed SENSE AVDD Enable internal circuit Enable external circuit Disable PWMTRIP input Permanently Disable outputs Enabled PWMTRIPB state from Interface Connector Outputs Active Outputs Active Disable SROM/E2PROM Enable SROM/E2PROM Enable External Reference Voltage
Table Jumper settings ADMC401 PROCESSOR BOARD.
Interface Connectors order create compact evaluation development board possible, input output signals brought three interface connectors underneath processor board. connectors (IF1 IF3) dedicated digital signals third (IF2) reserved analog signals. This three connector interface will used future processor boards future motion control products from Analog Devices. Therefore, many pins connectors ADMC401 PROCESSOR BOARD unconnected (n/c). These pins reserved other functions future products. Interface connectors both 3-way connectors. Connector 3-way pins. exact connections this interface seen schematics this document. connections tabulated connector Table connector Table connector Table
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ADMC401 PROCESSOR BOARD
IF1A Signal AD12 PMSB DMSB BMSB SCLK0 TFS0 RFS0
IF1B Signal AD10 AD13 BGHB PWDB
PWDACK
SCLK1 TFS1 RFS1 DR1A DR1B E2PROG
IF1C Signal AD11
ICRESET
CLKOUT
MMAP BMODE
IF2A Signal +AVDD -AVDD VREF
IF2B Signal +AVDD -AVDD
IF2C Signal +AVDD -AVDD
Table Definition analog interface connector ADMC401 PROCESSOR BOARD.
Table Definition digital interface connector ADMC401 PROCESSOR BOARD.
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description various connections three interface connectors given Table IF3A Signal
PWMSYNC
PWMPOL
ETU0
AUX0 PIO0 PIO3 PIO6
PIO9
IF3B Signal
PWMTRIP
ETU1
AUX1 PIO1 PIO4 PIO7 PIO10
IF3C Signal
PWMSRB
Signal(s) +AVDD -AVDD SCLK0, TFS0, RFS0, DT0, SCLK1, TFS1, RFS1, DR1A, DR1B, E2PROG VIN1 VIN9 VREF PWMSYNC
PWMTRIP
Function power supply Ground power supply power supply SPORT0 pins ADMC401
CONVST CLKOUT
SPORT1 pins ADMC401
PIO2 PIO5 PIO8
PIO11
PWMPOL PWMSRB EIA, PIO0 PIO11 CONVST ETU0, ETU1 AUX0, AUX1 CLKOUT AD13
PMS, DMS, PWD, PWDACK MMAP,BMODE
Table Definition digital interface connector ADMC401 PROCESSOR BOARD.
E2PROM programming analog inputs ADMC401 Reference voltage output TTL-level outputs PWMSYNC pulse ADMC401 PWMTRIP ADMC401 polarity ADMC401 Switch Reluctance ADMC401 TTL-level encoder interface unit pins ADMC401 TTL-level encoder zero marker input ADMC401 TTL-level encoder Strobe marker input ADMC401 Dedicated programmable input/ outputs ADMC401 External convert start signal Event timer inputs TTL-level auxiliary outputs TTL-level CLKOUT signal Address lines ADMC401 Data lines ADMC401 Memory select lines ADMC401 Read/Write strobe lines ADMC401 Request/ Grant control lines ADMC401 Powerdown pins ADMC401 Mode Select pins ADMC401
Table Function signals interface connectors ADMC401 PROCESSOR BOARD. REV. Page
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ADMC401 PROCESSOR BOARD
Components, Placement Schematics various integrated circuits ADMC401 PROCESSOR BOARD tabulated Table board layout circuit schematics shown following pages. Designator U12, U13, Integrated circuit NME0505S dc/dc converter AD7306JR Transceiver ADMC401 Controller HCPL0630 Opto-isolator 74F10 Triple Three NAND Gate SROM/E2PROM socket AD8044AR Quad op-amp REF191GS Voltage Reference CY7C199 Static AS7C256 Static 27C512 BOOT EEPROM socket
Table Main integrated circuits ADMC401 PROCESSOR BOARD
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ADMC401 PROCESSOR BOARD
+AVDD AVDD
T&IPD
ADMC401
ADMC401 PROCESSOR BOARD
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AGND 0.1uF AGND 0.1uF
C1R2IN T1OUT T2OUT R1IN(B) R1IN/R1IN(A) T3OUT(B) T3OUT(A) VC2C2+ R2OUT T1IN T2IN R1OUT T3IN 232/422SEL
ADMC401 PROCESSOR BOARD
CAPT 10uF 0.1uF CAPB CAPT VIN4 BSHAN ASHAN VIN0 VDD1 VDD1 AGND R2OUT T1IN RESET DETECT AGND 10uF VREF
VDD1
VDD1
VIN5 AGND VIN6 VREF VIN7 AGND DGND AGND 0.1uF
DGND1
10uF 0.1uF +AVDD -AVDD DGND LINK 10uF AGND 0.1uF 10uF 0.1uF
NME0505S
CAPB SENSE VIN1 VIN2 GAIN VIN3 SENSE 0.1uF 10uF 0.1uF
0.1uF 0.1uF
0.1uF DGND1 0.1uF
CON4
HEADER
0.1uF CONVST
UART CONN
VDD1 0.1uF
AGND
ETU0 ETU1 AUX0 AUX1
AVDD
AVSS
SENSE
VIN3
GAIN
VIN2
VIN1
CAPB
VIN0
ASHAN
BSHAN
VIN4
CAPT
VIN5
REFCOM
VIN6
VREF
VIN7
AVSS
AVDD
CONVST
BMSB PMSB DMSB DGND AD[0.13]
AD[0.13] AD13 AD12 AD11 AD10
ETU0 ETU1 AUX0 AUX1 DGND 0.1uF
AD7306JR
VDD1
BGHB
0.1uF
DR1B
R2OUT
ADMC401BST
PIO0 PIO1 PIO2 PIO3 PIO4 PIO5 PIO6 PIO7 PIO8 PIO9 PIO10 PIO11
D[0.23]
HCPL0630
VDD1
DGND
DGND
0.1uF
0.1uF RESET DETECT T1IN
PWDACK BMODE MMAP RESET EXTGND1 PWMTRIPB PWMSYNC EXTVDD PWMPOL
ICRESET PWDB PWDACK
HCPL0630
HEADER
D[0.23]
BMODE MMAP
BMODE DGND MMAP DGND RESET
0.1uF DGND
ICRESET DGND 20pF 20pF 12.96MHz CLKOUT
CLKIN XTAL CLKOUT SCLK1 TFS1 IRQ1 RFS1 IRQ0 SROMB DR1B DR1A
10nF
DISABLED ENABLED
PWMTRIPB
PWMTRIP DGND PWMPOL DGND 0.1uF DGND
ACTIVE HIGH ACTIVE
DGND
HEADER
0.1uF DGND
POLARITY
PWMSR
SCLK0 TFS0 RFS0
CEOB
AT1765
DATA RESETB
DR1A SCLK1 RFS1 DR1A 4.7K DR1B RFS1 0.1uF DGND PWMSYNC PWMTRIPB PWMPOL PWMSRB
Title ADMC401 PROCESSOR BOARD Size Date: Document Number {Doc} Tuesday, March 1999
0.1uF
PWMSRB
EEPROG
TFS1 SCLK1 RFS0 TFS0 SCLK0
0.1uF DGND
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270pF
ADMC401 PROCESSOR BOARD
RN1A -AVDD
270pF RN2A 10K. -AVDD 20_ohms 0.1uF VIN0 0.1uF AGND AGND VREFBUF
AGND
RN1C
AGND
RN2C 10K.
VREFBUF
RN1D
+AVDD 270pF
RN2D 10K.
+AVDD
RN1H -AVDD
AGND
RN1F
0.1uF AGND VREFBUF
AGND
RN2F 10K.
VREFBUF
RN1E
+AVDD
RN2E 10K.
+AVDD
270pF
RN3A -AVDD
270pF RN4A 10k. -AVDD 20_ohms AGND 0.1uF AGND AGND VREFBUF
AGND
SLEEP VOUT
VREFBUF VREFEXT 0.1uF
0.1uF
RN4C 10k.
RN3D
10uF 0.1uF
+AVDD 270pF RN3H -AVDD
RN4D 10k.
+AVDD 270pF
REF191GS
RN4H 10k. -AVDD
VREFEXT JUMPER +AVDD VREFBUF
0.1uF AGND VREFBUF
AGND
RN4F 10k.
RN3E
+AVDD
RN4E 10k.
+AVDD
U11A
VREF 10uF 0.1uF
VREFBUF
270pF RN5A -AVDD
AD8044AR
AGND ASHAN 0.1uF 20_ohms
-AVDD
AGND AGND BSHAN 0.1uF 20_ohms VREFBUF
RN5C RN5D
+AVDD
AGND
Size Date:
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RN5B
U11B
0.1uF
20_ohms GAIN 0.1uF
AD8044AR
0.1uF AGND
AGND
RN3F
AD8044AR
20_ohms
10k.
AGND
RN3G
VIN6
RN4G
RN3C
AD8044AR
10k.
RN3B
0.1uF
VIN4
RN4B
AD8044AR
20_ohms
10K.
RN1G
VIN1
RN2G
AD8044AR
10K.
RN1B
0.1uF
RN2B
20_ohms VIN2 0.1uF AGND
AD8044AR
270pF RN2H 10K. -AVDD
VIN3 20_ohms 0.1uF AGND
AD8044AR
20_ohms VIN5 0.1uF AGND
AD8044AR
20_ohms VIN7 0.1uF
AD8044AR
AGND
Title ADMC401 PROCESSOR BOARD Document Number {Doc} Tuesday, March 1999 Sheet
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ADMC401 PROCESSOR BOARD
0.1uF AD[0.13]
AD[0.13] AD10 AD11 AD12 AD13 DMSB MEMCE/ D[0.23]
DGND
D[0.23]
DGND
AD[0.13]
DMSB MEMCE/
0.1uF BMSB
AD[0.13]
AD12 AD13
CY7C199
MEMCE/ DGND
PMSB
74F10D
74F10D
0.1uF DGND
DGND
AD10 AD11 AD12 AD13
DGND
74F10D
DGND
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CY7C199
DGND
0.1uF DGND
AD10 AD11 AD12 AD13
DGND
AD10 AD11 AD12 AD13 OE/VPP
CY7C199
D[0.23]
D[0.23]
D[0.23]
0.1uF DGND
BMSB
27C512 DGND
Title ADMC401 PROCESSOR BOARD Size Date: Document Number {Doc} Wednesday, March 1999 Sheet
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IF1A
D[0.23]
ADMC401 PROCESSOR BOARD
D[0.23]
IF1B D[0.23]
IF1C D[0.23]
D[0.23]
D[0.23]
DGND
AD12 AD[0.13]
DGND
AD10 AD13 AD[0.13]
DGND
AD11 AD[0.13]
AD[0.13]
AD[0.13]
AD[0.13]
PMSB DMSB BMSB DGND SCLK0 TFS0 RFS0
BGHB PWDB PWDACK DGND SCLK1 TFS1 RFS1 DR1A DR1B EEPROG
ICRESET IF2A CLKOUT MMAP BMODE
IF2B
IF2C
INTERFACE30X3
INTERFACE30X3
INTERFACE30X3
+AVDD -AVDD VREF
+AVDD -AVDD
+AVDD -AVDD
IF3A
IF3B PWMSYNC PWMPOL
IF3C PWMTRIPB
PWMSRB
ETU0 AUX0
INTERFACE24X3 CONVST CLKOUT
INTERFACE24X3
INTERFACE24X3
ETU1 AUX1
DGND
DGND
DGND
PIO0 PIO3 PIO6 PIO9
PIO1 PIO4 PIO7 PIO10
PIO2 PIO5 PIO8 PIO11
INTERFACE30X3
INTERFACE30X3
INTERFACE30X3
Title ADMC401 PROCESSOR BOARD Size Date: Document Number {Doc} Tuesday, March 1999 Sheet
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