Channel Programmable Input/Output Board PIO-96 Document Part Docu
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PIO-96
Channel Programmable Input/Output Board
PIO-96 Document Part Document Reference Document Issue Level Manual covers PCBs identified 0127-1015 0127-1015.Doc PIO-96
rights reserved. part this publication reproduced, stored retrieval system, transmitted, form means, electronic, mechanical, photocopied, recorded otherwise, without prior permission, writing, from publisher. permission contact Blue Chip Technology. Information offered this manual correct time printing. Blue Chip Technology accepts responsibility inaccuracies. This information subject change without notice. trademarks registered names acknowledged.
Blue Chip Technology Ltd. Chowley Oak, Tattenhall Chester, Cheshire 9EX. Telephone 01829 772000 Facsimile 01829 772001.
Amendment History
Issue Level
Issue Date 24.11.97
Author
Amendment Details First draft Window front cover logo. 98/088
Contents
INTRODUCTION. ELECTROMAGNETIC COMPATIBILITY (EMC). Specification USER ADJUSTMENTS Selecting Base Address (JP1) Setting Interrupt Channel (JP2) PORT Control Port Functions ELECTRICAL OPTIONS Input Conditioning Input/Output Connections. Connector Details. OPERATING GUIDE. Using Device. Programming Guide Simple Inputs Simple Outputs Typical Register Setups EXAMPLE PROGRAMS. Example Program Example Program COMMERCIAL DATA ACQUISITION PACKAGES PIO-96 Board with ASYST APPENDIX. Address PC/XT/AT Computers Hardware Interrupt Levels PC/XT Hardware Interrupt Levels PC/AT Channels.
Blue Chip Technology Ltd.
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Introduction
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INTRODUCTION
This card provides programmable digital lines. suitable sensing driving connections only. There provision board pull resistors enable board used detect contact closures push buttons, relay contacts etc. This manual refers printed circuit boards identified rear board) reference "PIO-96 Rev. Whilst every effort been taken ensure that information provided accurate, Blue Chip Technology cannot assume responsibility errors this manual their consequences. Should errors detected, company would greatly appreciate being informed them. policy continuous product development operated, resulting contents this document being subject change without notice.
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Electromagnetic Compatibility (EMC)
ELECTROMAGNETIC COMPATIBILITY (EMC)
This product meets requirements European Directive (89/336/EEC) eligible bear mark. been assessed operating Blue Chip Technology Icon industrial However, because board installed variety computers, certain conditions have applied ensure that compatibility maintained. meets requirements industrial environment Class product) subject those conditions. board must installed computer system which provides screening suitable industrial environment. recommendations made computer system manufacturer/supplier must complied with regarding earthing installation boards. board must installed with backplate securely screwed chassis computer ensure good metal-to-metal (i.e. earth) contact. Most problems caused external cabling boards. With analogue boards particular attention must paid this aspect. imperative that external cabling board totally screened, that screen cable connects metal bracket board hence earth. recommended that round screened cables with braided wire screen used preference those with foil screen drain wire. metal connector shells which connect around full circumference screen; they superior those which earth screen simple "pig-tail". Standard ribbon cable will adequate unless contained wholly within cabinetry housing industrial difficulty with interference experienced cable should also fitted with ferrite clamp close possible connector. preferred type Chomerics clip-on style, type H8FE-1004-AS.
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Electromagnetic Compatibility (EMC)
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recommended that cables kept short possible, particularly when dealing with level signals. Ensure that screen external cable bonded good earth remote cable. Failure observe these recommendations invalidate compliance.
Warning This Class product. domestic environment this product cause radio interference which case user required take adequate measures.
Specification Blue Chip Technology Icon industrial fitted with this card meets following specification: Emissions: 55022:1995 Radiated Conducted Immunity: 50082-1:1992 incorporating Electrostatic Discharge 801-2:1984 Performance Criteria 801-3:1984 Performance Criteria 801-4:1988 Performance Criteria Class Class
Radio Frequency Susceptibility
Fast Burst Transients
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User Adjustments
USER ADJUSTMENTS
Selecting Base Address (JP1)
board located slot motherboard, must appear specified position `address') computer's port map. Available positions shown IBM-PC Technical Reference Guide. However, those possess copy this document good place location normally allocated prototyping card supplied IBM. This address (hex) (decimal). Blue Chip Technology cards preset this address factory. However, devices should used while same address since contention will occur neither board will work. your machine contains card with conflicting address then another reasonably safe address (hex). links board base address board within IBM-PC port map. address binary with presence link representing absence link representing
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User Adjustments
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base address (768 decimal) pattern links indicated below:
100H 200H
Figure Selecting Base Address More example addresses shown Appendix Note: cards must occupy same address.
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User Adjustments
Setting Interrupt Channel (JP2)
PIO-96 card supports interrupts generated from µPD71055 chips. These chips identical functionally Intel 8255 integrated circuit. interrupts provides means monitor digital inputs only when there been change input signal lines. interrupts requires user write interrupt handler routine (either assembler) install prior using PIO-96 card. select interrupt channel, link must jumper block JP2. interrupt selected placing jumper link pair link pins corresponding desired interrupt channel. other interrupt channel links must left open. Note: Only link permitted JP2. more than link fitted then computer system function correctly.
Figure Setting Interrupt Channel above diagram shows jumper block with link placed interrupt channel Please note that silk screen printing interrupt numbers printed circuit board incorrect. diagram above shows correct sequence.
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Port
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PORT
PIO-96 four µPD71055 (8255) chips. Each chip three ports which programmed inputs outputs writing control word control port. (See Table ports ports much each input output, i.e. they should programmed mixed input output bits within individual port. Port split into sections each which input output. board occupies sixteen read/write addresses (four each µPD71055 chip) IBM-PC port map.
ADDRESS Base Base Base Base Base Base Base Base Base Base Base Base Base Base Base Base
PORT Port Port Port Command Port Port Port Port Command Port Port Port Port Command Port Port A''' Port B''' Port C''' Command Port
Table Port Addresses
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Port
function operation each input/output ports controlled control byte which written appropriate Command Port. Each within byte specific function, shown Table Control Port Functions
FUNCTION Mode Flag SETTINGS 0=Inactive 1=Active 00=Mode 01=Mode 0=Output 1=Input 0=Output 1=Input 0=Mode 1=Mode 0=Output 1=Input 0=Output 1=Input
Mode Selection Port Port (Upper) Mode Selection Port Port (Lower)
Table Control Port Functions software described section Operating Guide gives examples more typical control bytes their effects.
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Electrical Options
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ELECTRICAL OPTIONS
Input Conditioning
71055 high impedance inputs. option provided terminate external input lines. This useful electrically noisy environment where load required (e.g. open collector drive). lines pulled on-board supply using resistor packs (identified "RP1" "RP6" "RP11" "RP16" inclusive). recommended values each resistor 10Kohm. Input/Output Connections
insulation displacement connectors (IDC) provided channel signal connection. connector located rear bracket carries signals second connector located board carries signals This connector brought rear computer adapter cable. access individual channels required, ribbon cable used connect channels screw terminal block available from Blue Chip Technology part number ST-24. pins numbered shown following diagram. Pins 1-48 contain signal lines pins connected digital ground. Both connectors identical their pin-out.
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Electrical Options
When connector viewed from back system numbered pins left even numbered pins right with connector.
Figure Connector Details (View with gold edge connector facing downwards.)
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Electrical Options
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PORT
Connector Details
Digital Ground PORT
Digital Ground
Table Signal Connection Details (Pin both connectors identical)
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Operating Guide
OPERATING GUIDE
Using Device
total channel signals from each 71055 device PIO-96 board provides twelve 8-bit ports. Each signal connected within these ports i.e.
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Operating Guide
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Programming Guide
Simple Inputs state input lines determined using either following methods: Microsoft BASIC BASIC. X=INP Returns byte from port assigns this value variable 8088/8086 Assembly language. PORT 0300H GETDAT: DX,PORT AL,DX Simple Outputs state output lines modified using either following methods: Microsoft BASIC BASIC. Outputs byte Port
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Operating Guide
8088/8086 Assembly language PORT 0300H PUTDAT: DX,PORT AX,DATA DX,AL µPD71055 operate modes (mode first mode (mode µPD71055 provides simple three ports. Data simply written read from specified port without handshaking. Mode enables transfer data from specified port conjunction with strobes handshaking signals provided Port mode data transferred bi-directional port with handshakes (Port
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Operating Guide
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following table gives summary most commonly used `control words' which must written each control port configure µPD71055s before using this module. table assumes mode Typical Register Setups
Control Word (hex.) Control Word (Dec.) Sets Port Output Output Output Output Output Output Output Output Input Input Input Input Input Input Input Input Sets High Bits Port Output Output Input Input Output Output Input Input Output Output Input Input Output Output Input Input Sets High Bits Port Output Output Output Output Input Input Input Input Output Output Output Output Input Input Input Input Sets Bits Port Output Input Output Input Output Input Output Input Output Input Output Input Output Input Output Input
Table Simple Control Words full explanation various modes operating, signal lines consult Intel 8255 µPD71055 datasheet.
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Example Programs
EXAMPLE PROGRAMS
Example Program following program Microsoft Basic will test operation PIO-96 link made between corresponding pins rear connector.
P1=&H300 BASE FIRST &H304 BASE SECOND GOSUB &H304 &H300 GOSUB GOTO LOOP CONTINUOUSLY P1+3, &H80 P2+3, &H9B P1+P,A INP(P2+P)<>A THEN PRINT "ERROR", P,A,INP(P2+P):F=F+1 A=A+A A=256 THEN GOTO GOTO THEN PRINT "FAILED", F:GOTO PRINT P,"PASSED" NEXT RETURN
program runs continuously only stopped pressing Control-Break keyboard.
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Example Programs
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Example Program This example program shows interrupts generated from µPD71055 chip. program sets mode operation which allows data strobed into Port first µPD71055 signal Port determine when data been strobed into data port, this example polls µPD71055 port register which mode acts control/status register. normal interrupt handler routine written assembler would resident memory respond hardware interrupt generated card. NOTES: Prior using interrupts, interrupt routine must installed memory application software. interrupts unused "INT0" "INT1" lines (bits each µPD71055 port must LOW. This means that µPD71055 been (say) mode with ports output then Port output lines must written zero (LOW) state. ports were inputs then interrupts will only occur Port input lines each µPD71055 being used interrupt mode. above necessary because each µPD71055 "INT0" "INT1" lines logically OR-ed together.
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Page bseaddr% &H300 port0A% bseaddr% port1A% bseaddr% port2A% bseaddr% ctrlprtA% bseaddr% port0B% bseaddr% port1B% bseaddr% port2B% bseaddr% ctrlprtB% bseaddr% port0C% bseaddr% port1C% bseaddr% port2C% bseaddr% ctrlprtC% bseaddr% port0D% bseaddr% port1D% bseaddr% port2D% bseaddr% ctrlprtD% bseaddr%
Example Programs
µPD71055 mode ports outputs ctrlprtB%, &H80 ctrlprtC%, &H80 ctrlprtD%, &H80 ports µPD71055 port0B%, port1B%, port2B%, port0C%, port1C%, port2C%, port0D%, port1D%, port2D%,
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Example Programs mode normal operation µPD71055 port input port input bits port input groups mode ctrlprtA%, &HB0 manipulation mode µPD71055 chip high enable INT0 ctrlprtA%, LOCATE PRINT "Port µPD71055 No1" rdval: port data before interrupt INP(port0A%) pol: read input buffer full status (bit µPD71055 this determines when data strobe occurred irq% (INP(port2A%) irq% THEN GOTO LOCATE PRINT "Before Interrupt"; rddat: read data from port dta% INP(port0A%) LOCATE PRINT "After Interrupt"; dta% SLEEP GOTO rdval
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Commercial Data Acquisition Packages
COMMERCIAL DATA ACQUISITION PACKAGES
Blue Chip Technology PIO-96 used with almost data acquisition package that read information directly from input port. PIO-96 Board with ASYST
board been tested with installable 71055.PORT digital device ASYST scientific software package Macmillan Software Company. more details about this package other data acquisition software, please contact Blue Chip Technology.
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Appendices
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APPENDIX
Address PC/XT/AT Computers Address (Hex) 000-01F 020-03F 040-05F 060-06F 070-07F 080-09F 0A0-0BF 0F8-0FF 1F0-1F8 200-207 278-27F 2F8-2FF 300-31F 360-36F 378-37F 380-38F 3A0-3AF 3B0-3BF 3C0-3CF 3D0-3DF 3F0-3F7 3F8-3FF Allocated
Controller 8237A-5 Interrupt Controller 8259A Timer, 8254 Keyboard Controller 8742; Control Port CMOS RAM, Mask (Write) Page Register (Memory Mapper) Interrupt Controller 8259 Clear (80287) Busy Reset NPX, 80287 Numeric Processor Extension, 80287 Hard Disk Drive Controller Reserved Reserved Parallel Printer Port Reserved Serial Port Reserved Reserved Parallel Printer Port Reserved SDLC Comms, Bisynch Reserved Bisynch Reserved Reserved Display Controller Diskette Drive Controller Serial Port
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Appendices
Address (Hex)
Hardware Interrupt Levels PC/XT Allocated
Timer Keyboard Reserved Asynchronous Communications (Secondary) SDLC Communications Asynchronous Communications (Primary) SDLC Communications Fixed Disk Diskette Parallel Printer
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Appendices
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Hardware Interrupt Levels PC/AT Address (Hex) Allocated
Timer Output Keyboard(Output Buffer Full) Interrupt From Controller Real Time Clock Interrupt Software Redirected INT(0AH) IRQ2 Reserved Reserved Reserved Co-Processor Fixed Disk Controller Reserved
Serial Port Serial Port Parallel Port Diskette Controller Parallel Port
Channels Floppy Disk Drive. (may used when disk inactive) Hard Disk Drive Spare
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