CameraLink® Areascan Cameras ATMOS1M60 ATMOS1M30 Product Descript
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High Sensitivity High Performance 1/2" CMOS Sensor Total Resolution 1.3M (with Square Pixels) High Data Rate: Mpixels/s Provides Frame/s Resolution (for 1M60) CameraLink® Data Format (Base Configuration Channel) Flexible Easy Operate Serial Communication Control Gain: Steps Dynamic Range: 12-bit Data Contrast Expansion Shutter Time Pogrammable Subsampling: 1/16 Resolution Trigger Mode: Free-run External Trigger Mode Programmable Test Pattern Column Correction Programmable Look-up Table Single Power Supply: Provided Hirose-6 Connector Input Trigger Signal Output Shutter Signal Hirose-5 Connector Compact Design: C-mount Adapter High Reliability Compliant
CameraLink® Areascan Cameras ATMOS1M60 ATMOS1M30
Product Description
This camera features outstanding sensitivity SNR, even maximal speeds. allows increase frame rate (for instance, format 1M60). ATMOScameras based rolling shutter CMOS sensor. configuration interface provides access advanced functions (contrast expansion, image calibration, LUT). versatile compact mechanical housing enables implement various configurations. These features combined with compelling price, make ATMOS attractive alternative users megapixel cameras.
Preliminary
Applications
High-speed, performance reliability this camera make suitable machine vision, especially: Material Inspection (e.g. glass, PCB) Robot Guidance Metrology various applications like: Microscopy Surveillance Demanding Tasks
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Typical Performances
Table 1-1. Camera Typical Performances
Sensor Characteristics Maximum Pixel Rate 1M60 Resolution Pixel size (square) Maximum frame rate Pixel rate Camera Performances depth Spectral range Linearity PRNU Responsivity Output Noise Dynamic range Conversion factor Dark Current Over Illumination Behavior Mechanical Electrical Interface Size Weight Lens Mount C-mount ±150 tiltz 0-200 single (non-condensing) (non-condensing) degree 350-1000 1.5% 0.1% 10000 1500 Esat
1M30 1312 1024 37.5
Unit Pixels
1312 1024
Bits
LSB/(Lux.s) e-/s
Sensor Alignment
Power supply Power consumption Operating temperature Storage temperature
Measured with light source 3200°K filter Warning:
When exposed such illumination level sensor might lock-up should reset Register Software Reset 206H, Internal Register Mapping page
ATMOS -1M60/1M30 [Preliminary]
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[Preliminary] ATMOS -1M60/1M30
Figure 1-1. Responsivity Diagram
Responsivity Gain
LSB/( nJ/cm2)
1000 1100
Figure 1-2.
Quantum Efficiency
Quantum Efficiency
1000
Wavelength (nm)
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Standard Conformity
cameras have been tested following conditions: Camera with complete Atmel housing Shielded power supply cable CameraLink data transfer cable ref. 14B26-SZLB-500-OLC (3MTM) Linear AC-DC power supply Atmel recommends using same configuration ensure compliance with following standards.
Conformity
ATMOS cameras comply with European directive 89/336/CEE (EN55022 A/CISPR22 EN55024, EN61000-6-2).
conformity
ATMOS Cameras comply with Part rules. Operation subject following conditions: This device cause harmful interference, This device must accept interference received, including interference that cause undesired operation. This equipment been tested found comply with limits Class digital device, pursuant part Rules. These limits designed provide reasonable protection against harmful interference when equipment operated commercial environment. This equipment generates, uses, radiate radio frequency energy and, installed used accordance with instruction manual, cause harmful interference radio communications. Operation this equipment residential area likely cause harmful interference which case user will required correct interference expense. Warning: Changes modifications this unit expressly approved party responsible compliance could void user's authority operate this equipment.
ATMOS -1M60/1M30 [Preliminary]
5429B-IMAGE-04/05
[Preliminary] ATMOS -1M60/1M30
Camera Description
Figure 3-1. Camera Synoptic
power Power Supplies
Data CameraLink Transceiver
Strobe, LVAL
FVAL
Sequencer Controller
CMOS SENSOR
Camera Link
Trigger
Shutter
Serial Line Microcontroller
camera based single CMOS sensor which delivers 12-bit digital video signal output. FPGA been implemented image processing (FPN column correction, conversion LUT, contrast expansion). camera powered single power supply from 24V. functional interface (data control) provided with CameraLink interface. camera uses base configuration CameraLink standard.
Note: DVAL permanently tied (high) level.
Data delivered single channel de-multiplexed channels. data format configuration might 12-bit, 10-bit, 8-bit. possible external triggers with camera (CC1 signal TTL_IO trigger input) different trigger modes "Synchronization Modes" page camera configuration settings done CameraLink serial communication. This interface used for: Gain offset setting Data output format Synchronization modes: free-run external trigger modes Shutter time Test pattern generation Upload download correction data (FPN column correction, LUT)
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Timing
Synchronization Modes
camera operates rolling shutter mode.
4.1.1
Optimal Rolling Shutter shown following timing diagrams, Figure 4-1, exposure does happen same time lines, which lead image distortion when capturing fast moving objects. bypass this, camera with strobe light shutter element that lines exposed during same time image distortion visible when capturing fast moving objects. integration time each line readout programmable shutter time, when used). shutter signal provided strobe light source drive shutter element. camera operate following synchronization modes: periodic, triggered, triggered without full reset ITC. register Mode Control 204H, Internal Register Mapping page
4.1.2
Free-run Mode Periodic Mode) Principle: camera operates periodic mode. period defined readout time programmable shutter time, when used). Valid data forwarded CameraLink interface during next frame readout starting with first line. shutter time frame readout while first line integrates frame N+1. soon frame readout ended starts readout frame Figure 4-1. Free-run Mode Chronogram
Line Integration (frame
Line Readout Reset
Line Readout Reset
Line Integration (Frame
Frame Readout
Frame Readout
ATMOS -1M60/1M30 [Preliminary]
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[Preliminary] ATMOS -1M60/1M30
shutter time Readout suspended between consecutive frame readout shutter output signal activated (programmable polarity) time configurable within range step Table 4-1.
Label
Shutter Time Values Free-run Mode
Description Maximum shutter time (ms) Step duration (µs) 1M60 1M30 1310
Figure 4-2.
Free-run Mode Shutter Chronogram
Line Readout Reset Line Integration (Frame
Line Readout Reset
Line Integration (Frame
Frame
Readout Time
Frame Readout Time
Shutter Programmable Shutter Time
maximum frame rate frame/s 1M60 camera frame/s 1M30 camera) given this mode with shutter time register Aperture Shutter Time 246H, Internal Register Mapping page 4.1.3 Triggered Mode Principle: external trigger starts reset sensor, then snap readout frame, integration time defined readout time programmable shutter time, when used). trigger event initiates following sequence: Stop readout frame progress reset readout pointer line Readout previous dummy frame integration start frame readout data previous frame forwarded CameraLink interface (FVAL inactive) Shutter output signal activated during time programmable within range step Readout frame readout data forwarded CameraLink interface (FVAL active) starting with first line Readout dummy frames prevent against large dark current integration) while camera waits next trigger event
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trigger delay minimum pulse duration 1µs. edge trigger programmable. source trigger selectable between CameraLink signal TTL/IO trigger input. period defined readout time programmable shutter time readout time wait. Therefore minimum period readout time. register Aperture Shutter Time 246H, Internal Register Mapping page Table 4-2.
Label
Shutter Time Values Triggered Mode
Description Maximum shutter time (ms) Step duration (µs) 1M60 1M30 1310
Figure 4-3.
Triggered Mode Chronogram
Trigger Trigger Event Line Integration (Frame
Trigger Delay Line reset
Line Readout Reset
Line Integration (Frame Line Reset
Line Readout Reset
Frame Readout
Shutter Programmable Shutter Time
FVAL
4.1.4
Triggered Mode without Full Reset Principle: external trigger starts snap readout frame, without resetting sensor. integration time defined readout time programmable shutter time, when used). trigger event initiates following sequence: Stop readout frame progress reset readout pointer line Shutter output signal activated during time programmable within range step Readout frame readout data forwarded CameraLink interface (FVAL active) starting with first line Readout dummy frames prevent against large dark current integration) while camera waits next trigger event trigger delay minimum pulse duration 1µs. edge trigger programmable. source trigger selectable between CameraLink signal TTL_IO trigger input. period defined programmable shutter time readout time wait.
ATMOS -1M60/1M30 [Preliminary]
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[Preliminary] ATMOS -1M60/1M30
Therefore minimum period reduced readout time. integration time same lines following timing diagram line integration time greater than line integration time) this mode must used with pulsed light source shutter element. Moreover residual light when shutter output signal inhibited must avoided. exposure time defined shutter time lines exposed during same time. register Aperture Shutter Time 246H Internal Register Mapping page
Table 4-3.
Label
Shutter Time Values Triggered Mode without Full Reset
Description Maximum shutter time (ms) Step duration (µs) 1M60 1M30 1310
Figure 4-4.
Triggered Mode Without Full Reset Chronogram
Trigger Trigger Event Line Integration (Frame
Trigger Delay Line1 Reset
Line Readout Reset
Line Integration (Frame Line Reset Frame Readout
Line Readout Reset
Shutter Programmable Shutter Time
FVAL
4.1.5
Mode Principle: external sync controls both integration time frame rate. trigger event initiates following sequence: Stop readout frame progress reset readout pointer line Shutter output signal activated during time defined high state signal Readout frame readout data forwarded CameraLink interface (FVAL active) starting with first line
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Readout dummy frames prevent against large dark current integration) while camera waits next trigger event integration delay minimum pulse duration 1µs. source signal selectable between CameraLink signal TTL_IO trigger input. Register Mode Control 204H Internal Register Mappingon page period defined signal period. integration time same lines following timing diagram line integration time greater than line integration time) this mode must used with pulsed light source shutter element. Moreover residual light when shutter output signal inhibited must avoided. exposure time defined signal high state time lines exposed during same time
Figure 4-5.
Mode Chronogram
Trigger Event Trigger Delay Line Reset Line Integration (Frame Line Readout Reset
Line Reset
Line Integration (Frame
Line Readout Reset
Frame Readout Shutter Shutter Time FVAL
Ouput Data Timing
Table 4-4.
Label
Timing Values
Description Input setup clock delay Output hold from clock delay
ATMOS -1M60/1M30 [Preliminary]
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[Preliminary] ATMOS -1M60/1M30
Figure 4-6. Output Data Chronogram
LVAL STROBE
DATA
First Valid Pixel
Last Valid Pixel
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Camera Features
Region Interest
full resolution camera 1312 pixels 1024 lines.You might program smaller resolution order reduce readout time. must careful that depending sequencing mode, exposure time reduced too.The authorized values horizontal size 1312 pixels. This value rounded lower multiple pixels. authorized values vertical size 1024 lines. This value rounded lower multiple lines. registers area 280H, 282H, 284H 286H Internal Register Mapping page Examples frame rate versus resolution: Table 5-1. R.O.I Performance
Size 1312 1024 1024 1024 Frame Rate 1M60 (fps) Frame Rate 1M30 (fps)
Analog Gain
analog gain adjusted setting gain register serial communication. Gain adjusted from code Step Nominal gain (factory configuration): register Sensor Analog Gain 240H, Internal Register Mapping page
Subsampling
Subsampling pixels readout (1312 1024) Subsampling times lower resolution both axes (656 512) Subsampling Four times lower resolution both axes (328 256) register Subsampling 288H, Internal Register Mapping page Subsampling parameters might combined with ROI. minimal window size resulting from these combinations must least pixels. This leads following table minimal size versus Subsampling: Table 5-2. Subsampling Minimum Size
Subsampling Minimum Size
Output Format
data format available CameraLink output interface programmable serial interface.
ATMOS -1M60/1M30 [Preliminary]
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[Preliminary] ATMOS -1M60/1M30
pixel depth default 12-bit, 8-bit. assignment each configuration comply with specifications CameraLink interface standard. register Mode Control bits [3:2] 204H, Internal Register Mapping page standard mode camera provides output data single channel CameraLink output interface. might program camera outputs mode, only with 1M60. Pixel data de-multiplexed (odd even pixels) ports CameraLink interface STROBE signal divided (37.5 MHz). register mode control 204H,Internal Register Mapping page
Test Pattern
normal mode, digital video signal from sensor available CameraLink output interface. test purposes digital pattern generated available instead video signal CameraLink output interface. pattern fixed sliding. fixed digital pattern ramp-up from code 2271 code (line width). same pattern shown each line: Figure 5-1. Test Pattern View
sliding pattern starts with fixed pattern, first code each line then incremented each frame. useful validate connection acquisition system before adjustment settings image capture. Subsampling parameter does affect pattern. register Mode Control bits [1:0] 204H, Internal Register Mapping page
Contrast Expansion
digital gain offset adjusted serial communication order focus particular part dynamic range. Gain adjusted from x32.875: code Step 0.125 Nominal gain (factory configuration): register Digital Gain 242H, Internal Register Mapping page Offset adjusted from -4096 +4095: code 8191 complement Step Nominal offset (factory configuration): register Digital Offset 244H, Internal Register Mapping page register Processing Control bits [1:0] 202H, Internal Register Mapping page
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Look- Table (LUT)
look-up Table conversion table which applies sensor data. each input pixel value corresponds single output value. This allows apply correction table like gamma correction example. Look-up Table might generated camera programming gamma setting: Gamma 0.125 7.875: code admitted) might also write your correction table serial communication channel. Four banks available store four distinct correction tables. register Coefficient Save Dataflash 10DH, Internal Register Mapping page register Coefficient Restore Dataflash 10EH, Internal Register Mapping page register Processing Control 202H, Internal register mapping page
Fixed Pattern Noise (FPN) Correction
fixed pattern noise (FPN) spatial fluctuation sensor data particularly between successive columns. purpose calculate offset each column frame darkness. table column offsets stored internal memory. correction then enabled offset values subtracted value input pixel. methods available realize this processing: off-line calibration online correction.
Off-line Calibration
calibration step required while camera darkness condition. Offset coefficients each column calculated average value measured 1024 lines. Offset coefficients 8-bit data. Therefore efficient pixel value should always within values 1LSB LSB. not, overflow underflow flags status register. calibration step must done full resolution subsampling Calibration data saved nonvolatile memory four distinct banks reserved this use. might access these banks read write mode. register Processing Control bits [4:3] 202H, Internal register mapping page register Calibration Control 200H, Internal register mapping page register Coefficient Save Dataflash 10BH, Internal register mapping page register Coefficient Restore Dataflash 10CH, Internal Register Mapping page
5.10
Online Correction
calibration step required. When online correction enabled camera calculates offset coefficients each column masked lines then processes input sensor data. These coefficients updated each frame. online correction applies only subsampling calculated values less accurate with these methods unlike off-line calibration depend settings like analog gain. register Processing Control bits [4:3] 202H, Internal Register Mapping page register Coefficient Save Dataflash 10BH,Internal Register Mapping page
ATMOS -1M60/1M30 [Preliminary]
5429B-IMAGE-04/05
[Preliminary] ATMOS -1M60/1M30
register Coefficient Restore Dataflash 10CH, Internal Register Mapping page
5.11
Processing Synoptic
Figure 5-2.
Pattern
Synoptic
FORMAT Pixel_Out
Pixel_In Coef_FPN Offset Gain
5.12
Indicator
green rear panel gives information internal state camera. power after internal configuration, flashes following behavior (decreasing priority order): Internal hardware error configuration error: fast blinking Waiting external trigger (triggered modes): slow blinking other situation: continuous
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Electrical Interface
Power Supply
recommended insert fuse between power supply camera. voltage ripple power supply shall below mVp-p have full camera performanceI Table 6-1.
Signal Name Note:
Power Supply Description
Type Description power input: Electrical mechanical ground
input, output, bi-directional signal, power/ground, connected
Command Control
CameraLink interface provides four LVDS signals dedicated camera control (CC1 CC4). ATMOS, them used synchronize camera external events. Table 6-2. CameraLink Input Description
Type RS644 Description Synchronization input
Signal Name TRIG1 Note:
input, output, bi-directional signal, power/ground, connected
TTL/I/O interface provides signals dedicated camera control. Table 6-3. TTL/IO Description
Type V-TTL V-TTL Description External trigger input Shutter output, maximum output current
Signal Name TRIGGER SHUTTER Note:
input, output, bi-directional signal, power/ground, connected
register Mode Control 204H, Internal Register Mapping page 17.Video Data. Data enable signals provided CameraLink interface. Table 6-4.
Signal Name ODD-D[11-0] EVEN-D[11-0] STROBE LVAL FVAL Note:
Camera Link Output Description
Type RS644 RS644 RS644 RS644 RS644 Description pixel data, ODD-00 LSB, ODD-11 Even pixel data, EVEN-00 LSB, EVEN-11 Output data clock, data valid rising edge Line valid line enable, active high signal Frame valid frame enable, active high signal
input, output, bi-directional signal, power/ground, connected Note: DVAL, defined CameraLink standard, used. DVAL permanently tied (high) level.
ATMOS -1M60/1M30 [Preliminary]
5429B-IMAGE-04/05
[Preliminary] ATMOS -1M60/1M30
Serial Communication
CameraLink interface provides LVDS signal pairs communication between camera frame grabber. This asynchronous serial communication based RS-232 protocol. configuration serial line Full duplex/without handshaking 8-bit data, parity bit, stop 9600 bauds power then programmable 115200 bauds Table 6-5.
Signal Name SerTFG SerTC
CameraLink Serial Communication Description
Type RS644 RS644 Description Differential pair serial communication frame grabber Differential pair serial communication from frame grabber
6.3.1
Internal Register
Table 6-6.
Start Addr (Hex)
Internal Register Mapping
Access Type Size Dec) Addr (Hex) Processing Internal Task Factory Settings Description Synchronization register serial communication (value Communication speed multiplier (9600 115,2K): volatile register Hardware identifier Firmware identifier User identifier Status (ref. Camera Status Management) Lock/Unlock mode: advanced user/user Lock advanced user mode (into user mode) Unlock value: unlock user Privilege level Advanced user mode User mode Current configuration save Eeprom User settings (allowed only advanced user mode) User settings Current configuration restore from Eeprom User settings
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Table 6-6.
Start Addr (Hex)
Internal Register Mapping (Continued)
Access Type Size Dec) Addr (Hex) Processing Internal Task Factory Settings Description coefficient save dataflash allowed only advanced user mode) coefficient restore dataflash coefficient save dataflash allowed only advanced user mode) coefficient restore dataflash Calibration control off-line calibration enabled disabled; enabled) Processing control: offset correction enable disabled; enabled) gain correction enable disabled; enabled) look-up table correction enable disabled; enabled)[ [4:3] correction mode (00: disabled; off-line correction enabled; online correction enabled) Mode control: [1:0] test pattern (00: disabled; fixed test pattern; dynamic test pattern) [3:2] output format (00:12-bit; 01:10-bit; 10:8-bit) demux mode (for 1M60 then disabled; enabled) (for 1M30 then disabled) [7:5] synchronization mode (000: Freerun; 001: External triggered; 010: external triggered without full reset; 011: integration time controlled); others reserved trigger source CameraLink; external) trigger polarity (0:positive edge; negative edge) [10] shutter polarity output positive edge; negative edge) Software reset: camera reset
ATMOS -1M60/1M30 [Preliminary]
5429B-IMAGE-04/05
[Preliminary] ATMOS -1M60/1M30
Table 6-6.
Start Addr (Hex)
Internal Register Mapping (Continued)
Access Type Size Dec) Addr (Hex) Processing Internal Task Factory Settings Description Sensor analog gain: [3:0] analog gain; value from step Digital gain (extended dynamic range): [7:0] gain; value from 1.000 32.875 255) representation Digital offset (extended dynamic range): [12:0] offset; value from -4096 4095 complement Aperture shutter time: [15:0] shutter time; value from 65535 (for 1M60: step 10µs) (for 1M30: 1310 step 20µs) ERS: [10:0] value from 0,Dark) 100% 1600, clear) Q11.4 representation area: Addr 280, size default horizontal start value 1311) Addr 282, size default vertical start value 1023) Addr 284, size default 1312 vertical size value from 1312 Addr 286, size default 1024 vertical size value from 1024 Subsampling: [2:0] Subsampling (001: 1/1; 010: 1/4; 100: 1/16) pixel detection threshold: [10:0] pixel threshold Dead pixel detection threshold: [10:0] dead pixel threshold Defective pixels control: pixel detection disabled; enabled dead pixel detection disabled; enabled)
1600
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Table 6-6.
Start Addr (Hex)
Internal Register Mapping (Continued)
Access Type Size Dec) Addr (Hex) Processing Internal Task Factory Settings Description Gamma correction: [5:0] gamma settings; value from 0.125 7.875 Q6.3 representation coefficients (8-bit): Format: [0]; Fpn[1]; [2];. Look-up table (4096 16-bit): Format: [0]; [1]; [4095] value: 4095
1000
1312
151F
2000
8192
3FFF
linear
Note:
Read Only register, Write Only register, Read Write register
6.3.2
Camera Settings Memory ATMOS cameras have banks save settings: Bank contains factory settings. This bank cannot modified user Bank used store different settings Bank might protected advanced user (see Register 104H). Contact Atmel details
ATMOS -1M60/1M30 [Preliminary]
5429B-IMAGE-04/05
[Preliminary] ATMOS -1M60/1M30
Connector Description
connectors rear panel. Better results obtained using shielded cables (foil braid shielded). Note: cables digital signals shall twisted pairs.
Power Supply
Camera connector type: Hirose HR10A-7R-6PB (male) Cable connector type: Hirose HR10A-7P-6S (female) Figure 7-1. Power Supply Pinout
Signal Power Connector Signal
Receptacle Viewed from Camera Back
CameraLink Connector
Standard CameraLink cable shall used ensure full electrical compatibility. Camera connector type: MDR-26 (female) ref. 10226-2210VE recommend CameraLink standard shielded cable 14X26-SZLB-XXX-0LC Figure 7-2. CameraLink Pinout
Command Control Connector Signal X0X1X2XclkX3SerTC+ SerTFGCC1CC2+ CC3CC4+ Signal Xclk+ SerTCSerTFG+ CC1+ CC2CC3+ CC4GND
5429B-IMAGE-04/05
Camera connector type: Hirose HR10A-7R-5SB (female) Cable connector type: Hirose HR10A-7P-5P (male) Figure 7-3. TTL/IO Pinout
Connector Signal Receptacle Viewed from Camera Back
Signal TRIGGER SHUTTER
ATMOS -1M60/1M30 [Preliminary]
5429B-IMAGE-04/05
[Preliminary] ATMOS -1M60/1M30
Mechanical Drawing
Note: (All dimensions Front Panel View Figure 8-1.
Figure 8-2.
Front Panel Mechanical Drawing
44.75 3.75
First Pixel Line sensor mount)
Camera Link
Power Supply
38.5
sides)
Note:
mechanical reference plans Sensor alignment refers optical axis Sensor alignment refers reference plans
5429B-IMAGE-04/05
Figure 8-3.
Rear Panel
Figure 8-4.
Rear Panel Mechanical Drawing
9.90
12-24V
22.80
CameraLink
31.30
ATMOS -1M60/1M30 [Preliminary]
5429B-IMAGE-04/05
[Preliminary] ATMOS -1M60/1M30
Ordering Code
Table 9-1.
Part Number AT71-ATM1M60M-B0 AT71-ATM1M30M-B0
Ordering Code
Description ATMOS 1M60 with housing power supply connector Connector CD-Rom ATMOS 1M30 with housing power supply connector Connector CD-Rom
Delivery: ATMOS areascan cameras delivered with: Power supply connector HR10A-7P-6S connector HR10A-7P-5P CD-rom with: Friendly software CommCam Documentation
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5429B-IMAGE-04/05
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