Description These SERDES Transceivers intended used Gbit/s optical SON
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Alcatel 1964 SONET integrated modules SERDES Transceiver (Transponder) STM-64 OC-192
Description These SERDES Transceivers intended used Gbit/s optical SONET rate provide electrical accesses lower Mbit/s rate. modules housed space-saving 300-pin package, providing same electrical access overall applications. transmitter side contains in-house cooled EA-ILM laser with laser driver temperature control loop. transmit path starts with serializer Asic. receiver contains in-house III-V detector with preamplifier front-end module, main amplifier Asic, clock data recovery function with accurate decision circuit. receive path ends with deserializer Asic. Alcatel 1964 family range SERDES transceivers modules, providing convenient flexible optical interfaces SONET systems operating 9.95 Gbit/s 10.709 Gbit/s exceed applicable ITU-T G.691, Telcordia GR-253-ed.3 Optical Interworking Forum OIF99.102 standards. Features International Standard Multisource Optical Interfaces Upward compatibility with different features Applications: Short-Reach Intra-Office Intermediate-Reach ShortHaul Optical 9.95 Gbit/s rate 10.709 Gbit/s rate (FEC) Electrical Mbit/s rate Mbit/s rate (FEC) Operating wavelength Full performance operating case temperature from Space-saving package inch inch (8.9 10.16 Alcatel Reliability Qualification Program built quality Transmitter: EA-ILM 1.5µ cooled laser optical output 16x2 input data Mbit/s LVDS ref. clock PECL compatible Shut down command Analog monitoring Digital alarms Power supplies: Power consumption: typical Receiver: InGaAs PIN-preamp detector High typical sensitivity 16x2 output data Mbit/s LVDS ref. clock PECL compatible Analog monitoring Digital alarms Power supplies: Power consumption: typical Applications Used transmission systems from high-speed intermediate-reach long-reach applications, Alcatel 1900 family operates SONET OC-192 rates well ITU-T STM-64 rates. Covering types SONET optical interfaces (tributaries aggregates) Alcatel 1900 modules suitable line systems, Drop Multiplexers digital cross-connects well switches routers. part global Alcatel 1900 family, Alcatel 1964 ShortHaul module first version types STM-64 (Intra-office, ShortHaul Long-Haul) OC-192 (Short-Reach, Intermediate-Reach Long-Reach) optical interfaces. These modules ensure ease offer flexibility Gbit/s optical links system designers.
Optical characteristics
Condition Target distance Optical budget Dispersion Path penalty Transmitter Center wavelength Optical output power Spectral width SMSR Extinction ratio Shutdown optical power Generated jitter Return loss Receiver Receiver sensitivity Receiver overload Generated jitter Reflectance Note Note Note Symb I-64.2 SR-2 1530 1550 1565 S-64.2b IR-2 1530 1550 1565 Unit ps/nm UIpp UIpp
Note Note Note Note
SNOM SIDLE
Note Note Note
RNOM RNOM
Note Optical budgets defined based Telcordia GR-253-ed.3 ITU-T G.691. Note From bandwidth jitter TxREFCLK. Note Measured connector interface. Note maximum full width central wavelength peak; measured down from maximum amplitude under modulation condition 9.95328 Gbit/s PRBS 223-1. Note Measured connector interface under modulation conditions 9.95328 Gbit/s PRBS 223-1. Note Measured 10-12 under modulation conditions 9.95328 Gbit/s PRBS 223-1 parameters specified End-of-Life within overall relevant operating temperature range. typical values referenced nominal power supply, beginning life.
Electrical characteristics
Parameter Negative supply voltage Negative supply current Positive supply voltage Positive supply current Positive supply voltage Positive supply current Power dissipation Common mode LVDS input voltage Differential LVDS input swing LVDS output differential voltage LVDS differential input impedance LVTTL input voltage LVTTL input high voltage LVTTL input current LVTTL input high current LVTTL output voltage LVTTL output high voltage LVPECL differential input voltage swing Condition Symbol LVDSVI LVDSVIDTH LVDSVOD LVDSRIN LVTTLVIL LVTTLVIH LVTTLIIL LVTTLIIH LVTTLVOL LVTTLVOH LVPECL VDIF 4.94 3.13 4.75 Typical 5.45 1300 3.47 2000 5.25 1700 1000 Unit mVpp
Total -500
Note
-100 Note
Note Peak peak single ended voltage. Note Internally coupled parameters specified End-of-Life within overall relevant operating temperature range. typical values referenced nominal power supply, beginning life.
Outline drawing
Framer Transceiver clocking
TxREFCLK
Clocking definition
TxREFCLK Transmitter Reference Clock Input: Differential clock PECL compatible input, internally coupled with terminated. Transmitter Parallel Data Input: Differential Mbit/s LVDS input, internally differential terminated. Transmitter Reference Parallel Clock Input: Differential clock LVDS input, internally differential terminated. Transmitter Reference Parallel Clock Output: Differential clock LVDS output. Transmitter Monitor Clock: LVDS clock output signal. This signal represents synthesized frequency serializer. Receiver Parallel Data Output: Differential Mbit/s LVDS output. Receiver Reference Parallel Clock Output: Differential clock LVDS output. Receiver Monitor Clock: Differential LVDS output signal. This signal represents clock. Receiver Reference Clock Input: Differential clock PECL compatible input.
SONET Framer
TxDin TxPICLK TxPCLK RxDout RxPOCLK RxMCLK
OC192 SERDES
TxDin
TxPICLK
TxMCLK
TxPCLK
TxMCLK
RxDout RxPOCLK
RxREFCLK
RxMCLK
RxREFCLK
from customer line card
Rx+5VA Rx+5VA RxRATESEL Rx3.3VA Rx3.3VA RxRESET Rx-5.2VA Rx-5.2VA Rx-5.2VA Rx-5.2VA Tx+5VA Tx+5VA Tx3.3VA Tx3.3VA TxRATESEL Tx3.3VA Tx3.3VA TxRESET Tx-5.2VA Tx-5.2VA Tx-5.2VA Tx-5.2VA
FGND FGND FGND FGND RxAGND RxAGND RxAGND RxAGND RxAGND RxAGND TxAGND TxAGND TxAGND TxAGND TxAGND TxAGND FGND FGND FGND FGND
RxDout12P RxDout12N RxDigGND RxDout13P RxDout13N RxDigGND RxDout14P RxDout14N RxDigGND RxDout15P RxDout15N RxDigGND RxDigGND TxDin12P TxDin12N TxDigGND TxDin13P TxDin13N TxDigGND TxDin14P TxDin14N TxDigGND TxDin15P TxDin15N TxDigGND TxPICLKP TxPICLKN TxDigGND
RxPOWMON Rx3.3VD Rx3.3VD RxPOWALM Rx3.3VD Rx3.3VD Rx-5.2VD Rx-5.2VD Rx-5.2VD Rx-5.2VD LsBIASMON Tx3.3VD Tx3.3VD LsENABLE Tx3.3VD Tx3.3VD LsBIASALM Tx-5.2VD Tx-5.2VD LsTEMPALM Tx-5.2VD Tx-5.2VD TxREFSEL
RxDout8P RxDout8N RxDigGND RxDout9P RxDout9N RxDigGND RxDout10P RxDout10N RxDigGND RxDout11P RxDout11N RxDigGND RxPOCLKP RxPOCLKN RxDigGND TxDin8P TxDin8N TxDigGND TxDin9P TxDin9N TxDigGND TxDin10P TxDin10N TxDigGND TxDin11P TxDin11N TxDigGND TxPCLKP TxPCLKN TxDigGND
RxDigGND RxDigGND RxDigGND RxDigGND RxDigGND RxDigGND RxDigGND RxDigGND RxDigGND RxDigGND TxDigGND TxDigGND LsPOWMON TxDigGND TxDigGND LsTEMPMON TxDigGND TxDigGND TxDigGND TxDigGND TxDigGND TxDigGND
RxDout4P RxDout4N RxDigGND RxDout5P RxDout5N RxDigGND RxDout6P RxDout6N RxDigGND RxDout7P RxDout7N RxDigGND RxMCLKP RxMCLKN RxDigGND TxDin4P TxDin4N TxDigGND TxDin5P TxDin5N TxDigGND TxDin6P TxDin6N TxDigGND TxDin7P TxDin7N TxDigGND Tx155MCKP Tx155MCKN TxDigGND
RxDigGND RxDigGND RxDigGND RxDigGND RxDigGND RxDigGND RxLCKREF RxDigGND RxDigGND RxDigGND RxDigGND RxLOCKERR TxDigGND TxDigGND TxSKEWSEL0 TxDigGND TxDigGND TxSKEWSEL1 TxDigGND TxDigGND TxDigGND TxDigGND TxPICLKSEL TxDigGND TxDigGND TxLOCKERR
RxDout0P RxDout0N RxDigGND RxDout1P RxDout1N RxDigGND RxDout2P RxDout2N RxDigGND RxDout3P RxDout3N RxDigGND RxREFCLKP RxREFCLKN RxDigGND TxDin0P TxDin0N TxDigGND TxDin1P TxDin1N TxDigGND TxDin2P TxDin2N TxDigGND TxDin3P TxDin3N TxDigGND TxREFCLKP TxREFCLKN TxDigGND
Receiver Transmitter
Receiver power supplies Receiver d.c. signals differential signals
Transmitter power supplies Transmitter d.c. signals differential signals
User Connection Reserve Future
Receiver description
RxDout##P
RxREFCLKN
Receiver Data Output Positive: Mbit/s LVDS output signal. Data RxMCLKP synchronized output module with output clock RxPOCLK signal. RxDout15 most significant RxMCLKN first received.
RxDout##N Receiver Data Output Negative: Mbit/s LVDS output signal. Data RxLCKREF synchronized output module with output clock RxPOCLK signal. RxDout15 most significant first received. RxPOCLKP Receiver Parallel Output Clock Positive: LVDS output. Regenerated clock synchronized data. falling edge RxRESET RxPOCLKP middle data pattern.
RxLOCKERR Receiver Loss Clock Error: LVTTL output alarm. logic when clock recovery locked onto optical data stream. logic high Receiver Monitor Clock Positive: normal operation. LVDS output signal. RxRATESEL Receiver rate Selection LVTTL This signal represents input command. Selects clock. rate. When logic high, Receiver Monitor Output Clock standard 9.95328Gbits/s Negative: LVDS rate selected, it's logic output signal. This signal rate 10.709Gbit/s represents clock. selected. Note that this Receiver Lock Clock Reference: case RxREFCLK frequency LVTTL input command. Selects 167.328MHz. reference frequency mode Reserve Future Use. RxPOCLK. When logic low, RxPOCLK forced lock RxREFCLK. When logic high, RxPOCLK locked reference clock. Receiver deserializer RESET: LVTTL input command. When logic low, deserializer function reinitialized. User Connection.
Receiver Reference Clock Negative: PECL compatible, internally coupled terminated.
RxPOCLKN
RxREFCLKP
Receiver Parallel Output Clock Negative: output RxPOWMON Receiver Power Monitoring: signal. Regenerated clock analog output monitor. This synchronized data. voltage proportional rising edge RxPOCLKN mean optical input power. middle data pattern. Typical slope from Receiver Reference Clock to-17dBm. Positive: PECL, RxPOWALM Receiver Power Alarm: LVTTL compatible, internally output alarm. logic coupled terminated. when incoming optical power less than -17dBm+/2dB.
Transmitter description
TxDin##P
TxREFCLKN
Transmitter Data Input Positive: Mbit/s LVDS input signal. Data retimed input module input clock TxPICLK signal. TxDin15 most significant first transmitted TxMCLKP Transmitter Data Input Negative: Mbit/s LVDS input signal. Data retimed input module input clock TxPICLK signal. TxMCLKN TxDin15 most significant first transmitted. Transmitter Parallel Input Clock Positive: LVDS input signal. When TxPICLKSEL TxPICLKSEL logic low, frequency rising edge TxPICLKN middle data pattern. When TxPICLKSEL logic high, frequency rising/falling edges TxREFSEL TxPICLKN middle data crossing point. Transmitter Parallel Input Clock Negative: LVDS input signal. When TxPICLKSEL logic low, frequency TxSKEWSEL0 falling edge TxPICLKN middle data pattern. When TxPICLKSEL logic high, frequency falling edge TxPICLKN middle data crossing TxSKEWSEL1 point. Transmitter Parallel Clock output Positive: LVDS output signal. Reference clock generated from TxREFCLK TxRATESEL signal. Usable synchronize output data stage framer ASIC. Transmitter Parallel Clock output Negative: LVDS output signal. Reference clock generated from TxREFCLK signal. Usable synchronize output data stage framer ASIC. Transmitter Reference Clock TxRESET Positive: PECL compatible input signal. When TxREFSEL0 logic low, frequency MHz. LsENABLE When RxREFSEL0 logic high, frequency MHz.
Transmitter Reference Clock Negative: PECL compatible input signal. When TxREFSEL0 logic low, frequency MHz. When RxREFSEL0 logic high, frequency MHz. Transmitter Monitor Clock Positive: LVDS clock output signal. This signal represents synthesized frequency serializer. Transmitter Monitor Clock Negative: LVDS clock output signal. This signal represents synthesized frequency serializer. Transmitter Parallel Clock Select: LVTTL input command. Selects reference frequency mode TxPICLK. When logic low, frequency MHz. When logic high, frequency MHz. Transmitter Reference clock Select LVTTL input command. Selects reference frequency mode TxREFCLK. When logic low, frequency MHz. When logic high, frequency MHz. Transmitter Adjusts Skew TxPICLK Select: LVTTL input command. This digital logic input allows delaying internally TxPICLK mode. Transmitter Adjusts Skew TxPICLK Select: LVTTL input command. This digital logic input allows delaying internally TxPICLK mode. Transmitter Rate Selection: LVTTL input command. Selects rate. When logic high, standard 9.95328Gbits/s rate selected, it's logic rate 10.709Gbit/s selected. Note that this case TxREFCLK frequency 167.328MHz 669.312MHz. Transmitter serializer RESET: LVTTL input command. When logic low, serializer function reinitialized. Laser Enable: LVTTL input command. When logic high, laser disabled. When logic low, laser enabled.
TxLOCKERRTransmitter Lock Error: LVTTL output alarm. When logic low, indicates that serializer locked TxREFCLK. When logic high, serializer normal operating. LsBIASALM Laser Bias Alarm: LVTTL output alarm. When logic low, laser reached life condition. When logic high, laser normal operating. LsTEMPALM Laser Temperature Alarm: LVTTL output alarm. When logic low, laser temperature approximately above below normal operating. When logic high, laser normal operating. LsBIASMon Laser Bias Monitoring: analog output monitor. This voltage proportional laser current. typical slope LsPOWMon Laser Power Monitoring: analog output monitor. This voltage proportional laser output power. Normalized 0.5V over lifetime, drift output power correlates with variation output voltage. LsTEMPMonLaser temperature Monitoring: analog output monitor. This voltage represents laser temperature deviation. Normalized 2.5V over lifetime. Reserved further additional features. User Connection. This left open.
TxDin##N
TxPICLKP
TxPICLKN
TxPCLKP
TxPCLKN
TxREFCLKP
Absolute maximum ratings
Parameter Maximum optical input power Negative supply voltage Positive supply voltage Positive supply voltage Control input voltage Digital output voltage Analog output voltage Alarm output voltage Storage temperature Storage Operating case temperature Symbol Unit
July 2001 Copyright 2001 Alcatel Optronics Customized versions available large quantities. Performance figures contained this document must specifically confirmed writing Alcatel Optronics before they become applicable particular order contract. Alcatel Optronics reserves right make changes products information contained herein without notice.
TSTG
Ordering information
Alcatel 1964
Dispersion (ps/nm) I-64.2 SR-2 I-64.2 SR-2 S-64.2b IR-2 S-64.2b IR-2 Options xxxxx
Span (km)
Part Number 00576 00578 00532 00577
FC/PC SC/PC
With heat sink Without heat sink
Standards
Compliant with ITU-T G.691 Telcordia GR-253-ed.3 Optical Interworking Forum OIF99.102 Optical fiber according ITU-T G.652 Environment according 68-2 Telcordia TR-EOP-000063
EUROPE Route Villejust F-91625 NOZAY CEDEX (+33) (+33) 15036, Conference Centre Drive CHANTILLY 20151 (+1) 3600 (+1) 6667 CANADA Villebois, suite Gatineau (PQ) Canada, (+1) 3922 (+1) 1183 JAPAN Dai-Tokyo Kasai Shinjuku Building 3-25-3, Yoyogi, Shibuya-Ku TOKYO 0053 (+81) 5302 4341 (+81) 5302 4331
LASER RADIATION AVOID EXPOSURE BEAM Class laser product
ATTENTION OBSERVE PRECAUTIONS HANDLING ELECTROSTATIC DISCHARGE SENSITIVE DEVICES
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