Quad 2-Input Gate with LSTTL-Compatible Inputs MC54/74HCT32A used
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Quad 2-Input Gate with LSTTL-Compatible Inputs
MC54/74HCT32A used level converter interfacing NMOS outputs High-Speed CMOS inputs. HCT32A identical pinout LS32. Output Drive Capability: LSTTL Loads TTL/NMOS Compatible Input Levels Outputs Directly Interface CMOS, NMOS Operating Voltage Range: Input Current: Compliance with Requirements Defined JEDEC Standard Chip Complexity: FETs Equivalent Gates
MC54/74HCT32A
SUFFIX CERAMIC PACKAGE CASE 632-08
SUFFIX PLASTIC PACKAGE CASE 646-06
SUFFIX SOIC PACKAGE CASE 751A-03
ORDERING INFORMATION
LOGIC DIAGRAM
Y=A+B
MC54HCTXXAJ MC74HCTXXAN MC74HCTXXAD
Ceramic Plastic SOIC
ASSIGNMENT
FUNCTION TABLE
Inputs Output
10/95
Motorola, Inc. 1995
Maximum Ratings those values beyond which damage device occur. Functional operation should restricted Recommended Operating Conditions. Derating Plastic DIP: mW/_C from 125_C Ceramic DIP: mW/_C from 100_ 125_C SOIC Package: mW/_C from 125_C high frequency heavy load considerations, Chapter Motorola High-Speed CMOS Data Book (DL129/D). Input GND, Other Inputs lout NOTE: Information typical parametric values found Chapter Motorola High-Speed CMOS Data Book (DL129/D).
MAXIMUM RATINGS*
RECOMMENDED OPERATING CONDITIONS
ELECTRICAL CHARACTERISTICS MC54/74HCT32A (Voltages Referenced GND)
MC54/74HCT32A
Symbol
Symbol
Vin, Vout
Symbol
Vout
Tstg
Iout
Additional Quiescent Supply Current
Maximum Quiescent Supply Current (per Package)
Maximum Input Leakage Current
Maximum Low-Level Output Voltage
Minimum High-Level Output Voltage
Maximum Low-Level Input Voltage
Minimum High-Level Input Voltage
Lead Temperature, from Case Seconds (Plastic DIP) (Ceramic DIP)
Storage Temperature
Power Dissipation Still Air, Plastic Ceramic SOIC Package
Supply Current, Pins
Output Current,
Input Current,
Output Voltage (Referenced GND)
Input Voltage (Referenced GND)
Supply Voltage (Referenced GND)
Input Rise Fall Time (Figure
Operating Temperature, Package Types
Input Voltage, Output Voltage (Referenced GND)
Supply Voltage (Referenced GND)
Parameter
Parameter
Parameter
Iout
|Iout|
|Iout|
|Iout|
|Iout|
Vout |Iout|
Vout |Iout|
Test Conditions
Value Volts 25_C 3.98 Unit Unit
0.26
55_C
Guaranteed Limits
3.84
This device contains protection circuitry guard against damage high static voltages electric fields. However, precautions must taken avoid applications voltage higher than maximum rated voltages this high-impedance circuit. proper operation, Vout should constrained range (Vin Vout) VCC. Unused inputs must always tied appropriate logic voltage level (e.g., either VCC). Unused outputs must left open.
85_C
0.33
High-Speed CMOS Logic Data DL129 25_C 125_C
125_C
Unit
NOTE: propagation delays with loads other than information typical parametric values, Chapter Motorola High- Speed CMOS Data Book (DL129/D).
High-Speed CMOS Logic Data DL129 Symbol OUTPUT tPLH, tPHL tTLH, tTHL INPUT Power Dissipation Capacitance (Per Gate)* Maximum Input Capacitance Maximum Output Transition Time, Output Maximum Propagation Delay, Input Output tTLH
Used determine no-load dynamic power consumption: load considerations, Chapter Motorola High-Speed CMOS Data Book (DL129/D).
CHARACTERISTICS MC54/74HCT32A (VCC 10%, Input
Figure Switching Waveforms
tPLH
Parameter
tPHL
EXPANDED LOGIC DIAGRAM (1/4 DEVICE)
tTHL
Fig. 25_C Typical 25°C, Guaranteed Limits
Includes probe capacitance
85_C
DEVICE UNDER TEST
Figure Test Circuit
MC54/74HCT32A
OUTPUT
125_C
TEST POINT
MOTOROLA Unit
MC54/74HCT32A
OUTLINE DIMENSIONS
SUFFIX CERAMIC PACKAGE CASE 632-08 ISSUE
-A14
NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: INCH. DIMENSION CENTER LEAD WHEN FORMED PARALLEL. DIMESNION NARROW 0.76 (0.030) WHERE LEAD ENTERS CERAMIC BODY. INCHES 0.750 0.785 0.245 0.280 0.155 0.200 0.015 0.020 0.055 0.065 0.100 0.008 0.015 0.125 0.170 0.300 0.020 0.040 MILLIMETERS 19.05 19.94 6.23 7.11 3.94 5.08 0.39 0.50 1.40 1.65 2.54 0.21 0.38 3.18 4.31 7.62 0.51 1.01
-TSEATING PLANE
0.25 (0.010)
0.25 (0.010)
SUFFIX PLASTIC PACKAGE CASE 646-06 ISSUE
NOTES: LEADS WITHIN 0.13 (0.005) RADIUS TRUE POSITION SEATING PLANE MAXIMUM MATERIAL CONDITION. DIMENSION CENTER LEADS WHEN FORMED PARALLEL. DIMENSION DOES INCLUDE MOLD FLASH. ROUNDED CORNERS OPTIONAL. INCHES 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 0.052 0.095 0.008 0.015 0.115 0.135 0.300 0.015 0.039 MILLIMETERS 18.16 19.56 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 1.32 2.41 0.20 0.38 2.92 3.43 7.62 0.39 1.01
SEATING PLANE
SUFFIX PLASTIC SOIC PACKAGE CASE 751A-03 ISSUE
0.25 (0.010)
NOTES: DIMENSIONING TOLERANCING ANSI Y14.5M, 1982. CONTROLLING DIMENSION: MILLIMETER. DIMENSIONS INCLUDE MOLD PROTRUSION. MAXIMUM MOLD PROTRUSION 0.15 (0.006) SIDE. DIMENSION DOES INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL 0.127 (0.005) TOTAL EXCESS DIMENSION MAXIMUM MATERIAL CONDITION.
SEATING PLANE
0.25 (0.010)
MILLIMETERS 8.75 8.55 4.00 3.80 1.75 1.35 0.49 0.35 1.25 0.40 1.27 0.25 0.19 0.25 0.10 5.80 6.20 0.25 0.50
INCHES 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 0.008 0.009 0.004 0.009 0.228 0.244 0.010 0.019
High-Speed CMOS Logic Data DL129
MC54/74HCT32A
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High-Speed CMOS Logic Data DL129
CODELINE
*MC54/74HCT32A/D*
MC54/74HCT32A/D
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