QUALITY SEMICONDUCTOR, INC. QuickSwitch® Products Last Value Latc

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QUALITY SEMICONDUCTOR, INC. QuickSwitch® Products Last Value Latc

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QS3389
QUALITY SEMICONDUCTOR, INC.
QuickSwitch® Products Last Value Latch Active Terminators (Bus Hold)
DESCRIPTION
QS3389
Active termination pulls pins rails Holds last value input signal Ideal replacement resistive termination Ultra quiescent current Available 24-pin QSOP Bus-hold eliminates floating lines reduces static power consumption power QCMOS technology Operates over 5.5V range TTL-compatible input output levels added noise ground bounce independent terminator circuits
APPLICATIONS
termination Extend data hold time
QS3389 provides active termination circuits which pull data signals voltage rails. This feature prevents signals from floating threshold region standard devices. QS3389 replace resistor termination solutions which power dissipation increase component count. Input clamp diodes help reduce reflections undershoot transmission line environments. Importantly, terminator circuits pull signals whichever logic state signal previously held (HIGH LOW). this reason, this device also referred last value latch. This device appropriate data applications where interfacing devices have CMOS inputs with input currents. These terminators provide sufficient drive overcome leakage currents drive corresponding signals away from threshold region.
Figure Functional Block Diagram
MDSL-00059-02 JULY 1997
QUALITY SEMICONDUCTOR, INC.
QS3389 Table Capacitance
25°C, 1MHz, VOUT QSOP Pins T19-T0
Figure Configuration (All Pins View)
SOIC, QSOP
Note: Capacitance characterized tested. total capacitance while switch please Section under "Input Switch Capacitance."
Table Absolute Maximum Ratings
Supply Voltage Ground -0.5V +7.0V Switch Voltage -0.5V +7.0V Input Voltage (for pulse width 20ns) -3.0V Output Current Max. Sink Current/Pin 120mA Maximum Power Dissipation watts TSTG Storage Temperature -65° +150°C
Note: ABSOLUTE MAXIMUM CONTINUOUS RATING those values beyond which damage device occur. Exposure these conditions conditions beyond those indicated rating adversely affect device reliability. Functional operation under absolute-maximum conditions implied.
Table Power Supply Characteristics
Symbol ICCQ Parameter Quiescent Power Supply Current Test Conditions(1) Max., VCC, Unit
Notes: conditions shown Min. Max., appropriate values specified under specifications.
QUALITY SEMICONDUCTOR, INC.
MDSL-00059-02 JULY 1997
QS3389 Table Electrical Characteristics Over Operating Range
Commercial: 70°C, 5.0V Symbol Parameter Input HIGH Voltage Input Voltage Threshold Voltage Input Leakage Current(2) Input Current(5) Input High Hold Inputs(2,3) Hold Sustaining(6,7) Current Hold Inputs Terminator Resistance Max., Max., 0.8V 2.0V Min. 2.0V 0.8V Test Conditions Typ(1) 500(4) Unit
IBHH IBHL
Notes: Typical values measured 5.0V 25°C. Trip Current Definition (see Figure discussion): external driver must source least switch node from HIGH. external driver must sink least switch node from HIGH LOW. Hold Current Definition (see Figure discussion): Maximum Current QS3389 sink without raising node above max. Maximum Current QS3389 source without lowering node below min. external driver must provide least during transition guarantee that Bus-hold input will change states. Magnitude input current specified under conditions: Input voltage VCC. This indicates input current under steady-state conditions. Input voltage between 0.8V 2.0V (TTL input threshold range). This indicates maximum input current during transient condition. driver connected input must overcome this current requirement order switch logic state Bus-hold circuit. IBHL Minimum sustaining `sink' current input 0.8V. This parameter signifies latching capability Bus-hold circuit logic state. IBHH Minimum sustaining `source' current input 2.0V. This parameter signifies latching capability Bus-hold circuit HIGH state.
MDSL-00059-02 JULY 1997
QUALITY SEMICONDUCTOR, INC.
QS3389
IBHL
IBHH
IBHL
-500
Threshold Voltage 1.5V
Figure Trip Hold Current Characteristics Last Valve Latch
Active Terminator `Bus-hold' Circuit
Active Terminator circuit, also known Bus-hold circuit, configured `weak latch' with positive feedback. When connected CMOS input port, Bus-hold circuit holds last logic state input when input `disconnected' from driver. When output device connected such input attempts logic level transition, will overdrive Bus-hold circuit. primary benefit Bus-hold circuit that prevents CMOS inputs from floating, situation which should avoided prevent spurious switching inputs unnecessary power dissipation. Bus-hold better solution than traditional approach using resistive termination prevent floating, because Bus-hold circuit does consume static power. Figure shows input characteristics typical Bus-hold implementation. input characteristics resemble resistor. input voltage increased from Volts, input `sink' current increases linearly. When threshold circuit reached (typically Volts), latch changes logic state positive feedback direction current reversed. input voltage further increased towards VCC, input `source' current begins decrease, reaching lowest level VCC.
QUALITY SEMICONDUCTOR, INC.
MDSL-00059-02 JULY 1997

QUALITY SEMICONDUCTOR, INC. QuickSwitch® Products Last Value Latc

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