IDT74ALVCHR16409 3.3V CMOS 9-BIT, 4-PORT UNIVERSAL EXCHANGER WITH 3-ST

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IDT74ALVCHR16409 3.3V CMOS 9-BIT, 4-PORT UNIVERSAL EXCHANGER WITH 3-ST

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IDT74ALVCHR16409 3.3V CMOS 9-BIT, 4-PORT UNIVERSAL EXCHANGER
IDT74ALVCHR16409 3.3V CMOS 9-BIT, 4-PORT UNIVERSAL EXCHANGER WITH 3-STATE OUTPUTS BUS-HOLD
MICRON CMOS Technology Typical tSK(0) (Output Skew) 250ps 2000V MIL-STD-883, Method 3015; 200V using machine model 200pF, 0.635mm pitch SSOP, 0.50mm pitch TSSOP, 0.40mm pitch TVSOP packages Extended commercial range 40°C 85°C 3.3V 0.3V, Normal Range 2.7V 3.6V, Extended Range 2.5V 0.2V CMOS power levels (0.4µW typ. static) Rail-to-Rail output swing increased noise margin Drive Features ALVCHR16409: Balanced Output Drivers: ±12mA switching noise
DESCRIPTION:
This 9-bit, 4-port universal exchanger built using advanced dual metal CMOS technology. ALVCHR16409 allows synchronous data exchange between four different buses. Data flow controlled select (SEL0-SEL4) inputs. data-flow state stored rising edge clock (CLK) input select-enable (SELEN) input low. Once data-flow state been established, data stored flip-flop rising edge SELEN high. data-flow control logic designed allow glitch-free data transmission. When preset (PRE) transitions high, outputs disabled immediately without waiting clock pulse. leave high-impedance state, both SELEN must clock pulse must applied. ALVCHR16409 been designed with ±24mA output driver. This driver capable driving moderate heavy load while maintaining speed performance. ALVCHR16409 "bus-hold" which retains inputs' last state whenever input goes high impedance. This prevents floating inputs eliminates need pull-up/down resistors.
APPLICATIONS:
3.3V High Speed Systems 3.3V lower voltage computing systems
FUNCTIONAL BLOCK DIAGRAM
SELEN
SEL2
SEL0 SEL1
Flow Storage Control
SEL3 SEL4
Channels
1999 Integrated Device Technology, Inc.
OCTOBER 1999
DSC-4586/-
IDT74ALVCHR16409 3.3V CMOS 9-BIT, 4-PORT UNIVERSAL EXCHANGER
CONFIGURATION
SEL0
ABSOLUTE MAXIMUM RATING
Unit
NEW16link
Symbol VTERM(2)
SELEN
VTERM(3) TSTG IOUT
Description Terminal Voltage with Respect Terminal Voltage with Respect Storage Temperature Output Current Continuous Clamp Current, Continuous Clamp Current, Continuous Current through each
Max. ±100
SO56-1 SO56-2 SO56-3
NOTES: Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS cause permanent damage device. This stress rating only functional operation device these other conditions above those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect reliability. terminals. terminals except VCC.
CAPACITANCE +25oC, 1.0MHz)
Symbol COUT CI/O Parameter(1) Input Capacitance Output Capacitance Port Capacitance Conditions VOUT Typ. Max. Unit
NEW16link
NOTE: applicable device type.
FUNCTION TABLE
Inputs Send Port
Output Receive Port BO(2) BO(2)
SEL1 SEL2
SEL4 SEL3
SSOP/TSSOP/TVSOP VIEW
DESCRIPTION
Names SELEN SEL0-SEL4 Description Preset Input (Active LOW) Select Enable Input (Active LOW) Select Inputs Clock Input A-to-B Data Inputs B-to-A 3-State Outputs(1) B-to-A Data Inputs A-to-B 3-State Outputs(1)
NOTES: HIGH Voltage Level Voltage Level Don't Care LOW-to-HIGH Transition Output level before indicated steady-state input conditions were established.
NOTE: These pins have "Bus-Hold." other pins standard inputs, outputs, I/Os.
IDT74ALVCHR16409 3.3V CMOS 9-BIT, 4-PORT UNIVERSAL EXCHANGER
DATA FLOW CONTROL
Inputs SELEN SEL0 SEL1 SEL2 SEL3 SEL4 Data Flow outputs disabled change None, I/Os used used used used used used used
IDT74ALVCHR16409 3.3V CMOS 9-BIT, 4-PORT UNIVERSAL EXCHANGER
ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Operating Condition: 40°C +85°C
Symbol IOZH IOZL ICCL ICCH ICCZ Parameter Input HIGH Voltage Level Input Voltage Level Input HIGH Current Input Current High Impedance Output Current (3-State Output pins) Clamp Diode Voltage Input Hysteresis Quiescent Power Supply Current 2.3V, 18mA 3.3V 3.6V input 0.6V, other inputs Test Conditions 2.3V 2.7V 2.7V 3.6V 2.3V 2.7V 2.7V 3.6V 3.6V 3.6V 3.6V Min. Typ.(1) Max. Unit
Quiescent Power Supply Current Variation
NEW16link
NOTE: Typical values 3.3V, +25°C ambient.
BUS-HOLD CHARACTERISTICS
Symbol IBHH IBHL IBHH IBHL IBHHO IBHLO
NEW16link
Parameter(1) Bus-Hold Input Sustain Current Bus-Hold Input Sustain Current Bus-Hold Input Overdrive Current
3.0V 2.3V 3.6V
Test Conditions 2.0V 0.8V 1.7V 0.7V 3.6V
Min.
Typ.(2)
Max.
Unit
NOTES: Pins with Bus-hold identified description. Typical values 3.3V, +25°C ambient.
IDT74ALVCHR16409 3.3V CMOS 9-BIT, 4-PORT UNIVERSAL EXCHANGER
OUTPUT DRIVE CHARACTERISTICS
Symbol Parameter Output HIGH Voltage Test Conditions(1) 2.3V 3.6V 0.1mA 2.7V 3.0V Output Voltage 2.3V 3.6V 2.3V 2.7V 3.0V 12mA 0.1mA 12mA Min. Max. 0.55 0.55
NEW16link
Unit
2.3V
NOTE: must within min. max. range shown ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table appropriate range. 40°C 85°C.
OPERATING CHARACTERISTICS, 25oC
2.5V 0.2V Symbol Parameter Power Dissipation Capacitance exchanger Outputs enabled Power Dissipation Capacitance exchanger Outputs disabled Test Conditions 0pF, 10Mhz Typical 3.3V 0.3V Typical Unit
IDT74ALVCHR16409 3.3V CMOS 9-BIT, 4-PORT UNIVERSAL EXCHANGER
SWITCHING CHARACTERISTICS
Symbol fMAX tPLH tPHL tPZH tPZL tPHZ tPLZ tPHZ tPLZ tSK(o) Parameter Propagation Delay Output Enable Time Output Disable Time Output Disable Time Setup Time, before Hold Time, after Setup Time, before Hold Time, after Setup Time, SELEN before Hold Time, SELEN after Setup Time, before Pulse Width, HIGH Output Skew(2)
2.5V 0.2V Min. Max.
2.7V Min. Max.
3.3V 0.3V Min. Max. Unit
NOTES: test circuits waveforms. 40°C 85°C. Skew between outputs same package switching same direction.
TIMING DIAGRAM
SELE
disCLK
Send Port
Receive Port
IDT74ALVCHR16409 3.3V CMOS 9-BIT, 4-PORT UNIVERSAL EXCHANGER
TEST CIRCUITS WAVEFORMS: TEST CONDITIONS PROPAGATION DELAY
Symbol VLOAD VCC(1)= 3.3V±0.3V VCC(1)= 2.7V VCC(2)= 2.5V±0.2V Unit
NEW16link
SAME PHASE INPUT TRANSITION OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL
Link
TEST CIRCUITS OUTPUTS
Pulse Generator
ENABLE DISABLE TIMES
ENABLE NTROL INPUT tPZL OUTPUT ITCH NORMALLY tPZH UTPUT ITCH NORM ALLY OPEN HIGH LOAD/2 tPHZ tPLZ DISABLE LOAD/2
LOAD Open
D.U.T.
DEFINITIONS: ALVC Link Load capacitance: includes probe capacitance. Termination resistance: should equal ZOUT Pulse Generator. NOTES: Pulse Generator Pulses: Rate 10MHz; 2.5ns; 2.5ns. Pulse Generator Pulses: Rate 10MHz; 2ns; 2ns.
NOTE: Link Diagram shown input Control Enable-LOW input Control Disable-HIGH.
SET-UP, HOLD, RELEASE TIMES
DATA INPUT TIMING INPUT ASYNCHRONO CONTRO SYNCHRONO CONTRO
ALVC Link
SWITCH POSITION
Test Open Drain Disable Enable Disable High Enable High Other tests Switch VLOAD
Open
NEW16link
OUTPUT SKEW INPUT
tPLH1
PHL1
PULSE WIDTH
-HIGH-LOW PULSE HIGH-LOW -HIGH PULSE
ALVC Link
OUTPUT
OUTPUT tPLH2 tPHL2
tPLH2 tPHL2
NOTES: tSK(o) OUTPUT1 OUTPUT2 outputs. tSK(b) OUTPUT1 OUTPUT2 same bank.
ALVC Link
IDT74ALVCHR16409 3.3V CMOS 9-BIT, 4-PORT UNIVERSAL EXCHANGER
ORDERING INFORMATION
ALVC Bus-Hold Family Device Type Package Temp. Range
Shrink Small Outline Package (SO56-1) Thin Shrink Small Outline Package (SO56-2) Thin Very Small Outline Package (SO56-3) 9-Bit, 4-Port Universal Exchanger With 3-State Outputs Double-Density with Resistors, ±12mA Bus-Hold -40°C +85°C
CORPORATE HEADQUARTERS 2975 Stender Santa Clara, 95054
SALES: 800-345-7015 408-727-6116 fax: 408-492-8674 www.idt.com*
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IDT74ALVCHR16409 3.3V CMOS 9-BIT, 4-PORT UNIVERSAL EXCHANGER WITH 3-ST

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