Twisted-Pair Ethernet Transceiver (TPEX) DISTINCTIVE CHARACTERIST

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Twisted-Pair Ethernet Transceiver (TPEX) DISTINCTIVE CHARACTERIST

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Am79C98
Twisted-Pair Ethernet Transceiver (TPEX)
DISTINCTIVE CHARACTERISTICS
CMOS device provides compliant operation operating current from single supply Power Down mode provides reduced power consumption battery-powered applications. Reset capability allows remote applications. Pin-selectable twisted-pair receive polarity detection automatic inversion receive signal. Polarity indication output directly drive LED. Pin-selectable twisted-pair Link Integrity Test capability conforming IEEE 802.3 standard 10BASE-T. Link status directly drive LED. Internal twisted-pair transmitter digital predistortion circuit reduces medium-induced jitter ensures compliance with 10BASE-T transmit receive waveform requirements Pin-selectable Test (heartbeat) enable Transmit receive status indications available separate, dedicated pins loopback, Jabber Control, Test functions comply with 10BASE-T standard IEEE 802.3i-1990
GENERAL DESCRIPTION
Am79C98 Twisted-Pair Ethernet Transceiver (TPEX) integrated circuit that implements medium attachment unit (MAU) functions twisted-pair medium, specified IEEE 802.3 standard (Type 10BASE-T). This device provides necessary electrical functional interface between IEEE 802.3 standard attachment unit interface (AUI) twisted-pair cable. network based 10BASE-T standard unshielded twisted-pair cables, providing economical solution networking allowing existing telephone wiring. Am79C98 provides minimal component count cost-effective solution design implementation 10BASE-T standard networks. TPEX provides twisted-pair driver receiver circuits, including on-board transmit digital predistortion, receiver squelch, port with pin-selectable Test enable. device also provides number additional features, including pin-selectable TwistedPair Receive Polarity Detection Automatic Polarity Reversal, Link Status indication, Link Test disable function, transmit receive status. Twisted-Pair Polarity Link Status pins used drive LEDs directly. Am79C98 fabricated CMOS technology requires single supply. device available 24-pin SKINNYDIP® plastic dual in-line 28-pin plastic leaded chip carrier (PLCC) packaging.
Publication# 14395 Rev: Amendment/0 Issue Date: 1994
Line Receiver Squelch Circuit Jabber Control Line Driver Predistortion TXD+ TXD- TXP+ TXP- Link Test LNKST Line Driver Collision Loopback RXD+ Line Receiver Smart Squelch RXD- Line Driver Polarity Detect Auto Reversal Voltage Controlled Oscillator RXPOL Twisted-Pair Interface
BLOCK DIAGRAM
TEST
Am79C98
REXT
PRDN/RST
TEST
Attachment Unit Interface (AUI)
14395D-1
RELATED PRODUCTS
Part Am7996 Am79C100 Am79C90 Am79C900 Am79C940 Am79C960 Am79C961 Am79C965 Am79C970 Am79C974 Am79C981 Am79C987 Description IEEE-802.3/Ethernet/Cheapernet Transceiver Twisted-Pair Ethernet Transceiver Plus (TPEX+) CMOS Local Area Network Controller Ethernet (C-LANCE) Integrated Local Area Communications Controller(ILACCTM) Media Access Controller Ethernet (MACETM) PCnet-ISA Single-Chip Ethernet Controller (for bus) PCnet-ISA+ Single-Chip Ethernet Controller (with Microsoft® Plug Play support) PCnet-32 Single-Chip Ethernet Controller (for 386DX, buses) PCnet-PCI Single-Chip Ethernet Controller (for bus) PCnet-SCSI Combination Ethernet SCSI Controller Systems Integrated Multiport Repeater Plus(IMR+TM) Hardware Implemented Management Information Base(HIMIBTM)
CONNECTION DIAGRAM View
DVSS LNKST AVSS PRDN/RST REXT TXD+ TXD- TXP+ TXP- DVDD TEST SQE^TEST AVDD RXD+ RXD- RXPOL DVSS DVSS LNKST AVSS AVSS
PLCC
TXD+ TXD- TXP+ PRDN/RST RXPOL REXT RXD- RXD+
TXP- DVDD DVDD TEST SQE^TEST AVDD AVDD
14395D-2
Note: marked orientation
14395D-3
Am79C98
LOGIC SYMBOL
DVDD Attachment Unit Interface (AUI)
AVDD TXD+ TXP+ TXD- TXP- Twisted Pair Interface
Am79C98
RXD+ RXD- LNKST RXPOL
TEST TEST REXT PRDN/RST DVSS
AVSS 14395D-4
Am79C98
ORDERING INFORMATION Standard Products
standard products available several packages operating ranges. order number (valid combination) formed combination elements below.
AM79C98
OPTIONAL PROCESSING Blank Standard Processing
TECHNOLOGY CMOS Electrically Erasable
PACKAGE TYPE 24-Pin Plastic 3024) 28-Pin Plastic Leaded Chip Carrier 028)
SPEED Applicable DEVICE NUMBER/DESCRIPTION Am79C98 Twisted-Pair Ethernet Transceiver (TPEX)
Valid Combinations AM79C98
Valid Combinations Valid combinations list configurations planned supported volume this device. Consult local sales office confirm availability specific valid combinations check newly released combinations.
Am79C98
DESCRIPTION AVDD
Analog Power This supplies analog portions TPEX circuitry.
PRDN/RST
Power Down/Reset Input, Active Driving this input resets internal logic TPEX places device special Power Down mode. Power Down/Reset mode, output drivers placed their inactive state.
AVSS
Analog Ground This ground reference analog portions TPEX circuitry.
Receive Output This driven HIGH while TPEX receiving data pins transferring received signal onto pair. pins simultaneously driven HIGH during collision.
CI+,
Control Output port differential driver.
DI+,
Data Output port differential driver.
REXT
External Resistor Input external precision resistor connected between this AVDD order provide voltage reference internal voltage-controlled oscillator (VCO).
DO+,
Data Input port differential receiver.
RXD+, RXD-
Receive Data Input 10BASE-T port differential receivers.
DVDD
Digital Power This supplies digital portions TPEX circuitry.
RXPOL
Receive Polarity Open Drain, Input/Output twisted-pair receiver capable detecting receive signal with reversed polarity (wiring error). RXPOL normally state, indicating correct polarity received signal. receiver detects reversed polarity, then this driven (goes HIGH) polarity subsequent packets inverted. output state, this sink maximum therefore capable driving LED. This feature disabled strapping this LOW. this case, Receive Polarity correction circuit disabled internal receive signal remains noninverted, irrespective received signal. This internally pulled HIGH when inactive.
DVSS
Digital Ground This ground reference digital portions TPEX circuitry.
LNKST
Link Status Open Drain, Input/Output When this tied LOW, internal Link Test Receive function disabled Transmit Receive functions will remain active irrespective arriving idle Link Test pulses data. TPEX continues generate idle Link Test pulses irrespective status this pin. output, this driven link identified functional. However, link determined nonfunctional, missing idle Link Test pulses data packets, then this driven. output state, capable sinking maximum used drive LED. This internally pulled HIGH when inactive.
TEST
Signal Quality Test (Heartbeat) Enable Input, Active Test function enabled tying this input LOW. This input internally pulled HIGH when inactive.
Am79C98
TEST
Test Input, Active HIGH This should tied HIGH normal operation. this driven LOW, TPEX will enter Loopback Test mode. type loopback determined state TEST pin. this state (Station MAU), TPEX transfers data independently from TXD/TXP circuit from circuit. TEST HIGH state (Repeater MAU), then data circuit transmitted back onto TXD/TXP circuit data circuit transmitted onto pair.
TXP+, TXP-
Transmit Predistortion Output Transmit waveform predistortion control.
Transmit Output This driven HIGH while TPEX receiving data pair transmitting data TXD/ pins. pins simultaneously driven HIGH during collision.
TXD+, TXD-
Transmit Data Output 10BASE-T port differential drivers.
Am79C98
FUNCTIONAL DESCRIPTION
Twisted-Pair Ethernet Transceiver (TPEX) complies with requirements specified IEEE 802.3 standard attachment unit interface (AUI) standard 10BASE-T medium attachment unit (MAU). TPEX also implements number features addition IEEE 802.3 standard. outline functions implemented Am79C98 given below.
Attachment Unit Interface (DO+/-, DI+/-, CI+/-)
electrical functional characteristics comply with those specified IEEE 802.3, Sections (drafted). pins wired directly isolation transformer, remote application, another device (e.g., Am7992 serial interface adapter). end-of-packet Test function (heartbeat) disabled allow device employed repeater application.
data reception, collision detection functions disabled, remain disabled until valid data consecutive Link Test pulses appear RXD+/- pair. During Link Fail, LNKST internally pulled HIGH. When link identified functional, LNKST driven capable directly driving "link LED. order interoperate with systems that implement Link Test, this function disabled grounding LNKST pin. When disabled, driver receiver functions remain enabled irrespective presence absence data Link Test pulses RXD+/- pair. transmitter continues generate Link Test pulses absence transmit data even Link Test function disabled.
Polarity Detection Reversal
TPEX receive function includes ability invert polarity signals appearing RXD± pair polarity received signal reversed (such case wiring error). This feature allows data packets received from reverse-wired RXD± input pair corrected TPEX prior transfer interface (DI±). polarity detection function activated following reset Link Fail, will reverse receive polarity based both polarity previous Link Test pulses polarity subsequent packets with valid transmit delimiter (ETD). When Link Fail state, TPEX will recognize Link Test pulses either positive negative polarity. Exit from Link Fail state caused reception five consecutive Link Test pulses identical polarity. entry Link Pass state, polarity last five Link Test pulses used determine initial receive polarity configuration receiver reconfigured subsequently recognize only Link Test pulses previously established polarity. This link pulse algorithm employed only until polarity determination made, described later this section. Positive Link Test pulses defined received signals with positive amplitude greater than pulse width This positive excursion followed negative excursion. This definition consistent with expected received signal correctly wired receiver when Link Test pulse that fits template Figure 14-12 10BASE-T standard generated transmitter passed through twisted-pair cable. Negative Link Test pulses defined received signals with negative amplitude greater than pulse width This negative excursion followed positive excursion. This definition consistent with expected received signal reverse wired receiver when Link Test pulse that fits template Figure 14-12 10BASE-T
Twisted-Pair Transmit Function
Data transmission 10BASE-T medium occurs when valid signals appear DO+/-differential pair. This data stream routed differential driver circuitry TXD+/- pins. driver circuitry provides necessary electrical driving capability predistortion control transmitting signals over maximum-length twisted-pair cable, specified IEEE 802.3 10BASE-T standard. transmit function meets propagation delays jitter specified standard. During transmission, driven HIGH used status information.
Twisted-Pair Receive Function
receiver complies with receiver specifications IEEE 802.3 10BASE-T standard, including noise immunity received signal rejection criteria ("Smart Squelch"). Signals meeting these criteria appearing RXD+/- differential input pair routed DI+/- outputs. receiver function meets propagation delays jitter requirements specified standard. Receiver squelch level drops approximately half threshold value after unsquelch allow reception minimum amplitude signals offset carrier fade event worst-case signal attenuation crosstalk noise conditions. During receive, driven HIGH used status information.
Link Test Function
Link Test function implemented specified IEEE 802.3 10BASE-T standard. During periods transmit pair inactivity, Link Test pulses will periodically sent over twisted-pair medium allow constant monitoring medium integrity. When Link Test function enabled, absence Link Test pulses RXD+/- pair will cause TPEX into Link Fail state. Link Fail state, data transmission,
Am79C98
standard generated transmitter passed through twisted-pair cable. polarity detection/correction algorithm will remain "armed" until consecutive packets with valid identical polarity detected. When "armed," receiver capable changing initial previous polarity configuration based most recent polarity. receipt first packet with valid following reset Link Fail, TPEX will utilize inferred polarity information configure RXD± input, regardless previous state. receipt second packet with valid with correct polarity, detection/correction algorithm will "lock initial polarity. second subsequent) packet detected confirming previous polarity decision, most recently detected polarity will used default. Note that packets with invalid have effect updating previous polarity decision. Once consecutive packets with valid have been received, TPEX will disable detection/correction algorithm until either Link Fail condition occurs PRDN/RST asserted. During polarity reversal, RXPOL internally pulled HIGH. During normal polarity conditions, RXPOL driven capable directly driving "Polarity using integrated driver. desired, polarity reversal function disabled grounding RXPOL pin.
mission. This signal self-test indication that collision circuitry functional. message consists signal CI+/- pair with duration times (800 ns). When enabled, Test will occur every transmission, starting eight times (800 after last transition transmitted signal. repeater applications, Test function disabled tying TEST HIGH leaving disconnected.
Jabber Function
Jabber function inhibits twisted-pair transmit function TPEX DO+/- circuit active longer than time permitted transmit maximumlength 802.3/Ethernet data packet nominal). This prevents node from disrupting network "stuck faulty transmitter. this maximum transmit time exceeded, TPEX transmitter circuitry disabled signal driven onto CI+/- pair. Once transmit data stream removed from DO+/- pair inputs, "unjab" time will elapse before TPEX removes signal from CI+/- pair re-enables transmit path.
Power Down
addition on-board power-on-reset circuitry, PRDN/RST used master reset TPEX. PRDN/RST must driven minimum microseconds reset occur. PRDN/RST also used TPEX into inactive state, causing device consume less power. This feature useful battery-powered low-duty-cycle systems. Driving PRDN/RST resets internal logic TPEX places device into idle mode. this mode, twisted-pair driver pins (TXD+/-,TXP+/-) driven LOW, pins (CI+/-, DI+/-) driven HIGH, LNKST RXPOL pins inactive state, LOW. TPEX will remain idle long PRDN/RST asserted. Following rising edge signal PRDN/RST, TPEX will remain reset state
Twisted-Pair Interface Status
outputs (XMT RCV) indicate whether TPEX transmitting (AUI twisted-pair) receiving (twistedpair AUI). Both signals asserted during collision. Link Fail mode, disabled. Jabber Detect mode, disabled. Both signals active HIGH.
Collision Detect Function
Simultaneous carrier sense (presence valid data signals) both DO+/- pair RXD+/- pair constitutes collision, thereby causing signal asserted CI+/- output pair. CI+/- output meets drive requirements AUI. This signal will remain CI+/- pair until colliding states changes from active idle. CI+/- output pair stays HIGH times collision, decreasing idle level within eighty times after last LOW-to-HIGH transition. Both pins driven HIGH during collision.
Test Modes
TPEX implements types loopback test modes suitable Station (DTE) Repeater applications. Test mode entered driving TEST HIGH. types test modes available are: Station (DTE): TEST LOW. Data DO+/- pair transmitted onto TXD+/- TXP+/- pairs data RXD+/- input pair transmitted onto DI+/- output pair. jabber function collision detection functions disabled. Repeater: TEST HIGH. Data DO+/- pair looped back onto DI+/- pair data RXD+/- pair retransmitted twisted-pair drivers (TXD+/- TXP+/- pairs).
Signal Quality Error (SQE) Test (Heartbeat) Function
When TEST driven LOW, TPEX will routinely exercise collision detection circuitry generating message every trans-
Am79C98
both modes, jabber circuitry, collision detection, collision oscillator functions disabled RXD+/- squelch circuits active.
TPEX External Components
Figure shows typical twisted-pair port external components schematic. resistors used should have tolerance ensure interoperability with 10BASE-T-compliant networks. Filters pulse transformers necessary devices that have major influence performance compliance TPEX-
based MAU. Specifically, transmitted waveforms heavily influenced filter characteristics twisted-pair receivers employ several criteria continuously monitor incoming signal's amplitude timing characteristics determine when assert internal carrier sense. these reasons, crucial that values tolerances external components specified. Several manufacturers produce module that combines functions transmit receive filters pulse transformers into package.
TXD+ TXP+ TXD- TXP-
57.6 324.0 768.0 57.6 324.0
XMIT Filter
Twisted-Pair Cable
Am79C100 TPEX
RXD+ RXD- RECV Filter
Module
14395D-5
Note: filter/transformer module shown available from following manufacturers: Belfuse, TDK, Pulse Engineering, PCA, Valor Electronics, Nano Pulse.
Figure Typical Twisted-Pair Port External Components
Am79C98
ANLG Optional 0.1µF 40.2 Connector AVDD DONote DINote CIAm79C98 Optional Enable Heartbeat DGTL DGTL ANLG REXT 24.3 TEST PWDN/RST DVDD DGTL DVSS 0.1µF Optional 4.7µF DGTL
14395D-7
0.01µF 40.2 ANLG 57.6 324.0 57.6 768.0 324.0 Filter Note Filter ANLG
Pulse Transformer AVSS TXD+ TXP+ TXDTXPRXD+ RXDFilter Transformer Module
RJ45 Connector
SQE^TEST
Am79C98
LNKST RXPOL Figure Typical TPEX System Application
LINK
Notes:
0.01µF
74HC132 DGTL
Compatible filter modules, with brief description package type features included Table this section. resistor values recommended general purpose use, should allow compliance 10BASE-T specification template jitter performance. However, overall performance transmitter also affected transmit filter configuration. Compatible transformer modules, with brief description package type features included Table this section.
Table TPEX Compatible Media Interface Modules
Manufacturer Fuse Fuse Fuse Valor Electronics Valor Electronics Valor Electronics Nano pulse Nano pulse Nano pulse Pulse Engineering Pulse Engineering Fuse Part A556-2006-DE 0556-2006-00 0556-2006-01 PT3877 PT3983 FL1012 NP6612 NP6581 NP6696 HIM3000 PE65421 SUPRA 0556-6392-00 Package 16-pin 0.3" 14-pin 14-pin 16-pin 0.3" 8-pin 0.3" 16-pin 0.3" 16-pin 0.3" 8-pin 0.3" 24-pin 0.6" 14-pin 24-pin 0.6" 16-pin 0.3" 16-pin 0.5" 16-pin 0.5" Description Transmit receive filters transformers Transmit receive filters transformers Transmit receive filters, transformers common mode chokes Transmit receive filters transformers Transmit receive common mode chokes Transmit receive filters transformers, transmit common mode choke Transmit receive filters, transformers common mode chokes Transmit receive common mode chokes Transmit receive filters, transformers common mode chokes Transmit receive filters transformers Transmit receive filters, transformers common mode chokes Transmit receive filters transformers Transmit receive filters transformers, transmit common mode choke Transmit receive filters, transformers, common mode chokes
Table Am79C98 TPEX Compatible Transformers
Manufacturer Fuse Valor Electronics Pulse Engineering Part A553-0506-AB LT6031 100-3E PE64106 Package 16-pin 0.3" 16-pin 0.3" 16-pin 0.3" 16-pin 0.3" Description
Am79C98
ABSOLUTE MAXIMUM RATINGS
Storage Temperature: -65°C +150°C Ambient Temperature Under Bias: +70°C Supply Voltage AVSS DVSS (AVDD, DVDD): -0.3
Stresses above those listed under Absolute Maximum Ratings cause permanent device failure. Functionality above these limits implied. Exposure absolute maximum ratings extended periods affect device reliability.
OPERATING RANGES
Commercial Devices Temperature (TA): +70°C Supply Voltages (AVDD, DVDD):
Operating ranges define those limits between which functionality device guaranteed.
CHARACTERISTICS over COMMERCIAL operating range unless otherwise specified
Parameter Symbol IILL IILD Parameter Description Input Voltage Input HIGH Voltage Output Voltage Output HIGH Voltage Input Leakage Current Input Leakage Current (Open drain pins, output inactive) Input Current DO+, DODO+/- Open Circuit Input Common Mode Voltage (Bias) Differential Mode Input Voltage Range (DO+/-) DO+/- Squelch Threshold Switching Threshold Differential Output Voltage |(DI+) (DI-)| |(CI+) (CI-)| DI+/- CI+/Differential Output Voltage Imbalance DI+/- CI+/Differential Idle Output Voltage DI+/- CI+/Differential Idle Output Current DI+/- CI+/- Common Mode Output Voltage (Note (Note (Note IOL1 (Open drain) IOL2 -0.4 DVDD DVDD Test Conditions DVSS-0.5 DVDD Unit Digital Input Voltage
Digital Output Voltage
Digital Input Leakage Current
IIAXD VAICM VAIDV VASQ VATH VAOD VAODI AVDD AVDD -500 AVDD -2.5 AVDD +2.5 -275 1100
VAODOFF IAODOFF VAOCM
AVDD
Am79C98
CHARACTERISTICS (continued)
Parameter Symbol IIRXD RRXD VTIVB VTIDV VTSQ+ VTSQ- VTHS+ VTHS- VRXDTH VTXH VTXL VTXI Parameter Description Input Current RXD+/- RXD+/- Differential Input Resistance RXD+, RXD- Open Circuit Input Voltage (Bias) Differential Mode Input Voltage Range (RXD+/-) Positive Squelch Threshold (Peak) Negative Squelch Threshold (Peak) Post-Squelch Positive Threshold (Peak) Post-Squelch Negative Threshold (Peak) Switching Threshold TXD+/- TXP+/- Output HIGH Voltage TXD+/- TXP+/- Output Voltage TXD+/- TXP+/- Differential Output Voltage Imbalance TXD+/- TXP+/- Differential Idle Output Voltage TXD+/- TXP+/- Differential Driver Output Impedance Input Current REXT DVDD (Note Test Conditions AVSS AVDD (Note AVDD Sinusoid Sinusoid Sinusoid Sinusoid (Note (Note DVSS (Note DVDD -500 AVDD -3.1 -520 -293 DVDD DVSS AVDD -300 -150 DVDD DVSS Unit
Twisted Pair Interface
VTXOFF
IIREXT
REXT 24.3K AVDD PRDN/RST HIGH
Power Supply Current Power Supply Current (Transmitting Data) (Typical load) Power Supply Current (Transmitting Data) load) IDDPRDN Power Supply Current Power Down Mode
PRDN/RST HIGH
PRDN/RST
Am79C98
SWITCHING CHARACTERISTICS over COMMERCIAL
Parameter Symbol Parameter Description Transmit Timing tPWODO tPWKDO tTON tTSD tDODION tDODISD tTETD ttTHD tTLD tTHDP tTLDP tXMTON tXMTOFF tPERLP tPWLP tPWPLP tJREC Pulse Width Accept/Reject Threshold Pulse Width Maintain/Turn-Off Threshold Transmit Start Delay Transmit Static Propagation Delay TXD) Startup Delay Static Propagation Delay Transmit Transmission Transmitter Rise Time (10% 90%) Transmitter Fall Time (90% 10%) Transmitter Rise Fall Time Mismatch L->H TXD+ L->H TXD- H->L Delay H->L TXD+ H->L TXD- L->H Delay L->H TXP+ H->L TXP- L->H Delay H->L TXP+ L->H TXP- H->L Delay Asserted Delay De-asserted Delay Idle Signal Period Idle Link Test Pulse Width Predistortion Idle Link Test Pulse Width Transmit Jabber Activation Time Transmit Jabber Reset Time Transmit Jabber Recovery Time (Minimum time between transmitted packets prevent jabber activation) (Note (Note Steady State (Note Steady State (Note Steady State (Note Steady State (Note tTSD tTSD tTSD tTSD |VIN| |VASQ| (Note |VIN| |VASQ| (Note tTSD tTSD tTSD tTSD Unit
Am79C98
SWITCHING CHARACTERISTICS (continued)
Parameter Symbol Parameter Description Receive Timing tPWKRD tRON tRVB tRSD tRETD tRHD tRLD tRCVON tRCVOFF tCON tCOFF tPER tCPW tSQED tSQEL Pulse Width Maintain/Turn-Off Threshold Receiver Start Delay (RXD DI+/-) First Validly Timed DI+/- (RXD Receiver Static Propagation Delay (RXD Transmission L->H L->H H->L Delay H->L H->L L->H Delay DI+, DI-, CI+, Rise Time (10% 90%) DI+, DI-, CI+, Fall Time (10% 90%) DI+/- CI+/- Rise Fall Time Mismatch (|tRR tRF|) Asserted Delay De-asserted Delay Collision Turn-On Delay (CI+/-) Collision Turn-Off Delay (CI+/-) Collision Period (CI+/-) Collision Output Pulse Width (CI+/-) Test Delay Time Test Length tRON (Note (Note tRSD tRSD tRSD tRSD tRON tRSD 1600 1500 |VIN| >|VTHS| (Note Sinusoid tRON Unit
Collision Detection Test
Notes: Parameter tested. Uses switching test load. pulses narrower than tPWODO (min) will rejected; pulses wider than tPWODO (max) will turn internal carrier sense pulses narrower than tPWKDO (min) will maintain internal carrier sense pulses wider than tPWKDO (max) will turn internal carrier sense off. pulses narrower than tPWKRD (min) will maintain internal carrier sense pulses wider than tPWKRD (max) will turn internal carrier sense off.
Am79C98
SWITCHING WAVEFORMS
tPWPLP
TXD+
TXP+ tPWPLP TXD-
TXP-
tPWLP
tPERLP
14395D-9
Idle Link Test Pulse
SWITCHING TEST CIRCUITS
DVDD
TXD+ TXD- Includes test capacitance Test Point
DVSS
14395D-10
Switching Test Circuit
DVDD
TXP+ TXP- Includes test capacitance Test Point
DVSS
14395D-11
Switching Test Circuit Am79C98
RECEIVE TEST CIRCUIT
DVDD
52.3 Test Point
DVSS
14395D-13
Switching Test Circuit
tCON tCOFF
tCPW
tPER
14395D-14
Collision Timing
tSQED
tSQEL
14395D-15
Test Timing (SQE^Test Connected VSS)
Am79C98
Trademarks Copyright 1998 Advanced Micro Devices, Inc. rights reserved. AMD, logo, combinations thereof trademarks Advanced Micro Devices, Inc. Am186, Am386, Am486, Am29000, bIMR, eIMR, eIMR+, GigaPHY, HIMIB, ILACC, IMR, IMR+, IMR2, ISA-HUB, MACE, Magic Packet, PCnet, PCnet-FAST, PCnet-FAST+, PCnet-Mobile, QFEX, QFEXr, QuASI, QuEST, QuIET, TAXIchip, TPEX, TPEX Plus trademarks Advanced Micro Devices, Inc. Microsoft registered trademark Microsoft Corporation. Product names used this publication identification purposes only trademarks their respective companies.

Twisted-Pair Ethernet Transceiver (TPEX) DISTINCTIVE CHARACTERIST

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