3960/1 dual 7-bit+sign, Digital-to-Analog Converter (DAC) especially d

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3960/1 dual 7-bit+sign, Digital-to-Analog Converter (DAC) especially d

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3960/1 Microstepping Controller/ Dual Digital-to-Analog Converter
3960/1 dual 7-bit+sign, Digital-to-Analog Converter (DAC) especially developed used together with 3771/1, Precision Stepper Motor driver micro-stepping applications. circuit input registers connected 8-bit data port easy interfacing directly microprocessor. registers used store data each seven-bit DAC, eighth being sign (sign/ magnitude coding). second registers used automatic fast/slow current decay control conjunction with 3771/1, feature that greatly improves high-speed micro-stepping performance. 3960/1 fabricated highspeed CMOS process.
Features
Analog control voltages from down High-speed microprocessor interface. Automatic fast/slow current decay control. Full-scale error LSB. Interfaces directly with levels CMOS devices. Fast conversion speed, Matches 3771.
Data
Level
Level
Digit Comp
Data
Digit Comp
Sign
RESET
Figure Block Diagram.
22-pin plastic 28-pin plastic PLCC
Sign
3960/1
3960/1
Maximum Ratings
Parameter Symbol Unit
Voltage Supply Logic inputs Reference input Current Logic inputs Temperature Storage temperature Operating ambient temperature refers package
-0.3 -0.3 -0.4
VDD+ VDD+ +0.4 +150
Recommended Operating Conditions
Parameter Symbol Unit
Supply voltage Reference voltage
4.75
5.25
A0-A1 D0-D7
Sign,
Figure Timing.
Reset
pres Sign,
Figure Timing Reset.
3960/1
Electrical Characteristics
Electrical characteristics over recommended operating conditions.
Parameter Ref. Symbol Conditions Unit
Logic Inputs Reset logic HIGH input voltage Reset logic input voltage Logic HIGH input voltage Logic input voltage Reset input current Input current, other inputs Input capacitance
VIHR VILR
-0.01 Valid Valid From positive edge outputs valid, Cload From positive edge Reset outputs valid, Cload Reset open, VRef
Internal Timing Characteristics Address setup time Data setup time Chip select setup time Address hold time Data hold time Chip select hold time Write cycle length Reset cycle lenght Reference Input Input resistance Logic Outputs Logic HIGH output current Logic output current Write propagation delay Reset propagation delay Outputs Nominal output voltage Resolution Offset error Gain error Endpoint nonlinearity Differential nonlinearity Load error Power supply sensitivity Conversion speed tDAC RRef tpWR
(VDA, unloaded VDA, loaded) Rload Code Code 4.75 5.25 full-scale transition ±0.5 final value, Rload kohm, Cload
VRef- 1LSB Bits
3960/1
Sign
Sign
Reset Sign
Reset
3960/1N
3960/1QN
Sign
Figure configuration.
Descriptions
Refer figure
PLCC Symbol
VRef Sign1 Sign2 Reset
Voltage reference supply pin, nominal (3.0 maximum) Digital-to-Analog voltage output. Output between LSB. Sign TTL/CMOS level. connected directly 3771 Phase input. Databit transfered inverted from 3960/1/1 data input. Current Decay TTL/CMOS level. signal automatically generated when decay level programmed. level fast current decay. Voltage Drain-Drain, logic supply voltage. Normally Write, TTL/CMOS level, input writing internal registers. Data clocked into flip flops positive edge. Data TTL/CMOS level, input data data word. Data TTL/CMOS level, input data data word. Data TTL/CMOS level, input data data word. Data TTL/CMOS level, input data data word. Data TTL/CMOS level, input data data word. Data TTL/CMOS level, input data data word. Data TTL/CMOS level, input data data word. Data TTL/CMOS level, input data data word. Address TTL/CMOS level, input select data transfer, selects between cannel LOW) channel HIGH). Address TTL/CMOS level, input select data transfer. selects between normal register programming LOW) decay level register programming HIGH). Chip Select, TTL/CMOS level, input select chip activate data transfer from data inputs. level chip selected. Voltage Source-Source. Ground pin, reference signals measurements unless otherwise noted. Current Decay TTL/CMOS level. signal automatically generated when decay level programmed. level fast current decay Sign TTL/CMOS level. connected directly 3771 sign input. Data transfered non-inverted from 3960/1 data input. Digital-to-Analog voltage output. Output between Vref LSB. Reset, digital input resetting internal registers. HIGH level Reset, VRes HIGH level. Pulled internally. Connected Connected Connected Connected Connected Connected
3960/1
Definition Terms
Resolution Resolution defined reciprocal number discrete steps output. directly related number switches bits within DAC. example, 3960/1 128, output levels therefor bits resolution. Remember that this equal number microsteps available. Linearity Error Linearity error maximum deviation from straight line passing through points transfer characteristic. measured after adjusting zero full scale. Linearity error parameter intrinsic device cannot externally adjusted. Power Supply Sensitivity Power supply sensitivity measure effect power supply changes full-scale output. Settling Time Full-scale current settling time requires zero-to-full-scale full-scale-to-zero output change. Settling time time required from code transition until output reaches within ±1/2LSB final output value. Full-scale Error Full-scale error measure output error between ideal actual device output. Differential Non-linearity difference between consecutive codes transfer curve from theoretical 1LSB, differential non-linearity Monotonic output increases increasing digital input code, then monotonic. 7-bit which monotonic bits simply means that increasing digital input codes will produce increasing analog output. 3960/1 monotonic bits. different levels initiation fast current decay selected. sign outputs generate phase shifts, i.e., they reverse current direction phase windings. Data Interface 3960/1 designed compatible with 8-bit microprocessors such 6800, 6801, 6803, 6808, 6809, 8051, 8085, other popular types their 16/32 counter parts data mode. data interface consists data bits, write signal, chip select, address pins. inputs TTLcompatible (except reset). address pins control data transfer four internal D-type registers. Data transferred according figure positive edge write signal. Current Direction, Sign1 Sign2 These bits transferred from when writing respective register. must according data transfer table figure Current Decay, active signals (LOW fast current decay). active previous value DA-Data1 strictly larger than value DA-Data1 value level register LEVEL1 (L61 L41) strictly larger than value DA-Data1. updated every time value loaded into DA-Data1. logic definition NOT{[(D6 (Q61 Q01)] AND[(D6 .D4) (L61 L41)]}
Functional Each channel contains registers, digital comparator, flip flop, converter. block diagram shown first page. registers stores current level, below which, fast current decay initiated. status outputs determines fast slow current decay used driver. digital comparator compares each value with previous value preset level fast current decay. value strictly lower than both others, fast current decay condition exists. flip flop sets output. output updated each time value loaded into register. fast current decay signals used driver circuit, 3771/1, change current control scheme output stages. This avoid motor current dragging which occurs high stepping rates during negative current slopes, illustrated figure Eight
Output
Output
Output Actual Gain error Correct Endpoint non-linearity
More than bits
Less than bits
Negative difference
Positive difference
Offset error Full scale Input
Input
Input
Figure Errors conversion. Differential non-linearity more than bit, output non-monotonic.
Figure Errors conversion. Differential non-linearity less than bit, output monotonic.
Figure Errors conversion. Nonlinearity, gain offset errors.
3960/1
Where value being sent DA-Data1 (Q61 Q01) DAData1's value. (L61 L41) three bits setting current decay level LEVEL1. logic definition analog CD1: NOT{[(D6 (Q62 Q02)] AND[(D6 .D4) (L62 L42)]} Where (L62 L42) level programmed channel level register. (Q62 Q02) values DA-Data2. level registers, LEVEL1 LEVEL2, consist three flip flops each they compared against three most significant bits DAData value, sign excluded.
[mA]
Reset Reset used, leave disconnected. Reset used measure leakage currents from VDD.
Applications Information
Many Microsteps? number true microsteps that obtained depends upon many different variables, such number data bits Digital-to-Analog converter, errors converter, acceptable torque ripple, single- double-pulse programming, motor's electrical, mechanical magnetic characteristics, etc. Many limits found motor's ability perform properly; overcome friction, repeatability, torque linearity, etc. important realize that number current levels, (27), number steps available. number current levels (reference voltage levels) available from each driver stage. Combining current level winding with other current levels other winding will make current levels. expanding this, possible 16,384 (128 128) combinations different current levels windings. Remember that these 16,384 micro-positions useful, torque will vary from 100% some options will make same position. instance, current level winding (0%) still vary current other winding levels. these combinations will give same position varying torque. Typical Application
These outputs DAC1 DAC2. Input DACs internal data (Q61 Q01) (Q62 Q02). Reference Voltage VRef
VRef analog input DACs. Special care layout, gives very voltage drop from resistor. VRef between applied, output might nonlinear above Power-on Reset
[mA]
Figure Assuming that torque proportional current resp. winding possible draw figure
This function automatically resets internal flip flops power-on. This results voltage both outputs digital outputs.
[mNm]
output
Current dragging
Tnom
Tmin
[mNm]
Time
Figure example accessible positions with given torque deviation/ fullstep. Note that 1:st µstep sets highest resolution. Data points exaggerated illustration purpose. TNom code 127.
Figure Motor current dragging high step rates current decay influence. Fast current decay will make possible current follow ideal sine curve. Output shown without sign shift.
Data Transfer Sign1, (D6-D0) (Q61-Q01), value (D6-D4) (L61-L41) Sign2, (D6-D0) (Q62-Q02), value (D6-D4) (L62-L42) Transfer
Figure Table showing data transfered inside 3960/1.
microstepper solution used system with without microprocessor. Without microprocessor, counter addresses where appropriate step data stored. Step Direction input signals which represent clock down counter. This ideal solution system where there microprocessor heavily loaded with other tasks. With microprocessor, data stored area each step successively calculated. 3960/1 connected like peripheral addressable device. parts stepping tailored specific damping needs etc.
3960/1
Time when motor compromise position. Time when micro position correct. Write signal.
Motor position. Writing channel Writing channel Time Ideal data desired position
Write time incorrect position Useful time correct position
Double pulse write signal Actual data true position Normal resolution
Figure Double pulse programming, output signals.
Time when motor intermediate position. Time when micro position almost correct. Write signal. Motor position. Note that position always compromise. Writing channel Writing channel Time Useful time compromise position with equally spaced angles Useful time almost correct position Single pulse write signal "Ideal data" desired position Actual data true position Note increased resolution
Figure Single pulse programming, output signals.
3960/1
Counter
PROM
D0-D7
3960/1 3771/1
Clock Up/Dn Vref
Step Direction
Control Logic
Voltage Reference
Figure Typical blockdiagram application without microprocessor. Available testboard, 307i/2.
Sign1 Phase Phase
3960/1
RESET
Sign2
3771/1
+2.5V
STEPPER MOTOR
numbers refer package.
Figure Typical application microprocessor based system.
3960/1
This ideal solution system where there available microprocessor with extra capacity cost more essential than simplicity. typical application, figure increase positive edge sinecosine curves. Fast current decay used higher speeds avoid current dragging with lost positions incorrect step angles result. Ramping Every drive system inertia which must considered drive system. rotor load inertia play role higher speeds. Unlike motor, stepper motor synchronous motor does change speed load variations. Examining typical stepper motor's torque-versusspeed curve indicates sharp torque drop-off "start-stop without error" curve. reason this that torque requirements increase cube speed change. good motor performance, controlled acceleration deceleration should considered even though microstepping will improve overall performance. Double-pulse Programming normal send write pulses device, with correct addressing between, keeping delay between pulses short possible. Write signals will look illustrated figure12. advantages are: torque ripple correct step angles between each double pulses short compromise position between step pulses normal microstep resolution Single-pulse Programming different approach send pulse time with equally-spaced duty cycle. This easily accomplished adjacent data will make microstep position. Write signals will look figure advantages are: higher microstep resolution smoother motion disadvantages are: higher torque ripple compromise positions with almostcorrect step angles
User Hints
Never disconnect Boards when power supplied. Choose motor that rated current need establish desired torque. high supply voltage will gain better stepping performance even motor rated voltage, current regulation 3771/1 will take care normal stepper motor might give satisfactory result, while microstepping, "microsteppingadapted" motor recommended. This type motor smoother motion major differences, stator rotor teeth relationship non-equal static torque lower. 3960/1 handle programs which generate microsteps desired resolution well quarter stepping, half stepping, full stepping, wave drive. Fast Slow Current Decay? There difference between static dynamic operation which actual application must decide upon when fast slow current decay. Generally slow decay used when stepping slow speeds. This will give benefits current ripple drive stage, precise high overall average current, normal current
Programming 3960/1
There basically different ways programming 3960/1. They called "single-pulse programming" "double-pulse programming." Writing device only accomplished addressing register time. When taking step, least registers normally updated. Accordingly there must certain time delay between writing first second register. This programming necessity gives some special stepping advantages.
3960/1
Ordering Information
Package Part
Tube PLCC Tube PLCC Tape Reel
3960/1NS 3960/1QNS 3960/1QNT
Information given this data sheet believed accurate reliable. However responsibility assumed consequences infringement patents other rights third parties which result from use. license granted implication otherwise under patent patent rights Ericsson Components. These products sold only according Ericsson Components' general conditions sale, unless otherwise confirmed writing.
Specifications subject change without notice. 1522-PBM 3960/1 Rev. Ericsson Components 1999
Ericsson Components SE-164 Kista-Stockholm, Sweden Telephone:

3960/1 dual 7-bit+sign, Digital-to-Analog Converter (DAC) especially d

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