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WFP7152 output segment/common driver suitable driving large scale matr


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Preliminary WFP7152 OUTPUT SEGMENT/COMMON DRIVER
WFP7152 output segment/common driver suitable driving large scale matrix panels. Through (Super Slim TCP) technology. ideal substantially decreasing size frame section module. WFP7152 good both segment driver common driver power consuming, highprecision panel display assembled.
FEATURES BENEFITS
(Segment mode) Shift clock frequency (VDD ±10%) Adopts data system 4-bit/8-bit parallel input modes selectable with pin. Automatic transfer function enable signal. Automatic counting function which chip select mode causes internal clock stopped automatically counting input data. Line latch circuit reset function with DISPOFF active. (Common model)
Shift clock frequency Built-in 240-bits bi-directional shift register (divisible into 120-bits
(120-bits shift register Y240 single mode Y240 Y120, Y121 Y240 Dual mode Y240 Y121, Y120 above shift directions pin-selectable Shift register circuit reset function with DISPOFF active. (Others) Supply voltage drive: +30V Number drive outputs: output impedance power consumption Supply voltage logic system: +2.5 +5.5V CMOS silicon gate process (P-type silicon substrate) Packaged
Publication Release Date: July 2001 Revision
Preliminary WFP7152
BLOCK DIAGRAM
WFP7152
WFP7152
Driver
WFP7152 Data Control
Driver
Control ASIC
Reference
1920 MATRIX PANEL
WFP7152
Generator
CONFIGURATION
Y3Y2Y1
Chip Surface
Preliminary WFP7152
CONFIGURATION
Y240 Y230
Pin1
thers
Note: Dummy
PARAMETER Chip Size Pitch Pitch Bumped Size Bumped Size Bumped Size Bumped High Wafer Thickness
SIZE (X.) 16841
SIZE (Y.) 1610
UNIT
241, 241, pads
(min.) (min.)
Publication Release Date: July 2001 Revision
Preliminary WFP7152
Coordinates
(output) NAME Y<1> Y<2> Y<3> Y<4> Y<5> Y<6> Y<7> Y<8> Y<9> Y<10> Y<11> Y<12> Y<13> Y<14> Y<15> Y<16> Y<17> Y<18> Y<19> Y<20> Y<21> Y<22> Y<23> Y<24> Y<25> Y<26> Y<27> Y<28> Y<29> Y<30> Y<31> Y<32> NAME 8066.200 7998.700 7931.200 7863.700 7796.200 7728.700 7661.200 7593.700 7526.200 7458.700 7391.200 7323.700 7256.200 7188.700 7121.200 7053.700 6986.200 6918.700 6851.200 6783.700 6716.200 6648.700 6581.200 6513.700 6446.200 6378.700 6311.200 6243.700 6176.200 6108.700 6041.200 5973.700 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400
Preliminary WFP7152
Coordinates, continued
NAME Y<33> Y<34> Y<35> Y<36> Y<37> Y<38> Y<39> Y<40> Y<41> Y<42> Y<43> Y<44> Y<45> Y<46> Y<47> Y<48> Y<49> Y<50> Y<51> Y<52> Y<53> Y<54> Y<55> Y<56> Y<57> Y<58> Y<59> Y<60> Y<61> Y<62> Y<63>
NAME
5906.200 5838.700 5771.200 5703.700 5636.200 5568.700 5501.200 5433.700 5366.200 5298.700 5231.200 5163.700 5096.200 5028.700 4961.200 4893.700 4826.200 4758.700 4691.200 4623.700 4556.200 4488.700 4421.200 4353.700 4286.200 4218.700 4151.200 4083.700 4016.200 3948.700 3881.200
635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400
Publication Release Date: July 2001 Revision
Preliminary WFP7152
Coordinates, continued
NAME Y<64> Y<65> Y<66> Y<67> Y<68> Y<69> Y<70> Y<71> Y<72> Y<73> Y<74> Y<75> Y<76> Y<77> Y<78> Y<79> Y<80> Y<81> Y<82> Y<83> Y<84> Y<85> Y<86> Y<87> Y<88> Y<89> Y<90> Y<91> Y<92> Y<93> Y<94> Y<95>
NAME
3813.700 3746.200 3678.700 3611.200 3543.700 3476.200 3408.700 3341.200 3273.700 3206.200 3138.700 3071.200 3003.700 2936.200 2868.700 2801.200 2733.700 2666.200 2598.700 2531.200 2463.700 2396.200 2328.700 2261.200 2193.700 2126.200 2058.700 1991.200 1923.700 1856.200 1788.700 1721.200
635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400
Preliminary WFP7152
Coordinates, continued
NAME Y<96> Y<97> Y<98> Y<99> Y<100> Y<101> Y<102> Y<103> Y<104> Y<105> Y<106> Y<107> Y<108> Y<109> Y<110> Y<111> Y<112> Y<113> Y<114> Y<115> Y<116> Y<117> Y<118> Y<119> Y<120> Y<121> Y<122> Y<123> Y<124> Y<125> Y<126>
NAME
1653.700 1586.200 1518.700 1451.200 1383.700 1316.200 1248.700 1181.200 1113.700 1046.200 978.700 911.200 843.700 776.200 708.700 641.200 573.700 506.200 438.700 371.200 303.700 236.200 168.700 101.200 33.700 -33.700 -101.200 -168.700 -236.200 -303.700 -371.200
635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400
Publication Release Date: July 2001 Revision
Preliminary WFP7152
Coordinates, continued
NAME Y<127> Y<128> Y<129> Y<130> Y<131> Y<132> Y<133> Y<134> Y<135> Y<136> Y<137> Y<138> Y<139> Y<140> Y<141> Y<142> Y<143> Y<144> Y<145> Y<146> Y<147> Y<148> Y<149> Y<150> Y<151> Y<152> Y<153> Y<154> Y<155> Y<156> Y<157> Y<158>
NAME
-438.700 -506.200 -573.700 -641.200 -708.700 -776.200 -843.700 -911.200 -978.700 -1046.200 -1113.700 -1181.200 -1248.700 -1316.200 -1383.700 -1451.200 -1518.700 -1586.200 -1653.700 -1721.200 -1788.700 -1856.200 -1923.700 -1991.200 -2058.700 -2126.200 -2193.700 -2261.200 -2328.700 -2396.200 -2463.700 -2531.200
635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400
Preliminary WFP7152
Coordinates, continued
NAME Y<159> Y<160> Y<161> Y<162> Y<163> Y<164> Y<165> Y<166> Y<167> Y<168> Y<169> Y<170> Y<171> Y<172> Y<173> Y<174> Y<175> Y<176> Y<177> Y<178> Y<179> Y<180> Y<181> Y<182> Y<183> Y<184> Y<185> Y<186> Y<187> Y<188> Y<189>
NAME
-2598.700 -2666.200 -2733.700 -2801.200 -2868.700 -2936.200 -3003.700 -3071.200 -3138.700 -3206.200 -3273.700 -3341.200 -3408.700 -3476.200 -3543.700 -3611.200 -3678.700 -3746.200 -3813.700 -3881.200 -3948.700 -4016.200 -4083.700 -4151.200 -4218.700 -4286.200 -4353.700 -4421.200 -4488.700 -4556.200 -4623.700
635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400
Publication Release Date: July 2001 Revision
Preliminary WFP7152
Coordinates, continued
NAME Y<190> Y<191> Y<192> Y<193> Y<194> Y<195> Y<196> Y<197> Y<198> Y<199> Y<200> Y<201> Y<202> Y<203> Y<204> Y<205> Y<206> Y<207> Y<208> Y<209> Y<210> Y<211> Y<212> Y<213> Y<214> Y<215> Y<216> Y<217> Y<218> Y<219> Y<220> Y<221>
NAME
-4691.200 -4758.700 -4826.200 -4893.700 -4961.200 -5028.700 -5096.200 -5163.700 -5231.200 -5298.700 -5366.200 -5433.700 -5501.200 -5568.700 -5636.200 -5703.700 -5771.200 -5838.700 -5906.200 -5973.700 -6041.200 -6108.700 -6176.200 -6243.700 -6311.200 -6378.700 -6446.200 -6513.700 -6581.200 -6648.700 -6716.200 -6783.700
635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400
Preliminary WFP7152
Coordinates, continued
(side dummy) (dummy) (input) (dummy) (input) (dummy)
NAME Y<222> Y<223> Y<224> Y<225> Y<226> Y<227> Y<228> Y<229> Y<230> Y<231> Y<232> Y<233> Y<234> Y<235> Y<236> Y<237> Y<238> Y<239> Y<240> DUMMY<0> DUMB<1> DUMB<2> SorC DUMB<3> DUMB<4> DUMB<5>
NAME
-6851.200 -6918.700 -6986.200 -7053.700 -7121.200 -7188.700 -7256.200 -7323.700 -7391.200 -7458.700 -7526.200 -7593.700 -7661.200 -7728.700 -7796.200 -7863.700 -7931.200 -7998.700 -8066.200 -8150.500 -8166.500 -7970.500 -7701.500 -7432.500 -7163.500 -6737.400 -6620.600 -6503.800 -6024.000 -5907.000 -5790.200
635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 635.400 -627.900 -627.800 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900
Publication Release Date: July 2001 Revision
Preliminary WFP7152
Coordinates, continued
(input) (dummy) (input) (dummy) (input) (dummy) (input) (dummy) (input) (dummy) (input) (dummy) (input) (dummy) (input) (dummy) (input) (dummy) (input) (dummy) (input) (dummy) (input) (dummy) (input)
NAME EIO2 DUMB<6> DI<0> DUMB<7> DI<1> DUMB<8> DI<2> DUMB<9> DI<3> DUMB<10> DUMB<11> DI<4> DUMB<12> DI<5> DUMB<13> DUMB<14> DI<6> DUMB<15> DUMB<16> DI<7> DUMB<17> DUMB<18> DUMB<19> DUMB<20> DISPOFF DUMB<21> DUMB<22> DUMB<23> DUMB<24> EIO1
NAME
-5306.800 -5166.800 -5026.800 -4519.600 -4379.600 -3872.400 -3732.400 -3225.200 -3085.200 -2578.000 -2438.000 -2298.000 -1790.800 -1650.800 -1145.600 -1028.600 -888.600 -383.400 -266.600 -149.800 469.400 586.200 703.000 1062.500 1179.300 1296.100 1810.900 1927.900 2439.000 2866.200 2982.600 3099.400
-627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900
Preliminary WFP7152
Coordinates, continued
(dummy) (input) (dummy) (input) (dummy) (input) (dummy) (input) (dummy) (input) (dummy) (side dummy)
NAME DUMB<25> DUMB<26> DUMB<27> DUMB<28> LorR DUMB<29> DUMB<30> DUMB<31> DUMB<32> TEST1 DUMB<33> DUMB<34> DUMMY<1>
NAME
3582.800 3699.600 3839.600 4344.800 4484.800 4624.800 5108.600 5225.400 5342.400 5826.200 5943.000 6083.000 6562.500 6808.500 7152.950 7392.300 7613.000 7903.000 8123.000 8150.500
-627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.900 -627.800 -627.900 635.400
Publication Release Date: July 2001 Revision
Preliminary WFP7152
DESCRIPTION
Functions
(Segment mode) CLASSIFICATION Power Supply Power Supply Power Supply Power Supply Power Supply Power Supply Control Signal SYMBOL V0R, V12R, V12L V43R, V43L V5R, LorR NAME INPUT/ OUTPUT Input Input Input Input Input Input Input Ground Power supply driver voltage Power supply driver voltage Power supply driver voltage Power supply driver voltage Direction selection reading display data Vss, data read sequentially from Y160 VDD, data read sequentially from Y160 Control Signal Clock1 Input Clock input taking display data Data read falling edge clock pulse Control Signal Clock2 Input Latch pulse input display data Data latched falling edge clock pulse Control Signal Mode Input Mode selection When Vss, 8-bit parallel input mode When VDD, 4-bit parallel input mode Control Signal DI0~DI7 Data Data Input Input display data 4-bit mode, input data into DI0~DI3 DI4~DI7 connect 8-bit mode, input data into DI0~DI7 FUNCTION Logic power supply (+2.5 +5.5V)
Preliminary WFP7152
Functions (Segment mode), continued
CLASSIFICATION Control Signal
SYMBOL
NAME Control
INPUT/ OUTPUT Input
FUNCTION signal input driving waveform input signal level-shifted from logic voltage level drive voltage level, controls drive circuit Normally inputs frame inversion signal driver output pin's output voltage level using line latch output signal signal. Trueth table shown Table
Control Signal
DISPOFF
Display
Input
Control input output deselect level input signal level-shifted from logic voltage level drive voltage level controls drive circuit Vss, drive output pins Vss, contents line latch reset, read display data data latch regardless condition DISPLAY, When DISPLAY function cancelled, driver outputs deselect level (V12 V34), then outputs contents data latch next falling edge That time DISPLAY removal time keep regulation what shown characteristics, output reading data correctly.
Control Signal
EIO1 EIO2
Enable
Input/ Output
Chip selecting enable providing chip selecting signal Vss, EIO1 output, EIO2 input VDD, EIO1 input, EIO2 output During output "H", while LP*XCK after 160-bits data have been read, cycle (from falling edge falling edge XCK). After which return "H". During input, after signal input, chip selected while "L", After 160-bits data have been read, chip deselected.
Publication Release Date: July 2001 Revision
Preliminary WFP7152
Functions (Segment mode), continued
CLASSIFICATION Control Signal Control Signal driver output
SYMBOL SorC TEST1 Y1-Y240
NAME Mode Select Test1 Y240
INPUT/ OUTPUT Input Input Output
FUNCTION Segment mode/common mode selection SorC VDD, segment mode Test mode selection input pin. During normal operation, level "L". segment driver output pins
(Common mode) CLASSIFICATION Power Supply Power Supply Power Supply Power Supply Power Supply Power Supply Control Signal SYMBOL V0R, V12R, V12L V43R, V43L V5R, LorR NAME INPUT/ OUTPUT Input Input Input Input Input Input Input Ground Power supply driver voltage Power supply driver voltage Power supply driver voltage Power supply driver voltage Bidirection shift register shift bidirection selection Data shifted left when Vss, data shifted right when "H". Control Signal Input used pull-down common mode, connect Control Signal Clock2 Input Bidirectional shift register shift clock pulse input Data shifted falling edge clock pulse Control Signal Mode Input Mode selection When Vss, single mode operation selected When VDD, dual mode operation selected FUNCTION Logic power supply (+2.5 +5.5V)
Preliminary WFP7152
Functions (Common mode), continued
CLASSIFICATION Control Signal
SYMBOL
NAME Data
INPUT/ OUTPUT Input
FUNCTION Dual mode data input According data shift direction data shift register, data input starting from 8lst bit. When chip used Dual mode, will pull-down. When chip used Single mode won't pull -down.
Control Signal
DI0~DI6
Data Data Control
Input
used Connect
Control Signal
Input
signal input driving waveform input signal level-shifted from logic voltage level drive voltage level, controls drive circuit. Normally inputs frame inversion signal driver output pin's output voltage level using line latch output signal signal. Trueth table shown Table
Control Signal
DISPOFF
Display
Input
Control input output deselect level input signal level-shifted from logic voltage level drive voltage level controls drive circuit. Vss, drive output pins Vss. Vss, contents line latch reset, read display data data latch regardless condition DISPLAY, When DISPLAY function cancelled, driver outputs deselect level (V12 V34), then outputs contents data latch next falling edge That time DISPLAY removal time keep regulation what shown characteristics, output reading data correctly.
Publication Release Date: July 2001 Revision
Preliminary WFP7152
Functions (Common mode), continued
CLASSIFICATION Control Signal
SYMBOL EIO1
NAME Enable
INPUT/ OUTPUT Input/ Output
FUNCTION Bidirectional shift register shift data input/output pin. Input right shift, output left shift. When EIO1 used input right shift, will pull-down. When EIO1 used output left shift, won't pull -down.
Control Signal
EIO2
Enable
Input/ Output
Bidirectional shift register shift data input/output pin. Input left shift, output right shift. When EIO2 used input left shift, will pull-down. When EIO2 used output right shift, won't pull -down.
Control Signal
SorC
Mode Select
Input
Segment mode/common mode selection pin. SorC Vss, "L", common mode Test mode selection input pin. During normal operation, level "L". segment driver output pins.
Control Signal driver output
TEST1 Y1-Y240
Test1 Y1.Y240
Input Output
Functional Operations
6.2.1 Truth Table Table (Segment mode) LATCH DATA DISPOFF DRIVER OUTPUT VOLTAGE LEVEL (Y1-Y160)
Here, (+2.5 +5.5V), Vss(0V), Don't Care
Note: There kinds power supply (logic level voltage, drive voltage) driver, Please supply regular voltage which assigned specification each power pin. should Vss, avoiding floating
Preliminary WFP7152
Table (Common mode) LATCH DATA DISPOFF DRIVER OUTPUT VOLTAGE LEVEL (Y1-Y160)
Here, (+2.5 +5.5V), (0V), Don't Care
Note: There kinds power supply (logic level voltage, drive voltage) driver, Please supply regular voltage which assigned specification each power pin. should Vss, avoiding floating
Table (Segment Mode) 4-bit parallel mode LorR EIO1 EIO2 Data Input 60clock 59clock Y240 Y236 Y239 Y235 Y238 Y234 Y237 Y233 Figure Clock 58clock Y232 Y231 Y230 Y229 -3clock 2clock 1clock Y229 Y233 Y237 Y230 Y234 Y238 Y231 Y235 Y239 Y232 Y236 Y240
Output
Input
Input
Output
8-bit parallel mode LorR EIO1 EIO2 Data Input 30clock Y240 Y239 Y238 Y237 Y236 Y235 Y234 Y233 Figure Clock 29clock Y232 Y231 Y230 Y229 Y228 Y227 Y226 Y225 28clock Y224 Y223 Y222 Y221 Y220 Y219 Y218 Y217 -3clock 2clock 1clock Y217 Y225 Y233 Y218 Y226 Y234 Y219 Y227 Y235 Y220 Y228 Y236 Y221 Y229 Y237 Y222 Y230 Y238 Y223 Y231 Y239 Y224 Y232 Y240
Output
Input
Input
Output
Publication Release Date: July 2001 Revision
(Common Mode) (Single) LorR L(shift left) H(shift right) L(shift left) H(shift right) Data Transfer Direction Y240 Y240 Y160 Y240 Y121 Y120 Y120 1toY240 EIO1 Output Input Output Input EI02 Input Output Input Output Input Input
(Dual)
Here: Vss(0V), (+2.5 +5.5V), don't care
Note: Don' care means fixed "L", avoiding floating.
6.2.2 Connection Examples Plural Segment Drivers Case LorR
first data
last data
Y240 EI02
EI01 LorR
Y240 EI02
EI01 LorR
Y240 EI02
EI01 LorR
DI0~DI7
Preliminary WFP7152
Case LorR
DI0~DI7 EI01 EI01 EI01
LorR EI02 Y240
LorR EI02 Y240
LorR EI02
Y240
first data
last data
6.2.3 Timing Chart 4-Device Cascade Connection Segment Drivers
first data DI0~DI7 device device device device (device (device lastdata
(device
(device Note: 4-bit parallel mode 8-bit parallel mode
Publication Release Date: July 2001 Revision
Preliminary WFP7152
6.2.4 Connection Examples Plural Common Drivers Single Mode (Shifting toward left)
First
Last
Y240 EI02
EI01 LorR
Y240 EI02 OFLP
EI01 LorR
Y240 EI02 OFLP
EI01 LorR
OFLP DISPOFF Vss(VDD)
Single Mode (Shifting toward right)
Vss(VDD) DISPOFF LorR EI01 EI02 Y240 EI01 LorR EI02 Y240 EI01 LorR EI02 Y240
First
Last
Preliminary WFP7152
Dual Mode (Shifting toward left)
First1
Last1
First2
Last2
Y240 EI02
EI01 LorR
Y240 EI02
Y121 Y120 EI01 LorR
Y240 EI02 OFLP
EI01 LorR
OFLP DISPOFF Vss(VDD)
OFLP
Dual Mode (Shifting toward right)
Vss(VDD) DISPOFF LorR EI01 EI02 Y240 EI01 Y120 Y121 LorR EI02 EI01 LorR EI02 Y240
First1
Last1 First2
Last2
Publication Release Date: July 2001 Revision
Preliminary WFP7152
ABSOLUTE MAXIMUM RATINGS
PARAMETER Logical Circuit Voltage Drive Circuit Voltage Drive Circuit Voltage Drive Circuit Voltage Drive Circuit Voltage Input Logic Voltage Storage Temperature SYMBOL TSTG RATINGS -0.3 +7.0 -0.3 -0.3 +0.3 -0.3 +0.3 -0.3 +0.3 -0.3 +0.3 +125 UNIT NOTES
Note: Exposure conditions beyond those listed under Absolute Maximum Ratings adversely affect life reliability device.
RECOMMENDED OPERATING CONDITIONS
PARAMETER Supply Voltage Supply Voltage Operating Temperature SYMBOL TOPT MIN. +2.5 TYP. MAX. +5.5 UNIT
Note: Ensure that voltage
Preliminary WFP7152
ELECTRICAL CHARACTERISTICS
Characteristics
Condition: 2.5V 5.5V, +15V 30V,
(Segment Mode)
PARAMETER Input Voltage SYM. APPLICABLE DI0~DI7, XCK, LorR, EI01, EI02, DISPOFF DI0~DI7, XCK, LorR, EI01, EI02, DISPOFF EIO1, EIO2 EIO1, EIO2 DI0~DI7, XCK, LorR, EI01, EI02, DISPOFF DI0~DI7, XCK, LorR, EI01, EI02, DISPOFF Y240 -0.4 +0.4 MIN. TYP. MAX. UNIT CONDITION NOTES
Input Voltage
Output Voltage Output Voltage Input Leagake Current Input Leakage Current Output Resistance Output Resistance Stand-by Current Consumed Current (deselect) Consumed Current (select) Current Consumption
Notes:
ILIH
-0.4
ILIL
0.5V +30V 0.5V +20V
Y240
ISTA IDD1
IDD2
+5.0V, +30V, VDD, VIL= Vss. +5.0V, +30V, Fxck MHz, No-load, VDD. input data turned over data taking clock (4-bit parallel input mode) +5.0V, +30V, Fxck MHz, No-load, input data turned over data taking clock (4-bit parallel input mode) +5.0V, +30V, Fxck MHz, 41.6K, No-load input data turned over data taking clock (4-bit parallel input mode)
Publication Release Date: July 2001 Revision
Preliminary WFP7152
(Common Mode)
PARAMETER Input Voltage SYM. APPLICABLE DI0~DI7, XCK, LorR, EI01, EI02, DISPOFF DI0~DI7, XCK, LorR, EI01, EI02, DISPOFF EIO1, EIO2 EIO1, EIO2 DI0~DI7, XCK, LorR, EI01, EI02, DISPOFF DI0~DI7, XCK, LorR, EI01, EI02, DISPOFF DI7, XCK, EI01, EI02 Y240 -0.4 +0.4 MIN. TYP. MAX. UNIT CONDITION NOTES
Input Voltage
Output Voltage Output Voltage Input Leagake Current Input Leakage Current Input Pull-down Current Output Resistance Output Resistance Stand-by Current Consumed Current Current Consumption
Notes:
ILIH
-0.4
ILIL
0.5V +30V 0.5V +20V
Y240
ISTA
=+5.0V, +30V, =+5.0V, +30V, Flp= 41.6 KHz, Case 1/480 duty operation, load.
Preliminary WFP7152
Characteristics
(Segment Mode
+4.5 +5.5V, +15V +30V,
PARAMETER Shift Clock Period Shift Clock Pulse Width Shift Clock Pulse Width Data Setup Time Data Hold Time Latch Pulse Pulse Width Shift Clock Rise Latch Pulse Rise Time Shift Clock fall Latch Pulse Fall Time Latch Pulse Rise Shift Clock Rise Time Latch Pulse Fall Shift Clock Fall Time Input Signal Rise Time Input Signal Fall Time Enable Setup Time DISPLAYOFF Removal Time DISPOFF Pulse Width Output Delay Time Output Delay Time Output Delay Time
Notes:
SYMBOL twck twckH twckL tWLPH tWDL tpd1, tpd2 tpd3
CONDITION
MIN.
MAX.
UNIT
15pF 15pF 15pF
Take cascade connection into consideration. (twck-twckH-twckL)/2 maximum case high speed operation
Publication Release Date: July 2001 Revision
Preliminary WFP7152
(Segment Mode
+3.0 +4.5V, +15V +30V, 70°C
PARAMETER Shift Clock Period Shift Clock Pulse Width Shift Clock Pulse Width Data Setup Time Data hold Time Latch Pulse Pulse Width Shift Clock Rise Latch Pulse Rise Time Shift Clock Fall Latch Pulse Fall Time Latch Pulse Rise Shift Clock Rise Time Latch Pulse Fall Shift Clock Fall Time Input Signal Rise Time Input Signal Fall Time Enable Setup Time DISPLAYOFF Removal Time DISPOFF Pulse Width Output Delay Time Output Delay Time Output Delay Time
Notes:
SYMBOL twck twckH twckL tWLPH tWDL tpd1, tpd2 tpd3
CONDITION
MIN.
MAX.
UNIT
Take cascade connection into consideration. (twck-twckH-twckL)/2 maximum case high speed operation
Preliminary WFP7152
(Segment Mode
+2.5 +3.0V, +15V +30V, 70°C
PARAMETER Shift Clock Period Shift Clock Pulse Width Shift Clock Pulse Width Data Setup Time Data Hold Time Latch Pulse Pulse Width Shift Clock Rise Latch Pulse Rise Time Shift Clock Fall Latch Pulse Fall Time Latch Pulse Rise Shift Clock Rise Time Latch Pulse Fall Shift Clock Fall Time Input Signal Rise Time Input Signal Fall Time Enable Setup Time DISPLAYOFF Removal Time DISPOFF Pulse Width Output Delay Time Output Delay Time Output Delay Time
Notes:
SYMBOL twck twckH twckL tWLPH tWDL tpd1, tpd2 tpd3
CONDITION <=10
MIN.
MAX.
UNIT
Take cascade connection into consideration. (twck-twckH-twckL)/2 maximum case high speed operation
Publication Release Date: July 2001 Revision
Preliminary WFP7152
(Timing Characteristics Segment Mode)
tWLPH
tWCK DI0~DI7 Last Data tWDL DISPOFF First Data tWCKH tWCKL
Note:
4-bit parallel mode 8-bit parallel mode
tpd1 tpd2 DISPOFF tpd3 Y1~Y240
Preliminary WFP7152
(Common Mode)
+2.5 +5.5V, +15V +30V, 70°C
PARAMETER Shift Clock Period Shift Clock Pulse Width Shift Clock Pulse Width Data Setup Time Data Hold Time Input Signal Rise Time Input Sgnal Fall Time DISPLAYOFF Removal Time DISPOFF Pulse Width Output Delay Time Output Delay Time Output Delay Time
SYMBOL twlp twlpH twlpH tWDL tpd1, tpd2 tpd3
CONDITION +5.0V (±10%) +2.5V +4.5V
MIN.
MAX.
UNIT
(Timing Characteristics Common Mode)
tWLP
tWLPH
EIO2 (DI7) EIO1 tWDL DISPOFF
Publication Release Date: July 2001 Revision
Preliminary WFP7152
(Timing Characteristics Common Mode), continued
tpd1 tpd2 DISPOFF tpd3 Y240
Note: LorR
RECOMMENDED OPERATING CONDITIONS
PARAMETER Supply Voltage Supply Voltage Operating Temperature SYMBOL TOPT MIN. +2.5 TYP. MAX. +5.5 UNIT
Note: Ensure that voltage
Preliminary WFP7152
Headquarters
Winbond Electronics (H.K.) Ltd.
Unit 9-15, 22F, Millennium City, Creation III, Kwun Tong Science-Based Industrial Park, Kowloon, Hong Kong Hsinchu, Taiwan TEL: -27513100 TEL: 886-3-5770066 FAX: -27552064 FAX: -3-5792766 http://www.winbond.com.tw/ Voice Fax-on-demand: -2-27197006
Winbond Electronics North America Corp. Winbond Memory Lab. Winbond Microelectronics Corp. Winbond Systems Lab.
2727 First Street, Jose, 95134, U.S.A. TEL: 408-9436666 FAX: 408-5441798
Taipei Office
11F, 115, Sec. -Sheng East Rd., Taipei, Taiwan TEL: 886-2-27190505 FAX: -2-27197502
Note: data specifications subject change without notice.
Publication Release Date: July 2001 Revision

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