Mapping Controller Controller Product Line Selection Table H

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Mapping Controller Controller Product Line Selection Table H

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HT1627
Mapping Controller
Controller Product Line Selection Table
HT162X Built-in Osc. Crystal Osc. HT1620 HT1621 HT1622 HT16220 HT1623 HT1625 HT1626 HT1627 HT16270
Features
Operating voltage: 2.7V~5.2V Built-in oscillator Standby current bias, 1/16 duty, frame frequency 64Hz Max. patterns, commons, segments Built-in internal resistor type bias generator wires serial interface kinds time base /WDT selection Time base overflow output
Built-in display address auto increment Built-in buzzer driver (2K/4K) Power down command reduces power consumption Software configuration feature Data mode Command mode instructions Three data accessing modes Provide VLCD adjust operating voltage
General Description
HT1627 peripheral device specially designed type used expand display capability. max. display segment device 1024 patterns also supports serial interface, buzzer sound, watchdog timer time base timer functions. HT1627 memory mapping multifunction controller. software configuration feature HT1627 make suitable multiple applications including modules display subsystems. Only lines required interface between host controller HT1627. HT162X series have many kinds products that match various applications.
HT1627
Assignment (PQFP100)
Block Diagram
HT1627
Assignment (Layout Plot)
Chip size: (mil)2 substrate should connected layout artwork.
HT1627
Coordinates
-116.62 -116.71 -116.71 -116.71 -115.94 -116.71 -116.71 -116.71 -115.94 -115.94 -115.94 -115.94 -115.94 -115.94 -115.94 -115.94 -115.94 -115.94 -115.94 -115.94 -115.94 -115.94 -108.04 -96.05 -89.42 -77.43 -70.81 -58.82 -52.19 -40.21 -33.58 -21.59 -14.96 -2.97 3.65 15.64 22.27 34.26 40.88 52.87 59.50 71.49 78.11 90.10 96.73 108.71 116.15 116.15 99.88 86.32 78.75 72.12 65.49 55.97 41.44 21.84 11.39 -0.60 -7.22 -19.21 -25.84 -37.83 -44.46 -56.44 -63.07 -75.06 -81.68 -93.67 -100.30 -112.29 -112.03 -112.03 -112.03 -112.03 -112.03 -112.03 -112.03 -112.03 -112.03 -112.03 -112.03 -112.03 -112.03 -112.03 -112.03 -112.03 -112.03 -112.03 -112.03 -112.03 -112.03 -112.03 -112.03 -112.03 -111.82 -99.83 116.15 116.15 116.15 116.15 116.15 116.15 116.15 116.15 116.15 116.15 116.15 116.15 116.15 116.15 116.15 116.15 116.15 116.15 116.15 116.15 116.15 116.15 112.03 100.04 93.42 81.43 74.80 62.81 56.19 44.20 37.57 25.58 18.95 6.97 0.34 -11.65 -18.27 -30.26 -36.89 -48.88 -55.51 -67.49 -74.12 -86.11 -92.74 -104.72 -114.24
Unit:
-93.20 -81.22 -74.59 -62.60 -55.97 -43.99 -37.36 -25.37 -18.74 -6.76 -0.13 11.86 18.49 30.47 37.10 49.09 55.72 67.70 74.33 86.32 92.95 104.93 112.24 112.24 112.24 112.24 112.24 112.24 112.24 112.24 112.24 112.24 112.24 112.24 112.24 112.24 112.24 112.24 112.24 112.24 112.24 112.24 112.24 112.24 112.24 112.24 112.24
HT1627
Description
Name Description
Chip selection input with pull high resistor. When logic high, data command read from written HT1627 disabled. serial interface circuit also reset logic level input pad, data command transmission between host controller HT1627 READ clock input with pull high resistor.Data HT1627 clocked rising edge signal. clocked data will appear data line. host controller next falling edge latch clocked data. WRITE clock input with pull high resistor. Data DATA line latched into HT1627 rising edge signal.
9~12 13~28 29~92
DATA OSCI VLCD T1~T4 COM0~COM15 SEG0~SEG63
Serial data input/output with pull high resistor Negative power supply, Ground system clock comes from external clock source, external clock source should connected OSCI pad. Positive power supply operating voltage input pad. Time base Watch Timer overflow flag, NMOS open drain output frequency output pair (Tristate output buffer) connected common outputs segment outputs
Absolute Maximum Ratings*
Supply Voltage -0.3V 5.5V Input Voltage.VSS-0.3V VDD+0.3V Storage Temperature. -50°C 125°C Operating Temperature. -25°C 75°C
*Note: Stresses above those listed under "Absolute Maximum Ratings" cause permanent damageto device. These stress ratings only. Functional operation this device these other conditions above those indicated operational sections this specification implied exposure absolute maximum rating conditions extended periods affect device reliability.
HT1627
D.C. Characteristics
Symbol
IDD1 (Ta=25°C)
Parameter
Operating voltage Operating current Operating current Standby current Input voltage Input high voltage DATA DATA common sink current common source current segment sink current segment source current Pull-high resistor
Test Conditions Conditions
load/LCD chip oscillator load/LCD chip oscillator load Power down mode DATA,
Min. Typ. Max. Unit
IDD2
ISTB
DATA, VOL=0.3V VOL=0.5V VOH=2.7V VOH=4.5V VOL=0.3V VOL=0.5V VOH=2.7V VOH=4.5V VOL=0.3V VOL=0.5V VOH=2.7V VOH=4.5V VOL=0.3V VOL=0.5V VOH=2.7V VOH=4.5V DATA,
IOL1
IOH1
IOL2
IOH2
IOL3
IOH3
IOL4
IOH4
HT1627
A.C. Characteristics
Symbol Parameter
System Clock Frame Frequency (Ta=25°C)
Test Conditions Conditions
chip oscillator External clock source chip oscillator External clock source Number Duty cycle
Min. Typ. Max. Unit
n/fLCD
fSYS1
System Clock
fSYS2
fLCD1
fLCD2 tCOM fCLK1
Frame Frequency Common Period Serial Data Clock Pin)
fCLK2
Serial Data Clock Pin) Serial Interface Reset Pulse Width
Duty cycle Write mode Read mode 3.34 6.67 1.67 3.34
Pulse Width Serial Data Clock (Figure Rise/Fall Time Serial Data Clock (Figure Setup Time DATA Serial Data Clock (Figure Hold Time DATA Serial Data Clock (Figure High Serial Data Clock (Figure High Serial Data Clock High (Figure
Write mode Read mode
trtf
trec
HT1627
Test Conditions
Serial Interface Reset High (Figure Serial Pulse Width Serial Data Clock High (Figure
Symbol
Parameter
Min. Typ. Max. Unit
Conditions
Figure
Figure
Figure
HT1627
Application Diagram
connection selected depending requirement host controller. Note: voltage must greater than VLCD PIN. (VDD VLCD)
System Architecture
Display memory structure Time base watchdog timer (WDT)
static display organized into 256*4 bits stores display data. contents directly mapped contents driver. Data accessed READ, WRITE READ-MODIFY-WRITE commands. following mapping from patterns.
time base generator share same divided (/256) counter. TIMER DIS/EN/CLR, DIS/EN/CLR EN/DIS independent from each other. Once timeout occurs, will stay logic level until command issued.
HT1627
Time base configurations external clock selected source system frequency, command turns invalid power down mode fails carried until external clock source removed.
Buzzer tone output
following data mode command mode
Operation
READ WRITE READ-MODIFY-WRITE COMMAND
Mode
Data Data Data
simple tone generator implemented HT1627. tone generator output pair differential driving signals which used generate single tone.
Command format
Command
HT1627 configured software setting. There mode commands configure HT1627 resource transfer display data.
successive commands have been issued, command mode omitted. While system operating non-successive command non-successive address data mode, should previous operation mode will reset also. returns "0", operation mode should issued first.
Name
TONE TONE TONE
Command Code
0000-1000-X 010X-XXXX-X 0110-XXXX-X Turn-off tone output
Function
Turn-on tone output, tone frequency 4kHz Turn-on tone output, tone frequency 2kHz
HT1627
Timing Diagrams
HT1627
HT1627
HT1627
HT1627
Command Summary
Name
READ WRITE
Command Code
Function
Read data from Write data Read Write data Turn system oscillator Turn system oscillator Turn display Turn display Disable time base output Disable time-out flag output Enable time base output Enable time-out flag output Turn tone outputs Clear contents time base generator Clear contents stage System clock source, on-chip oscillator System clock source, external clock source Tone frequency output: 4kHz Tone frequency output: 2kHz Disable output Enable output Time base clock output: time-out flag after: Time base clock output: time-out flag after: Time base clock output: time-out flag after: Time base clock output: time-out flag after: 1/2s Time base clock output: 16Hz time-out flag after: 1/4s
Def.
a7a6a5a4a3a2a1a0 d0d1d2d3 a7a6a5a4a3a2a1a0 d0d1d2d3
Read-modify-write a7a6a5a4a3a2a1a0 d0d1d2d3 TIMER TIMER TONE TIMER TONE TONE 0000-0000-X 0000-0001-X 0000-0010-X 0000-0011-X 0000-0100-X 0000-0101-X 0000-0110-X 0000-0111-X 0000-1000-X 0000-1101-X 0000-1111-X 0001-10XX-X 0001-11XX-X 010X-XXXX-X 0110-XXXX-X 100X-0XXX-X 100X-1XXX-X 101X-0000-X 101X-0001-X 101X-0010-X 101X-0011-X 101X-0100-X
HT1627
Name
F128 TOPT NORMAL Note: Don't care a7~a0: address d3~d0: data D/C: Data/Command mode Def.: Default
Command Code
Function
Time base clock output: 32Hz time-out flag after: 1/8s Time base clock output: 64Hz time-out flag after: 1/16s
Def.
101X-0101-X 101X-0110-X 101X-0111-X 1110-0000-X 1110-0011-X
Time base clock output: 128Hz time-out flag after: 1/32s Test mode Normal mode

Mapping Controller Controller Product Line Selection Table H

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