AS998/AS998A Preliminary AS998/AS998A intended controller switch
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Power Management
AS998/AS998A Preliminary
AS998/AS998A intended controller switch mode power supplies. device particularly suited primary side controller adapter, printer, peripheral, mobile chargers desktop auxiliary power supplies. AS998/AS998A manufactured BiCMOS technology exhibits very start-up operating power. This allows device suitable applications where stringent standby Blue Angel criteria required. Many external functions associated with controllers have been integrated into AS998/AS998A allowing external component count significantly reduced. Features such fixed internal oscillator, internal ramp compensation current filters reduce external support components. AS998/AS998A output rise fall time 250/ typical.
ASTEC
SEMICONDUCTOR
Power Management
AS998/A
Features
start-up current 64uA (typ) running current (typ) power light load mode power activated standby when
Extended commercial operating temperature range 0-105C On-board fixed 100kHz (typ) frequency oscillator Frequency randomizer reduce emissions
Dedicated shutdown On-board voltage compensation ramp On-board current sense filtering Optional primary side regulation
Configuration
PDIP
COMP SENSE VREG
view
SOIC
COMP SENSE VREG
Ordering Information
Description Temperature Range Order Codes
AS998 8-Pin Plastic AS998 8-Pin Plastic SOIC AS998A 8-Pin Plastic AS998A 8-Pin Plastic SOIC
ASTEC Semiconductor ASTEC Semiconductor 2001 2001
105° 105° 105° 105°
Page Page
AS998N AS998D AS998AN AS998AD
DS998A DS998A Rev. Rev.
AS998/AS998A
Functional Block Diagram
Power Management
ASTEC Semiconductor 2001
Page
DS998 Rev.
Power Management
Descriptions
LABEL DESCRIPTION
AS998/AS998A
Overvoltage Pin. input/output function implemented chip latch. This driven voltage chip circuitry senses level greater than threshold (VDDov). This error condition stops part from generating more output pulses until been reduced VDDul level then raised normal power-on sequence. Alternatively, error condition cleared forcing near ground. output immediately enabled following clear function. error condition also generated externally temporarily forcing voltage greater than threshold. This will force part latch condition generate more output pulses unless cleared described.
COMP
Compensation Pin. This output error amplifier also used input optocoupled control signal comparator. Generally this connected feedback network optocoupler feedback used, COMP connects collector common emitter optocoupler, generally with pull-up resistor Reg. Feedback Pin. Inverting input error amplifier. This tied internal default divider which will tend regulate nominal Current Sense Input. signal this pass filter comparator. Superimposed input slope compensation ramp derived from main oscillator. addition above, current sense signal connected directly over-current comparator that detects overload condition immediately terminates gate drive pulse with minimum propagation delay.
CSNS
Circuit Common Ground. Gate Drive Output. current source sink capability output buffer tailored minimize EMI. When running, this held pull down resistor gate required. Positive Supply Voltage. on-board shunt regulator allows this powered simple resistor from widely varying bias supply. power management block keeps part startup current mode while ramping until part turns UVLhigh threshold. then draws specified supply current while operating unless drops below UVLlow threshold. drops below UVLlow, then part will return startup current mode.
Voltage Regulator. Decoupling required internal voltage supply. This used source control opto coupler.
ASTEC Semiconductor 2001
Page
DS998A Rev.
AS998/AS998A
Block Diagram POWER MANAGEMENT
Power Management
This block contains reference generators comparators determine under-voltage shutdown point, power-on point, primary regulation operating point, overvoltage shutdown point. INTERNAL POWER REFERENCE This block includes coarse regulator chip power cascade voltages circuitry, bandgap comparator references, bias current generator, PTAT, BiasP BiasN. TEMPERATURE COMPENSATED CURRENT SOURCE This block generates constant current function voltage temperature with off-chip components. OSCILLATOR Mirrored currents from reference block used charge capacitor threshold voltage which point direction switched opposing mirror drive capacitor lower limit threshold value. This generates duty cycle digital clock output latch, 100KHz ramp voltage used feedback control. FEEDBACK CONTROL This block senses various feedback methods control output duty cycle. includes current sense, pass filter, current amplifier, summing amp, comparators. This block sums analog ramp from OSC, sense, compensation node voltages into comparator which triggers falling edge clock signal. This provides supply voltage compensation load regulation power converter system. OUT_DRV high speed, high current bipolar output stage capable providing approximately sink source current charge discharge gate large power FET. understood that total delay from comp output should about
Absolute Maximum Ratings
Parameter Symbol Rating Units
Supply Voltage (Low Impedance Source) Supply Current (High Impedance Source) Output Peak Current REGULATOR CURRENT Continuous Power SOIC PDIP Junction Temperature Storage Temperature Lead Temperature, Soldering Seconds
IOUT IREG
1000
TSTG
Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS cause permanent damage device. This stress rating only functional operation device these other conditions above those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect reliability.
ASTEC Semiconductor 2001
Page
DS998 Rev.
Power Management
Electrical Characteristics
AS998/AS998A
Over full junction temperature range 0-105°C. Ambient temperature deratings will bepend power dissipation package thermal characteristics. 12V, CSNS Cload 1800pf, Creg 100nf (AVVD GND) unless otherwise stated. start chip, must raised above UVLhigh. Parameter Startup Current Supply Current Startup Threshold Threshold Bias Current Int. Regulator Voltage Symbol IDDO UVLHIGH UVLLOW VCLAMP VREG 10mA Load IREG Test Condition UVLHIGH Threshold Load AS998 AS998A 6.25 10.5 14.7 Unit
Oscillator
Parameter Mean Period Modulation Repetition Rate Peak-to-Peak Modulation Max. Duty Cycle Symbol TOSC TREP TDEV DMAX Peak-to-Peak change period 13.7 Test Condition 8.4V 13.3V cycle average AS998 8.4V 13.3V cycle average AS998A 16.5 11.7 10.7 Unit cycles
Error Amplifier
Parameter Divider Regulation Point Threshold Gain (DC) Gain-Bandwidth Product COMP Output High COMP Output COMP Source Current COMP Sink Current Symbol VDDREG VREF AVOL VCOMPH VCOMPL ICOMPH ICOMPL COMP =12V load COMP load COMP COMP COMP 11.4 2.37 Test Condition 12.6 2.62 Unit
Current Sense Comparator
Parameter Scaling COMP Input Impedance Input Filter Prop. Delay Output
ASTEC Semiconductor 2001
Symbol
Test Condition CSNS input
Unit
RCSAC tpd1
Time Constant
DS998A Rev.
Page
AS998/AS998A
Electrical Characteristics (cont.)
Over Current Comparator
Parameter Comparator Threshold Propagation Delay Output Symbol VCSTH tpd2 Test Condition COMP
Power Management
1.25
Unit
step 1.65V, from point CSNS input point output transition
Over Voltage Input
Parameter Threshold Threshold Latch State Latch State High Impedance Pull-up Unlatch Threshold Symbol VDDOV OVRN OVRP OVHI VDDUL Test Condition Forcing Forcing Equiv. Equiv. 10mA dropped until latch fails 4.75 5.25 14.7 Unit
Output
Parameter Max. "Off State" Voltage Output Rise Time Output Fall Time Symbol VOFF Test Condition IOUT 100µA 25°C, 25°C, Unit
ASTEC Semiconductor 2001
Page
DS998 Rev.
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