Access Times 120, 150ns MIL-STD-883 Compliant Devices Available Packag

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Access Times 120, 150ns MIL-STD-883 Compliant Devices Available Packag

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WE32K32-XXX 32Kx32 EEPROM MODULE, 5962-94614
Access Times 120, 150ns MIL-STD-883 Compliant Devices Available Packaging: lead, Hermetic CQFP (G2U), 22.4mm (0.880 inch) square, 3.56mm (0.140 inch) height (Package 510). Designed JEDEC lead 0.990" CQFJ footprint (Fig. 66-pin, Type, 1.075 inch square, Hermetic Ceramic (Package 400) Data Retention 25°C, Years Write Endurance, 10,000 Cycles Organized 32Kx32; User Configurable 64Kx16 128Kx8 Commercial, Industrial Military Temperature Ranges Automatic Page Write Operation Page Write Cycle Time: 10ms Data Polling Write Detection Hardware Software Data Protection Compatible Inputs Outputs Volt Power Supply Power CMOS, 10mA Standby Typical Built-in Decoupling Caps Multiple Ground Pins Noise Operation
FIG.
CONFIGURATION WE32K32N-XH1X VIEW DESCRIPTION
I/O15 I/O14 I/O13 I/O12 I/O7 I/O6 I/O5 I/O4 I/O24 I/O25 I/O26 I/O16 I/O17 I/O18 I/O27 I/O19 I/O31 I/O30 I/O29 I/O28
I/O8 I/O9 I/O10 I/O0 I/O1 I/O2
I/O11 I/O3
I/O0-31 Data Inputs/Outputs A0-14 WE1-4 CS1-4 Address Inputs Write Enables Chip Selects Output Enable Power Supply Ground Connected
I/O23 I/O22 I/O21 I/O20
BLOCK DIAGRAM
A0-14
EEPROM MODULES
I/O0-7
I/O8-15
I/O16-23
I/O24-31
July 1998
White Microelectronics Phoenix, (602) 437-1520
WE32K32-XXX
FIG.
CONFIGURATION WE32K32-XG2UX
VIEW
DESCRIPTION
I/O0-31 A0-14 Data Inputs/Outputs Address Inputs Write Enables Chip Selects Output Enable Power Supply Ground Connected
I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 I/O16 I/O17 I/O18 I/O19 I/O20 I/O21 I/O22 I/O23 I/O24 I/O25 I/O26 I/O27 I/O28 I/O29 I/O30 I/O31
WE1-4 CS1-4
BLOCK DIAGRAM
A0-14
White Microelectronics Phoenix, (602) 437-1520
EEPROM MODULES
0.940"
I/O0-7
I/O8-15
I/O16-23
I/O24-31
White lead CQFP fills same function JEDEC lead CQFJ PLCC. lead inspection advantage CQFP form.
WE32K32-XXX
ABSOLUTE MAXIMUM RATINGS
Parameter Operating Temperature Storage Temperature Signal Voltage Relative Voltage Symbol +125 +150 -0.6 +6.25 -0.6 +13.5 Unit
TRUTH TABLE
Mode Standby Read Write Disable Write Inhibit Data High Data Data High Z/Data
NOTE: Stresses above those listed under "Absolute Maximum Ratings" cause permanent damage device. This stress rating only functional operation device these other conditions above those indicated operational sections this specification implied. Exposure absolute maximum rating conditions extended periods affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Parameter Supply Voltage Input High Voltage Input Voltage Operating Temp. (Mil.) Operating Temp. (Ind.) Symbol -0.5 +0.8 +125 Unit Parameter
CAPACITANCE
Symbol CI/O Condition 1.0MHz 1.0MHz 1.0MHz 1.0MHz Unit Address Input Capacitance Capacitance CS1-4 Capacitance WE1-4 Capacitance Data Capacitance
This parameter guaranteed design tested.
CHARACTERISTICS (VCC 5.0V, -55°C +125°C)
Parameter Input Leakage Current Output Leakage Current Operating Supply Current Mode Standby Current Output Voltage Output High Voltage Symbol Conditions 5.5, VIH, VIH, VOUT VIL, VIH, 5MHz VIH, VIH, 5MHz 2.1mA, 4.5V -400µA, 4.5V 0.45 -120 0.45 -150 0.45 Units
NOTE: test conditions: -0.3V, 0.3V
EEPROM MODULES
FIG.
TEST CIRCUIT
Current Source
TEST CONDITIONS
Parameter Input Pulse Levels Input Rise Fall Input Output Reference Level
D.U.T.
Unit
1.5V
Output Timing Reference Level
(Bipolar Supply)
Current Source
NOTES: programmable from +7V. programmable from 16mA. Tester Impedance typically midpoint adjusted simulate typical resistive load circuit. tester includes capacitance.
White Microelectronics Phoenix, (602) 437-1520
WE32K32-XXX
WRITE
write cycle initiated when high pulse with low. address latched falling edge whichever occurs last. data latched rising edge whichever occurs first. byte write operation will automatically continue completion.
WRITE CYCLE TIMING
Figures show write cycle timing relationships. write cycle begins with address application, write enable chip select. Chip select accomplished placing line low. Write enable consists setting line low. write cycle begins when last either goes low. line transition from high also initiates internal µsec delay timer permit page mode operation. Each subsequent transition from high that occurs before completion µsec time will restart timer from zero. operation timer same retriggerable one-shot. WRITE CHARACTERISTICS (VCC 5.0V, -55°C +125°C)
WRITE CYCLE Write Cycle Parameter Write Cycle Time, Address Set-up Time Write Pulse Width Chip Select Set-up Time Address Hold Time Data Hold Time Chip Select Hold Time Data Set-up Time Write Pulse Width High Output Enable Set-up Time Symbol tCSH tWPH tOES tOEH -120 -150 Unit
White Microelectronics Phoenix, (602) 437-1520
EEPROM MODULES
Output Enable Hold Time
WE32K32-XXX
FIG.
WRITE WAVEFORMS CONTROLLED
ADDRESS DATA tCSH
FIG.
WRITE WAVEFORMS CONTROLLED
ADDRESS DATA tCSH
EEPROM MODULES
White Microelectronics Phoenix, (602) 437-1520
WE32K32-XXX
READ
WE32K32-XHX stores data memory location determined address pins. When high, this data present outputs. When high, outputs high impedance state. This line control prevents contention. READ CHARACTERISTICS (See Figure (VCC 5.0V, -55°C +125°C)
READ CYCLE Parameter Read Cycle Time Address Access Time Access Time Output Hold from Add. Change, Output Enable Output Valid Chip Select Output High Symbol -120 -150 Unit
FIG.
READ WAVEFORMS
ADDRESS
ADDRESS VALID
NOTES: delayed tACS after falling edge without impact tACC after address change without impact tACC tOHZ specified from whichever occurs first 5pF). transitions measured ±200 from steady state with loading specified "Load Test Circuits."
OUTPUT VALID HIGH
OUTPUT
White Microelectronics Phoenix, (602) 437-1520
EEPROM MODULES
WE32K32-XXX
DATA POLLING
WE32K32-XXX offers data polling feature which allows faster method writing device. Figure shows timing diagram this function. During byte page write cycle, attempted read last byte written will result complement written data (for each chip.) Once write cycle been completed, true data valid outputs next cycle begin. Data polling begin time during write cycle. DATA POLLING CHARACTERISTICS (VCC 5.0V, -55°C +125°C)
Parameter Data Hold Time Hold Time Output Valid Write Recovery Time Symbol tOEH Unit
FIG.
DATA POLLING WAVEFORMS
WE1-4
CS1-4 HIGH ADDRESS
I/O7
EEPROM MODULES
White Microelectronics Phoenix, (602) 437-1520
WE32K32-XXX
PAGE WRITE OPERATION
WE32K32-XXX page write operation that allows bytes data written into device consecutively loads during internal programming period. Successive bytes loaded same manner after first data byte been loaded. internal timer begins time operation each write cycle. another write cycle completed within 150µs less, time period begins. Each write cycle restarts delay period. write cycles continued long interval less than time period. usual procedure increment least significant address lines from through each write cycle. this manner page bytes loaded EEPROM burst mode before beginning relatively long interval programming cycle. After 150µs time completed, EEPROM begins internal write cycle. During this cycle entire page bytes will written same time. internal programming cycle same regardless number bytes accessed.
PAGE WRITE CHARACTERISTICS (VCC 5.0V, -55°C +125°C)
PAGE MODE WRITE CHARACTERISTICS Parameter Write Cycle Time, Data Set-up Time Data Hold Time Write Pulse Width Byte Load Cycle Time Write Pulse Width High Symbol tBLC tWPH -120 -150 Unit
FIG.
PAGE WRITE WAVEFORMS
EEPROM MODULES
ADDRESS VALID ADDRESS VALID DATA DATA
BYTE BYTE BYTE BYTE BYTE BYTE
NOTE: Decoded Address Lines must valid duration write.
White Microelectronics Phoenix, (602) 437-1520
WE32K32-XXX
FIG.
SOFTWARE BLOCK DATA PROTECTION ENABLE ALGORITHM(1)
LOAD DATA ADDRESS 5555 LOAD DATA ADDRESS 2AAA LOAD DATA ADDRESS 5555 LOAD DATA ADDRESS(4) LOAD LAST BYTE LAST ADDRESS
NOTES: Data Format: (Hex); Address Format: (Hex). Write Protect state will activated write even other data loaded. Write Protect state will deactivated write period even other data loaded. bytes data loaded.
WRITES ENABLED(2)
ENTER DATA PROTECT STATE
EEPROM MODULES
White Microelectronics Phoenix, (602) 437-1520
WE32K32-XXX
FIG.
SOFTWARE BLOCK DATA PROTECTION DISABLE ALGORITHM(1)
SOFTWARE DATA PROTECTION
software write protection feature enabled disabled user. When shipped White Microelectronics, WE32K32-XXX feature disabled. Write access device unrestricted. enable software write protection, user writes three access code bytes three special internal locations. Once write protection been enabled, each write EEPROM must same three byte write sequence permit writing. After setting software data protection, attempt write device without three-byte command sequence will start internal write timers. data will written device, however, duration tWC. write protection feature disabled byte write sequence specific data specific locations. Power transitions will reset software write protection. Each 32KByte block EEPROM independent write protection. more blocks enabled rest disabled combination. software write protection guards against inadvertent writes during power transitions, unauthorized modification using PROM programmer.
LOAD DATA ADDRESS 5555 LOAD DATA ADDRESS 2AAA LOAD DATA ADDRESS 5555 LOAD DATA ADDRESS 5555 LOAD DATA ADDRESS 2AAA LOAD DATA ADDRESS 5555
HARDWARE DATA PROTECTION
These features protect against inadvertent writes WE32K32-XXX. These included improve reliability during normal operation: power delay climbs past 3.8V typical device will wait 5msec typical before allowing write cycles.
EXIT DATA PROTECT STATE
LOAD DATA ADDRESS(4) LOAD LAST BYTE LAST ADDRESS
sense While below 3.8V typical write cycles inhibited. Write inhibiting Holding either high inhibits write cycles. Noise filter Pulses <8ns (typ) will initiate write cycle.
EEPROM MODULES
NOTES: Data Format: (Hex); Address Format: (Hex). Write Protect state will activated write even other data loaded. Write Protect state will deactivated write period even other data loaded. bytes data loaded.
White Microelectronics Phoenix, (602) 437-1520
WE32K32-XXX
PACKAGE 400:
PIN, TYPE, CERAMIC HEX-IN-LINE PACKAGE, (H1)
27.3 (1.075) 0.25 (0.010)
IDENTIFIER SQUARE BOTTOM
25.4 (1.0)
4.34 (0.171) 3.81 (0.150) 0.13 (0.005) 2.54 (0.100) 1.42 (0.056) 0.13 (0.005) 0.76 (0.030) 0.13 (0.005) 15.24 (0.600) 1.27 (0.050) 0.46 (0.018) 0.05 (0.002) 25.4 (1.0)
LINEAR DIMENSIONS MILLIMETERS PARENTHETICALLY INCHES
EEPROM MODULES
White Microelectronics Phoenix, (602) 437-1520
WE32K32-XXX
PACKAGE 510:
LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2U)
25.15 (0.990) 0.25 (0.010) 22.36 (0.880) 0.25 (0.010) 3.51 (0.140) 0.25 (0.010) 0.10 (0.002)
0.25 (0.010)
24.0 (0.946) 0.25 (0.010) 1.01 (0.040) 0.13 (0.005)
0.25 (0.010)
0.53 (0.021) 0.18 (0.007)
23.87 (0.940)
DETAIL
1.27 (0.050) 0.38 (0.015) 0.05 (0.002) 20.3 (0.800) DETAIL
White lead CQFP fills same function JEDEC lead CQFJ PLCC. lead inspection advantage CQFP form.
0.940"
LINEAR DIMENSIONS MILLIMETERS PARENTHETICALLY INCHES
White Microelectronics Phoenix, (602) 437-1520
EEPROM MODULES
WE32K32-XXX
ORDERING INFORMATION 32K32
LEAD FINISH: Blank Gold plated leads Solder leads DEVICE GRADE: MIL-STD-883 Compliant Military Screened -55°C +125°C Industrial -40°C +85°C Commercial +70°C PACKAGE TYPE: Ceramic In-line Package, (Package 400) 22.4mm Ceramic Quad Flat Pack, CQFP Profile (Package 510) ACCESS TIME (ns) IMPROVEMENT MARK Connect pins upgrade ORGANIZATION, User Configurable 64Kx16 128Kx8 EEPROM WHITE MICROELECTRONICS
DEVICE TYPE
EEPROM Module EEPROM Module EEPROM Module EEPROM Module EEPROM Module EEPROM Module
SPEED
150ns 120ns 90ns 150ns 120ns 90ns
PACKAGE
(H1) (H1) (H1) lead CQFP/J (G2U) lead CQFP/J (G2U) lead CQFP/J (G2U)
5962-94614 01HXX 5962-94614 02HXX 5962-94614 03HXX
EEPROM MODULES
5962-94614 01HZX 5962-94614 02HZX 5962-94614 03HZX
White Microelectronics Phoenix, (602) 437-1520

Access Times 120, 150ns MIL-STD-883 Compliant Devices Available Packag

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