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XE1201 Channelized applications based external Author: Coron


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AN1201.04 Application Note
XE1201 Channelized applications based external
Author: Coron
further information, please contact:
XEMICS
E-mail:info@xemics.com Web: http://www.xemics.com/
Application Note
February 2001
AN1201.04
TABLE CONTENTS INTRODUCTION.2 TYPICAL APPLICATION
Multi point point communication.3 Multi Users concept.3 Star Network
INTRODUCTION This application note describes operations XE1201 channelized application. XE1201 half-duplex single chip transceiver operation 433MHz band 300-500MHz band. modulation used Continuous Phase level Frequency Shift Keying (CPFSK). Normally built operate with resonator that generates Local Oscillator frequency, XE1201 connected external frequency synthesizer channelized application. access XE1201 Datasheet, simply download from XEMICS' website:
GENERAL DESCRIPTION PLL4
Functional Overview Charge Pump Principe.5
III.
EXTERNAL COMPONENTS
Tank VCO.6 Synthesizer.7 External Power amplifiers
SET-UP MEASUREMENT
Configuration Current consumption.13 performances.13 Phase noise
EXIBIT BILL MATERIAL EXIBIT ELECTRICAL SCHEMATIC.15
Application Note
TYPICAL APPLICATION
February 2001
AN1201.04
Typical application configurations have been illustrated below:
Multi point point communication.
Star Network
Multi Users concept
USER
USER
USER
Application Note
February 2001
AN1201.04
GENERAL DESCRIPTION Frequency Divider block (PFD) compare phase between with reference signal. Reference Divider Main Divider function, this block divides frequency reference signal (Fref). output connected Phase Frequency Divider block (Finter1). Phase Frequency Divider (PFD) Phase Frequency Divider achieves comparison between frequencies, Main divider output (Fmain) Reference Divider. result this operation signal proportional phase error between inputs. This signal used indicate which compensation needs applied Charge Pump loop Filter. Charge Pump Loop Filter: This block achieves control output signal V_Tune. output depends result Phase Frequency Divider. components loop filter calculated define current signal from Charge Pump, filter bandwidth frequency step. simple filter added removing harmonics.
XEMICS developed application board order give better support with perfect evaluation. This application board based transceiver XE1201 frequency synthesizer from Philips, SA7016. internal XE1201 (Voltage Control Oscillator) used (Phase Lock Loop).
Functional Overview Figure below (Fig1) shows typical structure Phase Lock Loop (PLL), which constitutes mains blocks.
VCO: This block generates Local Oscillator inside XE1201. frequency depends input voltage. varicaps plus XE1201 constitute this block. signal V_Tune, controls output frequency comes from Charge Pump (block synthesizer). Main Divider: This block achieves frequency division output (Flo). This frequency (Flo) corresponds Local Oscillator value. Main Divider output connected Phase
Finter=Fref/N =Flo/M
V_tune
Charge pump
Loop
Fref
Reference divider
Finter1 Finter2
Filter
Tank
main
Main divider XE1201
Synthesizer Figure Schematic block
Application Note
Charge Pump Principle
February 2001
AN1201.04
Charge pump represented following schematic (Fig current sources, filter capacitor constitute functional block Charge Pump.
+VDD
different cases described. Finter1> Finter2 opened closed capacitor charged current making voltage V_Tune increase. frequency from increases. Finter1 Finter2 closed opened capacitor discharged current making voltage V_Tune decrease. frequency from decreases.
0.5V V_tune 2.5V
Loop Filter
Figure Functional block Charge Pump
Application Note
III. EXTERNAL COMPONENTS
February 2001
AN1201.04
Tank resonant circuit (Figure connected between (pins XE1201) order control VCO. This resonant circuit calculated obtain Local Oscillator value required. signal coming from synthesizer (V_Tune) controls frequency oscillation varicaps parallel inductor. Because signal V_Tune modifies capacitor value varicap also modifies frequency resonant circuit resonant circuit, constitute allows biasing achieved. This circuit also influences output frequency. pins SWB, resonant circuit also connected C3). This circuit replaces 433MHz resonator.
External components values With 433.92MHz =>4pF using following formula, defined
44.8nH
39nH 2-6pF External components values With 433.92MHz 2-6pF using following formula, defined
33.6nH
33nH 2-6pF
External components biasing: With 433.92MHz 2-6pF
values
using following formula, defined
XE1201
V_tune
33.6nH
33nH 2-6pF
RFin
Figure tank circuit
Application Note
Synthesizer
February 2001
Damping Factor:
AN1201.04
Gain: KVCO external components tank have been defined. this case, gain calculatedby applying signal V_Tune measuring Local Oscillator value. objective obtain Flo=433.92MHz V_Tune Vdd/2 Figure below shows determine KVCO.
V_tune Analyseur spectre
0.707
Main Divider: With:
Finter 500kHz 433.92
main divider defined following:
1101100100b Finter
[MHz]
Reference divider: inputs need respect following equations:
1.25 V_tune
500kHz Fref
Figure KVCO measurement
14.5MHz
Phase Detector Gain: charge pump current values (Icp) determined current Rset (pin10) conjunction with internal bits SA7016. From datasheet SA7016, Rset fixed 7.5K voltage 1.25V. with Cp=0, charge pump current determine following:
reference divider consists divider with programmable values between 1023 followed three binary counter. bits register determines which output pulses selected main/auxiliary detector input. more information refer SA7016 Datasheet. reference-input signal been fixed 10MHz. with: R[4.1023] reference divider defined following:
Fref 10.10 10100b 500.10
3.Vset 1.25 Rset 7.5.10
Loop Filter structure this filter shown figure below: filter spurious
harmonics tune
charge pump current modified Philips control program frequency synthesizer SA7016.
500µA
Figure Loop filter structure
Application Note
Loop filter Design Equations:
February 2001
AN1201.04
Final frequency resolution after settling
With natural pulsation with phase detector gain gain, equation defines capacitor
frequency error after settling switching time
500.10 14.5.10
37.10 6.10nF
choice
Switching time (tsw=400µs) Natural frequency (rad/sec) Damping Factor
6.8nF
From value capacitor resistor defined using equation (4):
0.707.
500.10 6.1.10-9
6.25k
value
6.20k
equation defines capacitor from value
R2.C
6.80.10
Design example: Frequency error within1kHz Switching time 400µs KVCO gain Phase detector gain From equation with condition above:
software Winsynth from Philips (Figure allows defining values
Summary:
6.20k 6.8nF
1000 0.04.10 400.10
From result equation with equation (2), natural pulsation defined following:
ln(0.04.10 0.707 0.707 400.10 37.10
Application Note
Winsynth: Filter Calculator
February 2001
AN1201.04
Third order filter values
Figure Filter Calculator
Application Note
Decoupling Capacitors
February 2001
AN1201.04
Fref input: figure below shows decoupling capacitors Fref input.
Cref1 100nF fref REFIN+ Finter 500kHz
schematic equivalent high pass filter input TKC. choice have cut-off frequency equal central frequency divided
Vout
REFINCref2 =10nF
Vout RFIN RFIN
Figure Fref input
RFIN
RFIN input decoupling capacitor Rfin input shown figure with equivalent schematic.
CRFin1 RFIN+ RFINCRFin2 Vout
with
433.92MHz fcut 43.92MHz
Figure RFin input
Application Note
External Power amplifiers
February 2001
AN1201.04
RFin+ input Philips synthesiser, SA7016, accepts signal level -18dBm min. signal, coming from XE1201, maximum level -29dBm. power amplifier designed increase signal level SA7016 input, -18dBm. This external power amplifier (Figure needs have gain higher than 12dB.
+VDD BFQ67 Cout Vout
second power amplifier (Figure been added order obtain +5dBm output power instead -5dBm (typical output power value XE1201). this power amplifier needs have gain 10dB resonate 433.92MHz. order optimise power consumption amplifier needs switched when XE1201 configured receiver mode this case this structure also used external switch between Transmit Receive. RxTx signal comes from microcontroller used program transceiver XE1201. also used manage external switch. This reduces number external components uses only antenna.
+VDD
Figure Power Amplifier synthesiser
RxTx
BC808
components equivalent resonant circuit frequency.
BFQ67
Vout
capacitor defined follows:
With 18nH 433.92
.433.92.10 .18.10
7.47
Figure Power Amplifier XE1201 output
resistors were chosen order create gain between Vout higher than 12dB using current consumption. result R1=47k R2=110k current consumption Gain 12.5dB. Capacitors Cout two-capacitor values need defined using high pass filter equivalent schematics with added noise Power amplifier needs minimized. this case: Cin=1pF Cout=100pF
works: signal RxTx equal zero, transistor saturated. this case equal Vdd-VCE2, transistor with will amplify signal Vin. RxTx equal (High logic level), transistor blocked equal also blocked. External component values: R1=47k R2=100k R3=47k L5=18nH (choice) load C5=1.5pF C6=3.3pF
Application Note
SET-UP
February 2001
AN1201.04
performances XE1201 with external directly evaluated reference board. better "ease use" XEMICS developed software program transceiver PHILIPS synthesiser. more information about XE1201 set-up refer XE1201EVK User Guide http://www.xemics.com
XEMICS software allows programming SA7016 typical configuration shown Figure parameters accessible, example: output (434MHz Typical value) Main Divider Intermediate frequency (Fcomp) Step Reference frequeny Divider
Figure SA7076 Programming Screen
Application Note
MEASUREMENT
February 2001
performances
AN1201.04
Configuration XE1201 with external synthesiser set-up with following configuration:
receiver mode Sensitivity=-103dBm@16kbps transmitter mode -20dBm programmed Gain=8dB -11dBm programmed Gain=6dB -8dBm programmed Gain=7dB -5dBm programmed Gain=7dB -12dBm measured -5dBm measured -1dBm measured +2dBm measured
Frequencies 433.92MHz 10MHz Divider 1101100100b 10100b Step 62.5kHz
Phase noise following formula Figure used calculate phase noise PLL.
100kHz With Resolution Bandwidth
P[dBm] 100kHz
Current consumption evaluate performances complete systems, current consumption measured three different modes: Stand-by, receiver transmitter mode. These measures have been made with temperature Stand-by mode Receiver mode Transmitter mode: 100µA 19.25mA -20dBm 23mA -11dBm 24mA -8dBm 25mA -5dBm 26mA
f[MHz] 100kHz
Figure Phase Noise measurement
-42.89 log(100.10 -92.9dBm
Note: Phase noise been calculated Power Amplifier output. This block also added some phase noise.
Application Note
EXHIBIT BILL MATERIAL
February 2001
AN1201.04
Name Varicap C12, C13, C16, C18, C22, C23, C26, C25, C20, C21, C24, C6,C7, C11, C19,
Type XE1201 Transceiver Synthesizer XTAL Quartz XTAL Quartz Transistor Transistor Transistor Decoupling capacitor Capacitor 0805 Decouplig capcitor Capacitor 0805 Capacitor 0805 Capacitor 0805 Capacitor 0805 Capacitor 0805 Capacitor 0805 Capacitor 0805 Capacitor 0805 Capacitor 0805 Trim-Capacitor Trim-Capacitor self self self self self self Load Pola resistor Loop Filter Loop Filter Pola resistor Pola resistor
Reference XE1201-T SA7076 IQXO-350C S0409745 BFQ67 BC808 BFQ67 BBY51 +/-0.25pF, +/-0.25pF, +/-0.25pF, +/-0.25pF, +/-0.25pF, +/-0.25pF, +/-0.25pF, +/-0.25pF, +/-0.25pF, +/-0.25pF, TZC03Z060A110 TZC03Z060A110 0805 CS-120-X 0805 CS-180-X 0805 CS-220-X 0805 CS-270-X 0805 CS-330-X 0805 CS-560-X
Value
Form TQFP32 SOT403-1 Sot23 Sot23 Sot23
Quantity
10I00MHz 4.00MHz
10uF 10nF 10nF 100nF 1.5pF 2.2pF 3.3pF 6.8pF 100pF 150pF 680pF 12nH 18nH 22nH 27nH 33nH 56nH 4.7k 6.2k 110k
SMD0805 SMD0805 SMD0805 SMD0805 SMD0805 SMD0805 SMD0805 SMD0805 SMD0805 SMD0805 SMD0805 SMD0805 SMD0805 SMD0805 SMD0805 SMD0805 SMD0805 SMD0805 SMD1206 SMD1206 SMD1206 SMD1206 SMD1206 SMD1206
Application Note
EXIBIT ELECTRICAL SCHEMATIC
February 2001
AN1201.04
2001- rights reserved. Reproduction whole part this document prohibited without prior written consent
copyright owner. information presented this document does form part quotation contract, believed accurate reliable changed without notice. publisher consequence will accept liability. Publication thereof does convey imply license under patent- other industrial intellectual property rights.
Printed Switzerland March 2001
AN0103-119

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