CY7C375 UltraLogic128-Macrocell Flash CPLD macrocells eight

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CY7C375 UltraLogic128-Macrocell Flash CPLD macrocells eight

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CY7C375
UltraLogic128-Macrocell Flash CPLD
macrocells eight logic blocks pins dedicated inputs including clock pins Hold capabilities I/Os dedicated inputs hidden delays High speed fMAX Electrically alterable FLASH technology Available 160-pin TQFP, CQFP, packages
Functional Description
CY7C375 Flash erasable Complex Programmable Logic Device (CPLD) part FLASH370family high-density, high-speed CPLDs. Like members FLASH370 family, CY7C375 designed bring ease high performance 22V10 high-density PLDs. macrocells CY7C375 divided between eight logic blocks. Each logic block includes macrocells, product term array, intelligent product term allocator. logic blocks LASH370 architecture connected with extremely fast predictable routing resource-the Programmable Interconnect Matrix (PIM). brings flexibility, routability, speed, uniform delay interconnect.
Logic Block Diagram
CLOCK INPUTS INPUTS
INPUT MACROCELLS I/Os I/O0-I/O LOGIC BLOCK
INPUT/CLOCK MACROCELLS LOGIC BLOCK I/Os I/O112 -I/O
I/Os LOGIC BLOCK
LOGIC BLOCK I/Os
I/O16-I/O
I/Os LOGIC BLOCK
LOGIC BLOCK I/Os
I/O96-I/O
I/O32-I/O
I/Os LOGIC BLOCK
LOGIC LOGIC BLOCK I/Os
I/O80-I/O
I/O48-I/O
I/O64-I/O
Selection Guide
7C375-100 Maximum Propagation Delay, (ns) Minimum Set-Up, (ns) Maximum Clock Output, (ns) Maximum Supply Current, (mA) Commercial Military/Industrial 7C375-83 7C375-66 7C375L-66
Cypress Semiconductor Corporation
3901 North First Street
Jose
95134 408-943-2600 September 1992 Revised April 1998

CY7C375 UltraLogic128-Macrocell Flash CPLD macrocells eight

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