These N-Channel enhancement mode power field effect transistors produc

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NDH853N N-Channel Enhancement Mode Field Effect Transistor
These N-Channel enhancement mode power field effect transistors produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process especially tailored minimize on-state resistance provide superior switching performance. These devices particularly suited voltage applications such battery powered circuits portable electronics where fast switching, in-line power loss, resistance transients needed.
Features
RDS(ON) 0.017 RDS(ON) 0.025 High density cell design extremely RDS(ON). Proprietary SuperSOTTM-8 small outline surface mount package with high power current handling capability.
Absolute Maximum Ratings 25°C unless otherwise noted
Symbol VDSS VGSS Parameter Drain-Source Voltage Gate-Source Voltage Drain Current Continuous Pulsed Maximum Power Dissipation
(Note (Note (Note (Note
NDH853N
Units
TJ,TSTG
Operating Storage Temperature Range
THERMAL CHARACTERISTICS Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note (Note
°C/W °C/W
1997 Fairchild Semiconductor Corporation
NDH853N Rev.
ELECTRICAL CHARACTERISTICS 25°C unless otherwise noted)
Symbol Parameter Conditions Units
CHARACTERISTICS BVDSS IDSS IGSSF IGSSR VGS(th) RDS(ON) Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current 55°C Gate Body Leakage, Forward Gate Body Leakage, Reverse VDS= VGS, 125°C Static Drain-Source On-Resistance 125°C ID(on) Ciss Coss Crss tD(on) tD(off) On-State Drain Current Forward Transconductance 0.014 0.02 0.021 -100
CHARACTERISTICS (Note Gate Threshold Voltage 0.017 0.031 0.025
DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance 1140
SWITCHING CHARACTERISTICS (Note Turn Delay Time Turn Rise Time Turn Delay Time Turn Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VGEN RGEN 12.7
NDH853N Rev.
ELECTRICAL CHARACTERISTICS 25°C unless otherwise noted)
Symbol Parameter Conditions
(Note
Units
DRAIN-SOURCE DIODE CHARACTERISTICS MAXIMUM RATINGS
Notes: junction-to-case case-to-ambient thermal resistance where case thermal reference defined solder mounting surface drain pins. guaranteed design while determined user's board design.
Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage 0.72
DS(ON)@T
Typical using board layouts shown below 4.5"x5" FR-4 still environment: 70oC/W when mounted cpper. 125oC/W when mounted 0.026 copper. 135oC/W when mounted 0.005 copper.
Scale letter size paper Pulse Test: Pulse Width 300µs, Duty Cycle 2.0%.
NDH853N Rev.
Typical Electrical Characteristics
=10V
DRAIN-SOURCE CURRENT
DRAIN-SOURCE ON-RESISTANCE
3.5V
DS(on) NORMALIZED
DRAIN-SOURCE VOLTAGE DRAIN CURRENT
Figure On-Region Characteristics.
Figure On-Resistance Variation withDrain Current Gate Voltage.
DRAIN-SOURCE ON-RESISTANCE
DRAIN-SOURCE ON-RESISTANCE
7.6A
DS(ON), NORMALIZED
DS(on) NORMALIZED
125°C
25°C
-55°C
JUNCTION TEMPERATURE (°C)
DRAIN CURRENT
Figure On-Resistance Variation with Temperature.
Figure On-Resistance Variation with Drain Current Temperature.
GATE-SOURCE THRESHOLD VOLTAGE
-55°C
125°C
DRAIN CURRENT
GATE SOURCE VOLTAGE
NORMALIZED
25°C
250µA
JUNCTION TEMPERATURE (°C)
Figure Transfer Characteristics.
Figure Gate Threshold Variation with Temperature.
NDH853N Rev.
Typical Electrical Characteristics (continued)
DRAIN-SOURCE BREAKDOWN VOLTAGE
250µA
REVERSE DRAIN CURRENT
1.08 1.06 1.04 1.02 0.98 0.96 0.94 JUNCTION TEMPERATURE (°C)
NORMALIZED
125°C 25°C -55°C
0.01
0.001
0.0001 BODY DIODE FORWARD VOLTAGE
Figure Breakdown Voltage Variation with Temperature.
Figure Body Diode Forward Voltage Variation with Source Current Temperature.
3000 2000
7.6A
GATE-SOURCE VOLTAGE
CAPACITANCE (pF)
1000
DRAIN SOURCE VOLTAGE
GATE CHARGE (nC)
Figure Capacitance Characteristics.
Figure Gate Charge Characteristics.
d(on)
d(off)
VOUT
INVERTED
PULSE WIDTH
Figure Switching Test Circuit.
Figure Switching Waveforms.
NDH853N Rev.
Typical Electrical Thermal Characteristics (continued)
STEADY-STATE POWER DISSIPATION
=10V
TRANSCONDUCTANCE (SIEMENS)
-55°C
25°C
125°C
DRAIN CURRENT
4.5"x5" FR-4 Board
Still
COPPER MOUNTING AREA
Figure Transconductance Variation with Drain Current Temperature.
Figure SOT-8 Maximum Steady-State Power Dissipation versus Copper Mounting Area.
STEADY-STATE DRAIN CURRENT
DRAIN CURRENT
0.03 0.01
4.5"x5" FR-4 Board Still
SINGLE PULSE =See Note1c 25°C
COPPER MOUNTING AREA
DRAIN-SOURCE VOLTAGE
Figure Maximum Steady-State Drain Current versus Copper Mounting Area.
Figure Maximum Safe Operating Area.
TRANSIENT THERMAL RESISTANCE
0.05
r(t), NORMALIZED EFFECTIVE
0.05 0.02
r(t) Note
P(pk)
0.03 0.02 0.01 0.0001
0.01 Single Pulse
Duty Cycle,
0.001
0.01
TIME (sec)
Figure Transient Thermal Response Curve.
Note: Thermal characterization performed using conditions described note Transient thermal response will change depending circuit board design.
NDH853N Rev.

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