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Gauge High Discharge Rates Conservative repeatable measurement av
Top Searches for this datasheetbq2011K Gauge High Discharge Rates Conservative repeatable measurement available charge rechargeable batteries Designed portable equipment such power tools with high discharge rates Designed battery pack integration General Description bq2011K Gauge intended battery-pack installation maintain accurate record battery's available charge. monitors voltage drop across sense resistor connected series between negative battery terminal ground determine charge discharge activity battery. bq2011K designed systems such power tools with very high discharge rates. Battery self-discharge estimated based internal timer temperature sensor. Compensations battery temperature rate charge discharge applied charge, discharge, selfdischarge calculations provide available charge information across wide range operating conditions. Initial battery capacity using PROG1-4 SPFC pins. Actual battery capacity automatically "learned" course discharge cycle from full empty displayed depending display mode. Nominal available charge directly indicated using five-segment display. These segments used graphically indicate nominal available charge. bq2011K supports simple single-line bidirectional serial link external processor (common ground). bq2011K outputs battery information response external commands over serial link. support subassembly testing, outputs also controlled command. external processor also overwrite some bq2011K gauge data registers. bq2011K operate directly from four cells. With output external transistor, simple, inexpensive regulator built provide from greater number cells. Internal registers include available charge, temperature, capacity, battery battery status. 120µA typical standby current (self-discharge estimation mode) Small size enables implementations little square inch Direct drive LEDs capacity display Self-discharge compensation using internal temperature sensor Simple single-wire serial communications port subassembly testing 16-pin narrow SOIC Connections Names LCOM common output DISP Voltage reference output connect Serial communications input/output Register backup input Battery sense input Display control input Sense resistor input 3.0-6.5V Negative battery terminal LCOM SEG1/PROG1 SEG2/PROG2 SEG3/PROG3 SEG4/PROG4 SEG5 SPFC DISP SEG1/PROG1 segment Program input SEG2/PROG2 segment Program input SEG3/PROG3 segment Program input SEG4/PROG4 segment Program input SEG5 SPFC segment Programmed full count selection input 16-Pin Narrow SOIC PN2011JK.eps 10/97 bq2011K Descriptions LCOM common Open-drain output switches source current LEDs. switch during initialization allow reading PROG1-4 pull-up pull-down program resistors. LCOM high impedance when display off. SEG1- SEG5 display segment outputs Each output activate sink current sourced from LCOM, battery, VCC. PROG1- PROG4 Programmed full count selection inputs (dual function with SEG1 SEG4) These three-level input pins define programmed full count (PFC) conjunction with SPFC pin, define display mode enable disable self-discharge. SPFC Programmed full count selection input This three-level input along with PROG1-3 define programmed full count (PFC) thresholds described Table state SPFC only read immediately after reset condition. Sense resistor input voltage drop (VSR) across sense resistor monitored integrated over time interpret charge discharge activity. input tied side sense resistor battery pack ground (see Figure indicates discharge, indicates charge. effective voltage drop, VSRO, seen bq2011K (see Table DISP connect Display control input DISP floating allows display active during certain charge discharge conditions. Transitioning DISP activates display seconds. Secondary battery input This input monitors single-cell voltage potential through high-impedance resistive divider network end-of-discharge voltage (EDV) threshold maximum cell voltage (MCV). Register backup input This input used provide backup potential bq2011K registers during periods when storage capacitor should connected RBI. Serial This open-drain bidirectional pin. Voltage reference output regulator provides voltage reference output optional micro-regulator. Supply voltage input Ground bq2011K Functional Description General Operation bq2011K determines battery capacity monitoring amount charge input removed from rechargeable battery. bq2011K measures discharge charge currents, estimates self-discharge, monitors battery low-battery voltage thresholds, compensates temperature charge/discharge rates. charge measurement made monitoring voltage across smallvalue series sense resistor between battery's negative terminal ground. available battery charge determined monitoring this voltage over time correcting measurement environmental operating conditions. Figure shows typical battery pack application bq2011K using display with absolute mode charge-state indicator. absolute display mode uses programmed full count (PFC) full reference, forcing each segment display represent fixed amount charge. push-button display feature available momentarily enabling display. bq2011K monitors charge discharge currents voltage across sense resistor (see Figure filter between negative battery terminal required rate change battery current great. Register Backup bq2011K input intended used with storage capacitor provide backup potential bq2011K Gauge ZVNL110A LCOM SEG1/PROG1 SEG2/PROG2 SEG3/PROG3 SEG4/PROG4 SEG5 SPFC DISP Indicates optional. Directly connect across cells (4.8V nominal should exceed 6.5V) with resistor Zener diode limit voltage during charge. Otherwise, needed regulation cells. Programming resistors ESD-protection diodes shown. Charger Load required (application-specific), where maximum should exceed 20K. FG201103.eps Figure Application Diagram: Display, Absolute Mode bq2011K ternal bq2011K registers when momentarily drops below 3.0V. output when above 3.0V. After rises above 3.0V, bq2011K checks internal registers data loss corruption. data changed, then register cleared, register loaded with initial PFC. TMPGG (hex) Temperature Range -30°C -30°C -20°C -20°C -10°C -10°C 10°C 10°C 20°C 20°C 30°C 30°C 40°C 40°C 50°C 50°C 60°C 60°C 70°C 70°C 80°C 80°C Voltage Thresholds conjunction with monitoring charge/discharge currents, bq2011K monitors single-cell battery potential through pin. single-cell voltage potential determined through resistor-divider network following equation: where number cells, connected positive battery terminal, connected negative battery terminal. single-cell battery voltage monitored end-of-discharge voltage (EDV) maximum cell voltage (MCV). threshold level used determine when battery reached "empty" state, threshold used fault detection during charging. threshold bq2011K fixed VMCV 2.00V threshold varies function discharge current follows: VSRO (mV) VSRO VSRO VSRO VSRO VSRO VEDV 1.160 1.124 1.060 0.960 (OVLD) Layout Considerations bq2011K measures voltage differential between pins. (the offset voltage pin) greatly affected board layout. optimal results, board layout should follow strict rule single-point ground return. Sharing high-current ground with small signal ground causes undesirable noise small signal nodes. Additionally: capacitors VCC) should placed close possible pins, respectively, their paths should short possible. high-quality ceramic capacitor 0.1µf recommended VCC. sense resistor (RS) should close possible bq2011K. should located close possible pin. maximum should exceed 20K. Reset Reset accomplished with command over serial port described page Gauge Operation operational overview diagram Figure illustrates operation bq2011K. bq2011K accumulates measure charge discharge currents, well estimation self-discharge. Charge currents temperature rate compensated, whereas selfdischarge only temperature compensated. main counter, Nominal Available Charge (NAC), represents available battery capacity given time. Battery charging increments register, while battery discharging self-discharge decrement Temperature bq2011K internally determines temperature 10°C steps centered from -35°C +85°C. temperature steps used adapt charge discharge rate compensations, self-discharge counting, available charge display translation. temperature range available over serial port 10°C increments shown below: bq2011K register increment (Discharge Count Register). Discharge Count Register (DCR) used update Last Measured Discharge (LMD) register only complete battery discharge from full empty occurs without partial battery charges. Therefore, bq2011K adapts capacity determination based actual conditions discharge. battery's initial capacity equal Programmed Full Count (PFC) shown Table Until updated, counts beyond this threshold during subsequent charges. This approach allows gauge charger-independent compatible with type charge regime. Last Measured Discharge (LMD) learned battery capacity: last measured discharge capacity battery. initialization (application battery replacement), PFC. During subsequent discharges, updated with latest measured capacity Discharge Count Register (DCR) representing discharge from full below EDV. qualified discharge necessary capacity transfer from register. also serves 100% reference threshold used relative display mode. Programmed Full Count (PFC) initial battery capacity: initial gauge rate values programmed using PFC. also provides 100% reference absolute display mode. bq2011K configured given application selecting value from Table correct determined multiplying rated battery capacity sense resistor value: Battery capacity (mAh) sense resistor (mVh) Selecting slightly less than rated capacity absolute mode provides capacity above full reference much battery's life. Example: Selecting Value Given: Sense resistor 0.002 Number cells Capacity 1800mAh, NiCd cells Current range Absolute display mode Self-discharge Voltage drop across sense resistor 160mV Inputs Charge Current Rate Temperature Compensation Discharge Current Self-Discharge Timer Temperature Compensation Main Counters Capacity Reference (LMD) Nominal Available Charge (NAC) Last Measured Discharged (LMD) Discharge Count Qualified Register (DCR) Transfer Temperature Translation Temperature Step, Other Data Outputs Chip-Controlled Available Charge Display Serial Port FG201104.eps Figure Operational Overview bq2011K Therefore: 1800mAh 0.002 3.6mVh Select: 35840 counts 3.39mVh SPFC (float) PROG1, PROG2 PROG3 PROG4 initial full battery capacity 3.39mVh (1695mAh) until bq2011K "learns" capacity with qualified discharge from full EDV. Nominal Available Charge (NAC): counts during charge maximum value down during discharge self discharge reset initialization first valid charge following discharge EDV. prevent overstatement charge during periods overcharge, stops incrementing when LMD. Note: value when PROG4 pulled during reset. Table bq2011K Programmed Full Count Selections Programmed Full Count (PFC) 40192 32256 28928 25856 35840 23296 3.81 3.05 2.74 2.45 3.39 2.21 Scale 10560 Display Mode SPFC PROG1 PROG2 PROG3 10560 10560 Absolute 10560 10560 10560 Table Programmed Self-Discharge PROG4 Reset Value Self-Discharge Enabled Disabled bq2011K Discharge Count Register (DCR): counts during discharge independent could continue increasing after decremented Prior (empty battery), both discharge self-discharge increment DCR. After only discharge increments DCR. resets when LMD. does roll over stops counting when reaches FFFFh. value becomes value first charge after valid discharge VEDV valid charge initiations (charges greater than counts; 0.006 0.01C) occurred during period between detected. self-discharge count more than 4096 counts PFC, specific percentage threshold determined PFC). temperature when level reached during discharge. valid discharge flag (VDQ) indicates whether present discharge valid update. Self-Discharge Estimation bq2011K continuously decrements increments self-discharge based time temperature. self-discharge count rate programmed nominal rate disabled Table This rate battery temperature between 20-30°C. register cannot decremented below Count Compensations bq2011K determines fast charge when updates rate counts/sec. Charge activity compensated temperature rate before updating and/or DCR. Self-discharge estimation compensated temperature before updating DCR. Charge Compensation charge efficiency factors used trickle charge fast charge. Fast charge defined rate charge resulting counts/sec 0.15C 0.32C depending selections; Table compensation defaults fast charge factor until actual charge rate determined. Temperature adapts charge rate compensation factors over three ranges between nominal, warm, temperatures. compensation factors shown below. Charge Temperature <30°C 30-50°C 50°C Trickle Charge Compensation 0.80 0.75 0.70 Fast Charge Compensation 0.95 0.90 0.85 Charge Counting Charge activity detected based negative voltage input. charge activity detected, bq2011K increments rate proportional VSRO (VSR VOS) and, enabled, activates display VSRO -2mV. Charge actions increment after compensation charge rate temperature. bq2011K determines valid charge activity sustained continuous rate equivalent VSRO -400µV. valid charge equates sustained charge activity greater than counts. Once valid charge detected, charge counting continues until rises above -400µV. Discharge Counting discharge counts where VSRO 500µV cause register decrement increment. Exceeding fast discharge threshold (FDQ) rate equivalent VSRO activates display, enabled. display remains active seconds after VSRO falls below 2mV. Discharge Compensation Corrections rate discharge made adjusting thresholds. compensation factor used during discharge 1.00 rates temperatures. recoverable charge colder temperatures adjusted display purposes only. page bq2011K Self-Discharge Compensation self-discharge compensation programmed nominal rate disabled. This rate battery within 20-30°C temperature range (TMPGG 6x). This rate varies across ranges from <10°C >70°C, doubling with each higher temperature step (10°C). Table Current-Sensing Error Table illustrates current-sensing error function digital filter eliminates charge discharge counts register when VSRO (VSR VOS) between -400µV 500µV. Communicating With bq2011K bq2011K includes simple single-pin plus return) serial data interface. host processor uses interface access various bq2011K registers. Battery characteristics easily monitored adding single contact battery pack. open-drain bq2011K should pulled host system, left floating serial interface used. interface uses command-based protocol, where host processor sends command byte bq2011K. command directs bq2011K either store next eight bits data received register specified command byte output eight bits data specified command byte. communication protocol asynchronous return-toone. Command data bytes consist stream eight bits that have maximum transmission rate bits/sec. least-significant command data byte transmitted first. protocol simple enough that implemented most host processors using either polled interrupt processing. Data input from bq2011K sampled using pulse-width capture timers available some microcontrollers. Communication normally initiated host processor sending BREAK command bq2011K. BREAK detected when driven logic-low state time, greater. should then returned normal ready-high logic state time, tBR. bq2011K ready receive command from host processor. return-to-one data frame consists three distinct sections. first section used start transmission either host bq2011K taking Table Self-Discharge Compensation Temperature Range 10°C 10-20°C 20-30°C 30-40°C 40-50°C 50-60°C 60-70°C 70°C Self-Discharge Compensation Typical Rate/Day Error Summary susceptible error initialization updates occur. initialization, value includes error between programmed full capacity actual capacity. This error present until valid discharge occurs updated (see description "Layout Considerations" section). other cause error battery wear-out. battery ages, measured capacity must adjusted account changes actual battery capacity. Table bq2011K Current-Sensing Errors Symbol Parameter Integrated non-linearity error Integrated nonrepeatability error Typical Maximum Units Notes 0.1% above below 25°C volt above below 4.25V. Measurement repeatability given similar operating conditions. bq2011K logic-low state period, tSTRH,B. next section actual data transmission, where data should valid period, tDSU, after negative edge used start communication. data should held period, tDV, allow host bq2011K sample data bit. final section used stop transmission returning logic-high state least period, tSSU, after negative edge used start communication. final logic-high state should held until period, tSV, allow time ensure that transmission stopped properly. timings data break communication given serial communication timing specification illustration sections. Communication with bq2011K always performed with least-significant being transmitted first. Figure shows example communication sequence read bq2011K register. command register used select whether received command read write function. values are: CMDR Bits Where bq2011K outputs requested register contents specified address portion CMDR. following eight bits should written register specified address portion CMDR. bq2011K Registers bq2011K command status registers listed Table described below. lower seven-bit field CMDR contains address portion register accessed. Attempts write invalid addresses ignored. CMDR Bits (LSB) Command Register (CMDR) write-only CMDR register accessed when eight valid command bits have been received bq2011K. CMDR register contains fields: Command address Primary Status Flags Register (FLGS1) read-only FLGS1 register (address=01h) contains primary bq2011K flags. Written Host bq2011K CMDR Received Host bq2011K Break TD201103.eps Figure Typical Communication With bq2011K bq2011K Table bq2011K Command Status Registers Register Name Command register Primary status flags register Loc. (hex) Read/ Write Write Control Field 7(MSB) 0(LSB) Symbol CMDR FLGS1 Read CHGS Temperature TMPGG gauge register Nominal available charge high byte register Nominal available charge byte register Battery identification register Last measured discharge register Secondary status flags register Output control register Reset register used Read TMP3 TMP2 TMP1 TMP0 NACH NACH7 NACH6 NACH5 NACH4 NACH3 NACH2 NACH1 NACH0 NACL Read NACL7 NACL6 NACL5 NACL4 NACL3 NACL2 NACL1 NACL0 BATID BATID7 BATID6 BATID5 BATID4 BATID3 BATID2 BATID1 BATID0 LMD7 LMD6 LMD5 LMD4 LMD3 LMD2 LMD1 LMD0 FLGS2 Read OVLD OCTL Note: Write Write bq2011K charge status flag (CHGS) asserted when valid charge rate detected. Charge rate deemed valid when VSRO -400µV. VSRO greater than400µV discharge activity clears CHGS. CHGS values are: FLGS1 Bits CHGS mains until either updated three actions that clear occurs: self-discharge count register (SDCR) exceeded maximum acceptable value (4096 counts) update. valid charge action equal counts with VSRO -400µV. flag temperature below Where CHGS Either discharge activity detected VSRO -400µV VSRO -400µV values are: FLGS1 Bits battery replaced flag (BRP) asserted whenever potential (relative VSS), VSB, rises above 0.1V determines internal registers have been corrupted. flag also when bq2011K reset (see register description). cleared either bq2011K charged until discharged until reached. signifies that device been reset. values are: FLGS1 Bits Where SDCR 4096, subsequent valid charge action detected, asserted with temperature less than first discharge after end-of-discharge warning flag (EDV) warns user that battery empty. SEG1 blinks rate. detection disabled OVLD flag latched until valid charge been detected. values are: FLGS1 Bits Where bq2011K charged until discharged until flag asserted Initial full reset, serial port initiated reset occurred Where Valid charge action detected VEDV maximum cell voltage flag (MCV) asserted whenever potential (relative VSS) above 2.0V. flag asserted until condition causing removed. values are: FLGS1 Bits Temperature Gauge Register (TMPGG) read-only TMPGG register (address=02h) contains data fields. first field contains battery temperature. second field contains available charge from battery. TMPGG Temperature Bits TMP3 TMP2 TMP1 TMP0 Where 2.0V 2.0V valid discharge flag (VDQ) asserted when bq2011K discharged from NAC=LMD. flag bq2011K contains internal temperature sensor. temperature used charge efficiency factors well adjust self-discharge coefficient. temperature register contents translated shown Table bq2011K Table Temperature Register Contents TMP3 TMP2 TMP1 TMP0 Temperature -30°C -30°C -20°C -20°C -10°C -10°C 10°C 10°C 20°C 20°C 30°C 30°C 40°C 40°C 50°C 50°C 60°C 60°C 70°C 70°C 80°C 80°C adjustment between -20°C hysteresis. Nominal Available Charge Register (NAC) read/write NACH register (address=03h) read-only NACL register (address=17h) main gauging registers bq2011K. registers incremented during charge actions decremented during discharge self-discharge actions. correction factors charge/discharge efficiency applied automatically NAC. SEG4 reset, then NACH NACL SEG4 NACH NACL registers cleared zero. NACL stops counting when NACH reaches zero. When bq2011K detects valid charge, NACL resets zero; writing register affects available charge counts and, therefore, affects bq2011K gauge operation. Battery Identification Register (BATID) read/write BATID register (address=04h) available system determine type battery pack. BATID contents retained long greater than contents BATID have effect operation bq2011K. There default setting this register. Last Measured Discharge Register (LMD) read/write register (address=05h) that bq2011K uses measured full reference. bq2011K adjusts based measured discharge capacity battery from full empty. this bq2011K updates capacity battery. during bq2011K reset. bq2011K calculates available charge function NAC, temperature, full reference, either PFC. results calculation available display port gauge field TMPGG register. register used give available capacity increments from TMPGG Gauge Bits Secondary Status Flags Register (FLGS2) read-only FLGS2 register (address=06h) contains secondary bq2011K flags. charge rate flag (CR) used denote fast charge regime. Fast charge assumed whenever charge action initiated. flag remains asserted charge rate does fall below counts/sec. values are: FLGS2 Bits gauge display gauge portion TMPGG register adjusted cold temperature dependencies. piece-wise correction performed follows: Temperature -20°C -20°C Available Capacity Calculation "Full Reference" 0.75 "Full Reference" "Full Reference" Where When charge rate falls below counts/sec When charge rate above counts/sec bq2011K fast charge regime efficiency factors used when When trickle charge efficiency factors used. time change varies user-selectable count rates. discharge rate flags, DR2-0, bits 6-4. FLGS2 Bits Reset Register (RST) reset register (address=39h) provides means perform software-controlled reset device. full device reset accomplished first writing (address 05h) then writing register contents from 80h. Setting other than most-significant register allowed, results improper operation bq2011K. Resetting bq2011K sets following: They used determine present discharge regime follows: VSRO(mV) VSRO VSRO VSRO VSRO VSRO VDQ, OCE, (NAC when PROG4 Display bq2011K directly display capacity information using low-power LEDs. LEDs used, segment pins should tied VCC, battery, LCOM through resistors programming bq2011K. bq2011K displays battery charge state absolute mode. absolute mode, each segment represents fixed amount charge, based initial PFC. absolute mode, each segment represents PFC. battery wears over time, possible below initial PFC. this case, LEDs turn representing reduction actual battery capacity. capacity display also adjusted present battery temperature. temperature adjustment reflects available capacity given temperature does affect register. temperature adjustments detailed TMPGG register description. When DISP tied VCC, SEG1-5 outputs inactive. When DISP left floating, display becomes active during charge registers counting rate equivalent VSRO -2mV fast discharge registers counting rate equivalent VSRO 2mV. When DISP left floating, display also becomes active after detection discharge signal with minimum amplitude 20mV (10A 0.002) minimum pulse width 25ms. When DISP pulled low, segment outputs become active 0.5s. overload flag (OVLD) asserted when discharge overload detected, VSRO 60mV. OVLD remains asserted long condition valid. FLGS2 Bits OVLD Output Control Register (OCTL) write-only OCTL register (address=0ah) provides system with means check display connections bq2011K. segment drivers overwritten data from OCTL when least-significant OCTL, OCE, set. data bits OC5-1 OCTL register (see Table details) output onto segment pins, SEG5-1, respectively OCE=1. Whenever written OCTL should register location must cleared return bq2011K normal operation. cleared either writing logic zero serial port resetting bq2011K explained below. Note: Whenever OCTL register written, OCTL should written logic one. bq2011K segment outputs modulated banks, with segments alternating with segments segment outputs modulated approximately 320Hz, with each bank active period. SEG1 blinks rate whenever been detected below VEDV indicate low-battery condition less than PFC. Microregulator bq2011K operate directly from cells. facilitate power supply requirements bq2011K, output provided regulate external lowthreshold n-FET. micropower source bq2011K inexpensively built using external resistor. bq2011K Absolute Maximum Ratings Symbol other pins Parameter Relative Relative Minimum -0.3 -0.3 Maximum Unit Minimum series resistor should used protect case shorted battery (see bq2011K application note details). Commercial Industrial Notes Relative -0.3 TOPR Operating temperature Note: Permanent device damage occur Absolute Maximum Ratings exceeded. Functional operation should limited Recommended Operating Conditions detailed this data sheet. Exposure conditions beyond operational limits extended periods time affect device reliability. Voltage Thresholds TOPR; 6.5V) Symbol VEDV VSRQ VSRD VMCV Note: Parameter End-of-discharge warning Valid charge Valid discharge Maximum single-cell voltage Minimum 0.96 VEDV 1.95 Typical VEDV Maximum 1.04 VEDV -400 2.05 Unit Notes proper operation threshold detection circuit, must least 1.5V greater than voltage being measured. bq2011K Electrical Characteristics TOPR) Symbol VREF RREF RSBmax IDISP ILCOM IRBI VIHPFC VILPFC VIZPFC IIHPFC IILPFC VOLSL VOLSH VOHML VOHMH IOLS VIHDQ VILDQ RFLOAT Note: Parameter Supply voltage Offset referred Reference 25°C Reference -40°C +85°C Reference input impedance Normal operation Battery input input impedance DISP input leakage LCOM input leakage data-retention current Internal pulldown Sense resistor input input impedance PROG/SPFC logic input high PROG/SPFC logic input PROG/SPFC logic input PROG/SPFC input high current PROG/SPFC input current SEGX output low, SEGX output low, high LCOM output high, LCOM output high, high SEGX sink current Open-drain sink current Open-drain output input high input Float state external impedance voltages relative VSS. Minimum -0.2 -0.3 float 11.0 Typical 4.25 Maximum ±150 float Unit discharge; charge -200mV SPFC, PROG1-4 SPFC, PROG1-4 SPFC, PROG1-4 VPFC VCC/2 VPFC VCC/2 IOLS 1.75mA SEG1-SEG5 6.5V, IOLS 11.0mA SEG1-SEG5 IOHLCOM -5.25mA 6.5V, IOHLCOM -33.0mA VOHLCOM 0.6V VOLSH 0.4V, 6.5V 0.3V, 5mA, SPFC, PROG1-4 VDISP DISP VRBI Notes excursion from 2.0V 3.0V initializes unit. DISP IREF IREF VREF 3.0V, 4.25V, 6.5V, IOHLCOM LCOM source current bq2011K Serial Communication Timing Specification TOPR) Symbol tCYCH tCYCB tSTRH tSTRB tDSU tSSU Note: Parameter Cycle time, host bq2011K Cycle time, bq2011K host Start hold, host bq2011K Start hold, bq2011K host Data setup Data hold Data valid Stop setup Stop hold Stop valid Break Break recovery Minimum 1.50 2.95 Typical Maximum 2.25 Unit Notes note open-drain should pulled least host system proper operation. left floating serial interface used. Serial Communication Timing Illustration (R/W "1") (R/W "0") tSTRH tSTRB tDSU tSSU (BREAK) tCYCH, tCYCB, TD201002.eps bq2011K 16-Pin SOIC Narrow (SN) 16-Pin (SOIC Narrow) Dimension Minimum 0.060 0.004 0.013 0.007 0.385 0.150 0.045 0.225 0.015 dimensions inches. Maximum 0.070 0.010 0.020 0.010 0.400 0.160 0.055 0.245 0.035 .004 bq2011K Data Sheet Revision History Change Page Description Nature Change Removed relative display mode from Table Correction Notes: Change Oct. 1997 changes from Oct. 1995. Ordering Information bq2011K Temperature Range: blank Commercial +70°C) Industrial (-40 +85°C)* Package Option: 16-pin narrow SOIC Device: bq2011K Gauge Contact factory availability. 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