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64MB SO-RIMMModule with 128/144 RDRAMs
Direct Rambus SO-RIMMMemory Module Specification
This document outlines specifications HCD's Direct Rambus SO-RIMM Module which consists 128Mb 144Mb Direct Rambus DRAM devices. supports applications with 600, speed grades both non-ECC modules.
Table Model Number Frequency
Model Numbers HS064N04E HS064N04D HS064N04C HS064N04B HS064E04E HS064E04D HS064E04C HS064E04B Description 64MB 16bit 600MHz non-ECC 64MB 16bit 700MHz non-ECC 64MB 16bit 700MHz non-ECC 64MB 16bit 800MHz non-ECC 64MB 18bit 600MHz 64MB 18bit 700MHz 64MB 18bit 700MHz 64MB 18bit 800MHz Components 128Mb 4pcs 128Mb 4pcs 128Mb 4pcs 128Mb 4pcs 144Mb 4pcs 144Mb 4pcs 144Mb 4pcs 144Mb 4pcs
FEATURES
160-pin 0.67mm spacing. 128Mb/144Mb Direct RDRAM CSPs. Maximum module size: 67.60mm 31.25mm 1.00mm (2.667" 1.230" 0.043"). Gold contacts. Operates from volt supply Serial Presence Detect support (SPD). power power down self-refresh modes. Optimizes time delays. Superior design manufacturing techniques.
Figure Rambus SO-RIMMModule without Heat Spreader
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Rev. 1.21 2001
64MB SO-RIMMModule with 128/144 RDRAMs Table Module Number Signal Names
Signal Name LDQA8 LDQA6 LDQA4 LDQA2 LDQA0 LCGnd LCTMN LROW1 LCOL4 LCOL2 LCOL0 LDQB0 LDQB2 LDQB4 LDQB6 LSCK SOUT Vcmos Signal Name LDQA7 LDQA5 LDQA3 LDQA1 LCFM LCFMN LROW2 LROW0 LCOL3 LCOL1 LDQB1 LDQB3 LDQB5 LDQB7 LDQB8 LCMD Vcmos Signal Name Vref SVdd RSCK RDQB8 RDQB7 RDQB5 RDQB3 RDQB1 RCOL1 RCOL3 RROW0 RROW2 RCFMN RCFM RDQA1 RDQA3 RDQA5 RDQA7 B641 Signal Name Vref RCMD RDQB6 RDQB4 RDQB2 RDQB0 RCOL0 RCOL2 RCOL4 RROW1 RCTMN RCGnd RDQA0 RDQA2 RDQA4 RDQA6 RDQA8
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Rev. 1.21 2001
64MB SO-RIMMModule with 128/144 RDRAMs Table Module Connector Description
Signal Module Connector Pads A11, A13, A15, A17, A19, A21, A23, A25, A27, A29, A31, A33, A37, A48, A50, A52, A56, A58, A60, A62, A64, A66, A70, A72, A74, A76, A78, A80, B11, B13, B17, B19, B21, B23, B25, B27, B31, B33, B37, B48, B50, B52, B56, B58, B60, B62, B64, B66, B70, B72, B74, B76, B78, A18, B18, A20, B20, VCMOS Type Description
Ground reference RDRAM core interface, 72PCB connector pads.
LCFM LCFMN LCMD LCOL4 LCOL0 LC
Clock from master. Interface clock used receiving signals from Channel. Positive polarity. Clock from master. Interface clock used receiving signals from Channel. Negative polarity. Serial Command used read from write control registers. Also used power management. Column bus. 5-bit containing control address information column accesses. Clock Master. Interface clock used transmitting signals Channel. Positive polarity. Clock master. Interface clock used transmitting signals Channel. Negative polarity. Data 9-bit carrying byte read write data between Channel RDRAM. LDQA8 nonfunctional modules with RDRAM devices. Data 9-bit carrying byte read write data between Channel RDRAM. LDQB8 nonfunctional modules with RDRAM devices. bus. 3-bit containing control address information accesses. Serial clock input. Clock source used read from write RDRAM control registers. These pads connected. These connector pads reserved future use. Clock from master. Interface clock used receiving signals from Channel. Positive polarity. Clock from master. Interface clock used receiving signals from Channel. Negative polarity.
LCTMN LDQA8 LDQA0
LDQB8 LDQB0 LROW2L ROW0 LSCK
B30, B28, A30, B26, A28, B24, A26, B22,
B14, A16,
VCMOS
A36, B36, A38, B38, A40, B40, A41,
RCFM
RCFMN
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Rev. 1.21 2001
64MB SO-RIMMModule with 128/144 RDRAMs Table Module Connector Description (cont.)
Signal RCMD RCOL4 RCOL0 RCRCTMN RDQA8 RDQA0 RDQB8. RDQB0 RROW2 RROW0 RSCK SOUT SVdd VCMOS Vref B63, A63, B61, A61, B79, A79, B77, A77, B75, A75, B73, A73, A51, A53, B51, A55, B53, A57, B55, A59, A67, B65, A39. A35, B35, A44, B44, A46, A42, SVDD Module Connector Pads Type VCMOS VCMOS SVDD SVDD SVDD SVDD VCMOS VCMOS Description Serial Command Input. used read from write control registers. Also used power management. Column bus. 5-bit containing control address information column accesses. Clock master. Interface clock used transmitting signals Channel. Positive polarity. Clock master. Interface clock used transmitting signals Channel. Negative polarity. Data 9-bit carrying byte read write data between Channel RDRAM. RDQA8 nonfunctional modules with RDRAM devices. Data 9-bit carrying byte read write data between Channel RDRAM. RDQB8 nonfunctional modules with RDRAM devices. bus. 3-bit containing control address information accesses. Serial Clock input. Clock source used read from write RDRAM control registers. Serial Presence Detect Address Serial Presence Detect Address Serial Presence Detect Clock. Serial Presence Detect Data (Open Collector I/O). Serial reading from writing control registers. Attaches SIO0 first RDRAM module. Serial reading from writing control registers. Attaches SIO1 last RDRAM module. Voltage. Used signals SCL, SDA, SWE, SA0, SA2. Serial Presence Detect Write Protect (active high). When low, written well read. CMOS Voltage. Used signals CMD, SCK, SIN, SOUT. Supply voltage RDRAM core interface logic. Logic threshold reference voltage signals.
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Rev. 1.21 2001
RDRAMs Plus Near Connector
RDRAMs
RDRAM
64MB SO-RIMMModule with 128/144 RDRAMs
Figure Functional Block Diagram
LSCK LCMD Vref
RSCK RCMD
dfadd
SOUT
Note Rambus Channel signals form loop through RIMM module, with exception chain. Note Serial Presence Detection Specification information device contents.
LDQA8 LDQA7 LDQA6 LDQA5 LDQA4 LDQA3 LDQA2 LDQA1 LDQA0 LCFM LCFMN LCLCTMN LROW2 LROW1 LROW0 LCOL4 LCOL3 LCOL2 LCOL1 LCOL0 LDQB0 LDQB1 LDQB2 LDQB3 LDQB4 LDQB5 LDQB6 LDQB7 LDQB8
DQA8 DQA7 DQA6 DQA5 DQA4 DQA3 DQA2 DQA1 DQA0 CFMN CCTMN ROW2 ROW1 ROW0 COL4 COL3 COL2 COL1 COL0 DQB0 DQB1 DQB2 DQB3 DQB4 DQB5 DQB6 DQB7 DQB8
DQA8 DQA7 DQA6 DQA5 DQA4 DQA3 DQA2 DQA1 DQA0 CFMN CCTMN ROW2 ROW1 ROW0 COL4 COL3 COL2 COL1 COL0 DQB0 DQB1 DQB2 DQB3 DQB4 DQB5 DQB6 DQB7 DQB8 DQA8 DQA7 DQA6 DQA5 DQA4 DQA3 DQA2 DQA1 DQA0 CFMN CCTMN ROW2 ROW1 ROW0 COL4 COL3 COL2 COL1 COL0 DQB0 DQB1 DQB2 DQB3 DQB4 DQB5 DQB6 DQB7 DQB8
DQA8 DQA7 DQA6 DQA5 DQA4 DQA3 DQA2 DQA1 DQA0 CFMN CCTMN ROW2 ROW1 ROW0 COL4 COL3 COL2 COL1 COL0 DQB0 DQB1 DQB2 DQB3 DQB4 DQB5 DQB6 DQB7 DQB8
RDQA8 RDQA7 RDQA6 RDQA5 RDQA4 RDQA3 RDQA2 RDQA1 RDQA0 RCFM RCFMN RCRCTMN RROW2 RROW1 RROW0 RCOL4 RCOL3 RCOL2 RCOL1 RCOL0 RDQB0 RDQB1 RDQB2 RDQB3 RDQB4 RDQB5 RDQB6 RDQB7 RDQB8
Serial Presence Detect
RDRAM (128/144Mb)
RDRAM (128/144Mb)
RDRAM (128/144Mb)
RDRAM (128/144Mb)
SVDD
SIO0 SIO1 Vref
SIO0 SIO1 Vref
SIO0 SIO1 Vref
SIO0 SIO1 Vref
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Rev. 1.21 2001
Module Capacity
VCMOS
VREF
64MB SO-RIMMModule with 128/144 RDRAMs Table Absolute Maximum Ratings
Symbol Parameter Unit
I,ABS DD,ABS STORE
Voltage applied CMOS signal with respect Gnd. Voltage with respect Gnd. Storage temperature.
VDD+ VDD+
Table Recommended Electrical Conditions
Symbol CMOS IL,CMOS IH,CMOS OL,CMOS OH,CMOS IREF ISCK,CMD ISIN,SOUT Supply voltage CMOS power supply 2.5V controllers: CMOS power supply 1.8V controllers: Reference voltage input voltage input high voltage CMOS input voltage CMOS input high voltage CMOS output voltage OH,CMOS CMOS output high voltage OH,CMOS -0.25mA current REF,MAX CMOS input leakage current VCMOS VDD) CMOS input leakage current CMOS VCMOS-0.3 RDRAMsa RDRAMsa -10.0 RDRAMsa RDRAMsa 10.0 Parameter 2.50-0.13 0.13 -0.3 0.5VCMOS+0.25 2.5+0.13 0.25 0.5VCMOS-0.25 0.5VCMOS Unit
Table SO-RIMM Module Capacity
SO-RIMM Module Capacity:
Number 128Mb RDRAM devices: 128/144 96/108 64/72 32/36 16/18
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Rev. 1.21 2001
64MB SO-RIMMModule with 128/144 RDRAMs Table Electrical Specifications
Symbol Parameter Conditions Module Impedance (RSL). Module Impedance (CMOS). Propagation delay, signalsa. Propagation delay variation signals with respect TPDc,d device modules. Propagation delay variation signals with respect TPDc,d device modules. Propagation Delay variation signals with respect average clock delay Attenuation Limit. Forward crosstalk coefficient (300ps input rise time @20-80%). Backward crosstalk coefficient (300ps input rise time @2080%). 25.2 23.8 -100 30.8 32.2 Table Table Table Table Units
TPD-CMOS V/VIN VXF/VIN VXB/VIN
Average clock delay from finger finger clock nets (CTM, CTMN, CFM, CFMN). Table lists parameters specifications different storage capacity SO-RIMM Modules that 128Mb 144Mb RDRAM devices. Average clock delay defined average delay from finger finger clock nets (CTM, CTMN, CFM, CFMN). SO-RIMM module meets following specification, then compliant specification.
Table Electrical Specifications SO-RIMM Module
SO-RIMM Module Capacity Number 128/144 RDRAMs: Parameter Condition SO-RIMM modules
128/ 144MB
Symbol
Freq.
64/72
Units
-800 Propagation Delay, signals. -711 -600 -800 -711 -600 -800 -711 -600 -800 -711 -600 -800 -711 -600
1.320 1.320 1.320
1.060 1.060 1.060
V/VIN VXF/VIN VXB/VIN
Attenuation Limit. Forward crosstalk coefficient (300ps input rise time @20-80%). Backward crosstalk coefficient (300ps input rise time @20-80%). Resistance.
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Rev. 1.21 2001
64MB SO-RIMMModule with 128/144 RDRAMs Figure Physical Dimension
Dimension
Description length height Center-center width from A40, A80, Spacing from left edge center connector left notch Spacing from bottom edge center side edge retainer notch thickness Heat spreader thickness from surface (one side) heat spreader surface
67.45 2.656 31.10 1.224
0.90 0.035
67.60 2.661 31.25 1.230 25.35 0.998 30.00 1.181 20.00 0.787 1.00 0.039 3.50 0.138
67.75 2.667 31.40 1.236
1.10 0.043
Unit
1267 Borregas Avenue Sunnyvale, 94089 Phone: 408-743-9700 Fax: 408-743-9701 www.hcdcorp.com
2001, High Connection Density, Inc.
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Rev. 1.21 2001

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