DESCRIPTIO Ultrahigh Efficiency: Over Possible Drives N-Channel M
|
|
|
Top Searches for this datasheet
LTC1266 LTC1266-3.3/LTC1266-5 Synchronous Regulator Controller P-Channel MOSFETs
DESCRIPTIO
Ultrahigh Efficiency: Over Possible Drives N-Channel MOSFET High Current P-Channel MOSFET Dropout Selectable Burst Mode Operation Output Accuracy (LTC1266A) Selectable Phase Topside Driver Boost Step-Down Operation Wide Range: 3.5V On-Chip Low-Battery Detector High Efficiency Maintained Over Large Current Range 170µA Standby Current Light Loads Current Mode Operation Excellent Line Load Transient Response Logic Controlled Micropower Shutdown: 40µA Short-Circuit Protection Synchronous Switching with Nonoverlaping Gate Drives Available 16-Pin Narrow Package
LTC1266 series family synchronous switching regulator controllers featuring automatic Burst Modeoperation maintain high efficiencies output currents. These devices drive external power MOSFETs switching frequencies 400kHz using constant offtime current mode architecture providing constant ripple current inductor. They drive either N-channel P-channel topside MOSFET. operating current level user-programmable external current sense resistor. Wide input supply range allows operation from 3.5V (20V maximum). Constant off-time architecture provides dropout regulation limited only RDS(ON) topside MOSFET (when using P-channel) resistance inductor current sense resistor. LTC1266 series combines synchronous switching maximum efficiency high currents with automatic current operating mode, called Burst Mode operation, which reduces switching losses. Standby power reduced only IOUT Load currents Burst Mode operation typically 500mA.
registered trademarks Linear Technology Corporation. Burst Mode trademark Linear Technology Corporation.
APPLICATIO
Notebook Palmtop Computers Portable Instruments Cellular Telephones Power Distribution Systems Systems
TYPICAL APPLICATIO
MBR0530T1
100µF
LBIN PINV LBOUT TDRIVE SENSE
0.1µF N-CHANNEL Si9410
100k
LTC1266-3.3 NORMAL >1.5V SHUTDOWN 3300pF SHDN BINH SGND 1000pF N-CHANNEL Si9410
VOUT 3.3V
EFFICIENCY
RSENSE 0.02
SENSE BDRIVE PGND
180pF
MBRS130LT3
1266 TA01
COUT 330µF
*TOKO 919AS-4R7M
Figure High Efficiency Step-Down Converter
LTC1266-3.3 Efficiency
0.01 LOAD CURRENT
1266 TA02
LTC1266 LTC1266-3.3/LTC1266-5
ABSOLUTE
(Note
RATI
PACKAGE/ORDER ATIO
VIEW TDRIVE PINV BINH SENSE BDRIVE PGND LBOUT LBIN SGND SHDN (NC*) SENSE
Input Supply Voltage (Pins 0.3V Continuous Output Current (Pins 50mA Sense Voltages (Pins 0.3V SHDN Voltage (Pin 0.3V PINV, BINH, LBIN (Pins 13).20V 0.3V LBOUT Output Current 12mA Operating Ambient Temperature Range 70°C Industrial Temperature Range 40°C 85°C Extended Commercial Temperature Range 40°C 85°C Junction Temperature (Note 125°C Storage Temperature Range 65°C 150°C Lead Temperature (Soldering, sec). 300°C
ORDER PART NUMBER LTC1266CS LTC1266CS-3.3 LTC1266CS-5 LTC1266ACS LTC1266IS LTC1266IS-3.3 LTC1266IS-5 LTC1266AIS
PACKAGE 16-LEAD PLASTIC *FIXED OUTPUT VERSIONS TJMAX 125°C, 110°C/
Consult factory Industrial Military grade parts.
denotes specifications which apply over full operating temperature range, otherwise specifications 25°C. 10V, VSHDN VBINH unless otherwise noted.
SYMBOL PARAMETER Feedback Voltage LTC1266ACS LTC1266CS VOUT Feedback Current (LTC1266 Only) Regulated Output Voltage LTC1266CS-3.3 LTC1266CS-5 VOUT Output Ripple (Burst Mode Operation) ILOAD 150mA Output Voltage Line Regulation ILOAD 50mA VPINV Topside Switch P-Ch, VPINV VPWR, Topside Switch N-Ch, Output Voltage Load Regulation LTC1266-3.3 LTC1266-3.3 LTC1266-5 LTC1266-5 Supply Current (Note Normal Mode Sleep Mode Shutdown Supply Current (Note Normal Mode Sleep Mode Shutdown ILOAD RSENSE 0.05 Burst Mode Operation Enabled, VBINH Burst Mode Operation Inhibited, VBINH Burst Mode Operation Enabled, VBINH Burst Mode Operation Inhibited, VBINH 3.5V 3.5V VSHDN 2.1V, 3.5V 3.5V 3.5V VSHDN 2.1V, 3.5V
ELECTRICAL CHARACTERISTICS
CONDITIONS ILOAD 700mA, VPINV VPWR 14V, Topside Switch N-Ch
UNITS
1.252 1.210
1.265 1.265
1.278 1.290
ILOAD 700mA, VPINV VPWR 14V, Topside Switch N-Ch
3.23 4.90
3.33 5.05
3.43 5.20
mVP-P
LTC1266 LTC1266-3.3/LTC1266-5
denotes specifications which apply over full operating temperature range, otherwise specifications 25°C. 10V, VSHDN VBINH unless otherwise noted.
SYMBOL VSENSE PARAMETER Current Sense Threshold (Burst Mode Operation Enabled) LTC1266 LTC1266-3.3 LTC1266-5 VSENSE Current Sense Threshold (Burst Mode Operation Disabled) LTC1266 LTC1266-3.3 LTC1266-5 VSHDN ISHDN IPINV VBINH IBINH tOFF tMAX VCLAMP Shutdown Threshold Shutdown Input Current Phase Invert Input Current Burst Mode Operation Inhibit Threshold Burst Mode Operation Inhibit Input Current Discharge Current Off-Time (Note On-Time Driver Output Transition Times (Note Output Voltage Clamp Burst Mode Operation Inhibit LTC1266 LTC1266-3.3 LTC1266-5 Low-Battery Trip Point Leakage Current Into Sink Current Into Leakage Current Into VSHDN VPINV 18V, VBINH 18V, VSENSE VOUT 100mV, VSENSE VOUT 300mV VOUT 390pF, ILOAD 700mA VOUT 3000pF (Pins 16), VBINH 2.1V Measured Measured VSENSE Measured VSENSE VLBOUT 18V, VLBIN VLBOUT VLBIN 2.5V VLBIN 1.30 3.43 5.20 1.14 1.17 1.25 1.30 1.35 1.42 CONDITIONS VBINH VSENSE 3.3V, VOUT/2.64 25mV (Forced) VSENSE 3.3V, VOUT/2.64 25mV (Forced) VSENSE VOUT 100mV (Forced) VSENSE VOUT 100mV (Forced) VSENSE VOUT 100mV (Forced) VSENSE VOUT 100mV (Forced) VBINH 2.1V VSENSE 3.3V, VOUT/2.64 25mV (Forced) VSENSE 3.3V, VOUT/2.64 25mV (Forced) VSENSE VOUT 100mV (Forced) VSENSE VOUT 100mV (Forced) VSENSE VOUT 100mV (Forced) VSENSE VOUT 100mV (Forced)
ELECTRICAL CHARACTERISTICS
UNITS
VLBTRIP ILBLEAK ILBSINK ILBIN
40°C 85°C (Note 10V, unless otherwise noted.
SYMBOL PARAMETER Feedback Voltage LTC1266AIS LTC1266CS, LTC1266IS VOUT Regulated Output Voltage LTC1266CS-3.3, LTC1266IS-3.3 LTC1266CS-5, LTC1266IS-5 ILOAD 700mA, VPINV VPWR Topside Switch N-Ch 3.23 4.90 3.33 5.05 3.43 5.20 CONDITIONS ILOAD 700mA, VPINV VPWR 14V, Topside Switch N-Ch 1.246 1.210 1.265 1.265 1.290 1.290 UNITS
LTC1266 LTC1266-3.3/LTC1266-5
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER Supply Current (Note Normal Mode Sleep Mode Shutdown Supply Current (Note Normal Mode Sleep Mode Shutdown Current Sense Threshold (Burst Mode Operation Enabled) LTC1266CS, LTC1266IS LTC1266CS LTC1266IS LTC1266-3.3, LTC1266-5 LTC1266CS-3.3, LTC1266CS-5 LTC1266IS-3.3, LTC1266IS-5 Current Sense Threshold (Burst Mode Operation Disabled) LTC1266CS, LTC1266IS LTC1266CS LTC1266IS LTC1266-3.3, LTC1266-5 LTC1266CS-3.3, LTC1266CS-5 LTC1266IS-3.3, LTC1266IS-5 Shutdown Threshold Off-Time (Note CONDITIONS
40°C 85°C (Note 10V, unless otherwise noted.
UNITS
3.5V 3.5V VSHUTDOWN 2.1V, 3.5V 3.5V 3.5V VSHUTDOWN 2.1V, 3.5V VBINH VSENSE- 3.3V, VOUT/2.64 25mV (Forced) VSENSE- 3.3V, VOUT/2.64 25mV (Forced) VSENSE- 3.3V, VOUT/2.64 25mV (Forced) VSENSE- VOUT 100mV (Forced) VSENSE- VOUT 100mV (Forced) VSENSE- VOUT 100mV (Forced) VBINH 2.1V VSENSE- 3.3V, VOUT/2.64 25mV (Forced) VSENSE- 3.3V, VOUT/2.64 25mV (Forced) VSENSE- 3.3V, VOUT/2.64 25mV (Forced) VSENSE- VOUT 100mV (Forced) VSENSE- VOUT 100mV (Forced) VSENSE- VOUT 100mV (Forced) Grade Grade 390pF, ILOAD 700mA, Grade 390pF, ILOAD 700mA, Grade 0.55 0.50
VSENSE1
VSENSE2
VSHDN tOFF
Note Absolute Maximum Ratings those values beyond which life device impaired. Note calculated from ambient temperature power dissipation according following formula: 110°C/W) Note Dynamic supply current higher gate charge being delivered switching frequency. Applications Information. Note applications where RSENSE placed ground potential, offtime increases approximately 40%.
Note LTC1266CS, LTC1266CS-3.3, LTC1266-5 LTC1266ACS tested quality assurance sampled 40°C 85°C. These specifications guaranteed design and/or correlation. LTC1266IS, LTC1266IS-3.3, LTC1266IS-5 LTC1266AIS guaranteed tested over 40°C 85°C operating temperature range. Note Unless otherwise noted specifications LTC1266A same those LTC1266. Note measured levels.
LTC1266 LTC1266-3.3/LTC1266-5 TYPICAL PERFOR CHARACTERISTICS
Efficiency Input Voltage
ILOAD 2.5A EFFICIENCY ILOAD
FIGURE CIRCUIT
VOUT (mV)
VOUT (mV)
ILOAD 100mA
INPUT VOLTAGE
Efficiency Input Voltage
EFFICIENCY
FIGURE CIRCUIT ILOAD ILOAD 2.5A
VOUT (mV)
VOUT (mV)
ILOAD 100mA
INPUT VOLTAGE
Supply Current
SUPPLY CURRENT (mA)
SUPPLY CURRENT (µA)
ACTIVE MODE
SUPPLY CURRENT (µA)
SLEEP MODE SLEEP MODE INPUT VOLTAGE
1266
1266
Line Regulation
Load Regulation
FIGURE CIRCUIT (Burst Mode OPERATION ENABLED) (Burst Mode OPERATION INHIBITED)
FIGURE CIRCUIT ILOAD
INPUT VOLTAGE
1266
LOAD CURRENT
1266
Line Regulation
Load Regulation
FIGURE CIRCUIT
FIGURE CIRCUIT ILOAD
(Burst Mode OPERATION INHIBITED) (Burst Mode OPERATION ENABLED)
1266
1266
INPUT VOLTAGE
LOAD CURRENT
1266
Power Supply Current
Supply Current Shutdown
ACTIVE MODE
1266
INPUT VOLTAGE
INPUT VOLTAGE
1266
LTC1266 LTC1266-3.3/LTC1266-5 TYPICAL PERFOR CHARACTERISTICS
Off-Time Output Voltage
VSENSE- VOUT
NORMALIZED FREQUENCY
OFF-TIME (µs)
25°C
70°C
SENSE VOLTAGE (mV)
LTC1266-3.3
LTC1266-5
OUTPUT VOLTAGE
CTIO
TDRIVE (Pin High Current Drive Topside MOSFET. This MOSFET either P-channel N-channel, user selectable Voltage swing this from ground. (Pin Power Suppy Drive Signals. Must closely decoupled power ground (Pin 15). PINV (Pin Phase Invert. Sets phase topside driver drive either P-channel N-channel MOSFET follows: P-channel: N-channel: BINH (Pin Burst Mode Operation Inhibit. CMOS logic high this will disable Burst Mode operation feature forcing continuous operation down zero load. (Pin Main Supply Pin. (Pin External Capacitor. from ground sets operating frequency. actual frequency also dependent input voltage. (Pin Gain Amplifier Decoupling Point. current comparator threshold increases with voltage. SENSE (Pin Connects internal resistive divider which sets output voltage LTC1266-3.3 LTC1266-5 versions. also input current comparator. SENSE (Pin Input Current Comparator. built-in offset between Pins conjunction with RSENSE sets current trip threshold. (Pin 10): LTC1266 adjustable version, serves feedback from external resistive divider used output voltage. LTC1266-3.3 LTC1266-5 versions this used. SHDN (Pin 11): When grounded, LTC1266 series operates normally. Pulling high holds both MOSFETs puts LTC1266 micropower shutdown mode. Requires CMOS logic signal with 1µs. Should left floating. SGND (Pin 12): Small-Signal Ground. Must routed separately from other grounds terminal COUT. LBIN (Pin 13): Input Low-Battery Comparator. This input compared internal 1.25V reference. LBOUT (Pin 14): Open Drain Output Low-Battery Comparator. This will sink current when below 1.25V. PGND (Pin 15): Driver Power Ground. Connects source N-channel MOSFET terminal CIN. BDRIVE (Pin 16): High Current Drive Bottom N-Channel MOSFET. Voltage swing from ground VIN.
1266
Operating Frequency (VIN VOUT) Voltage
VOUT 3.3V
Current Sense Threshold Voltage
THRESHOLD
THRESHOLD (Burst Mode OPERATION ENABLED) THRESHOLD (Burst Mode OPERATION INHIBIT)
(VIN VOUT) VOLTAGE
TEMPERATURE (°C)
1266
1266
LTC1266 LTC1266-3.3/LTC1266-5
CTIO DIAGRA
VTH1 VTH2
LBIN 1.25V REFERENCE
SIGNAL GROUND
PGND SLEEP
VTRIP
ON-TIME CONTROL ENABLE PINV
OFF-TIME CONTROL
SENSE
SHDN
OPERATIO
LTC1266 series uses current mode, constant offtime architecture synchronously switch external pair power MOSFETs. Operating frequency external capacitor timing capacitor output voltage sensed internal voltage divider connected SENSE (LTC1266-3.3 LTC12665) external divider returned VFB, (LTC1266). voltage comparator gain block compare divided output voltage with reference voltage 1.265V. optimize efficiency, LTC1266 automatically switches between modes operation, burst continuous. voltage comparator primary control element when device Burst Mode operation, while gain block controls output voltage continuous mode.
During switch cycle continuous mode, current comparator monitors voltage between Pins connected across external shunt series with inductor. When voltage across shunt reaches threshold value, topside driver output switched turn topside MOFSET (Power P-channel ground N-channel). timing capacitor connected allowed discharge rate determined off-time controller. discharge current made proportional output voltage (measured model inductor current, which decays rate which also proportional output voltage. While timing capacitor discharging, bottom-side drive output switched power turn bottom-side N-channel MOSFET.
Connection Shown LTC1266-3.3 LTC1266-5; Changes Create LTC1266
LBOUT
PINV
TDRIVE SENSE+ ADJUSTABLE VERSION BDRIVE BINH SENSE
100k 1.265V
REFERENCE
1266
LTC1266 LTC1266-3.3/LTC1266-5
OPERATIO
When voltage timing capacitor discharged past VTH1, comparator trips, setting flip-flop. This causes bottom-side output switch topside output switch (ground P-channel Power N-channel). cycle then repeats. load current increases, output voltage decreases slightly. This causes output gain stage (Pin increase current comparator threshold, thus tracking load current. sequence events Burst Mode operation very similar continuous operation with cycle interrupted voltage comparator. When output voltage above desired regulated value, topside MOSFET held comparator timing capacitor continues discharge below VTH1. When timing capacitor discharges past VTH2, voltage comparator trips, causing internal sleep line bottom-side MOSFET turn off. circuit enters sleep mode with both power MOSFETs turned off. sleep mode, majority circuitry turned off, dropping quiescent current from 2.1mA 170µA. load current being supplied from output capacitor. When output voltage dropped amount hysteresis comparator topside MOSFET again turned this process repeats. avoid operation current loop interfering with Burst Mode operation, built-in offset incorporated gain stage. This prevents current comparator threshold from increasing until output voltage dropped below minimum threshold.
APPLICATIO ATIO
three basic LTC1266 application circuits shown Figure This circuit uses N-channel topside driver single supply. other circuit configurations (see Typical Applications) N-channel topside driver dual supply, P-channel topside driver. Selections other external components driven load requirement same three circuit configurations. first
prevent both external MOSFETs from ever being turned same time, feedback incorporated sense state driver output pins. Before bottom-side drive output turn topside output must off. Likewise, topside output prevented from turning while bottom-side drive output still LTC1266 select pins which provide user with choice topside switch with option inhibiting Burst Mode operation. phase select allows user choose whether topside MOSFET P-channel N-channel. phase select does things: sets proper phase drive signal Power N-channel P-channel) also sets upper limit on-time (60µs) when N-channel. on-time limit ensures proper start-up when used single supply bootstrap circuit configuration (see Applications Information). P-channel mode there on-time limit thus, dropout, P-channel MOSFET turned continuously (100% duty cycle). Burst Mode operation inhibit (BINH, allows Burst Mode operation disabled applying CMOS logic high this pin. With Burst Mode operation disabled, LTC1266 will remain continuous mode down zero load. Burst Mode operation disabled allowing lower current threshold limit below zero that voltage comparator will never trip. voltage comparator trip point also raised that will tripped transients. still active provide voltage clamp prevent output from overshooting. step selection RSENSE. Once RSENSE known, chosen. Next, power MOSFETs selected. Finally, COUT selected loop compensated. Using N-channel topside switch, input voltages limited maximum about 15V. With P-channel, input voltage high 20V.
LTC1266 LTC1266-3.3/LTC1266-5
APPLICATIO ATIO
RSENSE Selection Output Current RSENSE chosen based required output current. LTC1266 series current comparator threshold range which extends from minimum 25mV/RSENSE (when Burst Mode operation enabled) maximum 155mV/RSENSE. current comparator threshold sets peak inductor ripple current, yielding maximum output current IMAX equal peak value less half peak-to-peak ripple current. proper Burst Mode operation, IRIPPLE(P-P) must less than equal minimum current comparator threshold. Since efficiency generally increases with ripple current, maximum allowable ripple current assumed, i.e., IRIPPLE(P-P) 25mV/RSENSE (see Selection Operating Frequency). Solving RSENSE allowing margin variations LTC1266 series external component values yields: RSENSE 100mV IMAX graph selecting RSENSE maximum output current given Figure
RSENSE
1266
CAPACITANCE (pF)
MAXIMUM OUTPUT CURRENT
Figure Selecting RSENSE
load current, below which Burst Mode operation commences, (IBURST), peak short-circuit current, (ISC(PK)), both track IMAX. Once RSENSE been chosen, IBURST ISC(PK) predicted from following:
IBURST 15mV RSENSE ISC(PK) 155mV RSENSE
LTC1266 series automatically extends tOFF during short circuit allow sufficient time inductor current decay between switch cycles. resulting ripple current causes average short-circuit current ISC(AVG) reduced approximately IMAX. Selection Operating Frequency LTC1266 series uses constant off-time architecture with tOFF determined external timing capacitor Each time topside MOSFET switch turns voltage reset approximately 3.3V. During off-time, discharged current which proportional VOUT. voltage analogous current inductor which likewise decays rate proportional VOUT. Thus inductor value must track timing capacitor value. value calculated from desired continuous mode operating frequency, assumes 2VOUT, (Figure circuit). graph selecting frequency including effects input voltage given Figure
VOUT 3.3V FREQUENCY (kHz)
1266
Figure Timing Capacitor Value
LTC1266 LTC1266-3.3/LTC1266-5
APPLICATIO ATIO
operating frequency increased gate charge losses will higher, reducing efficiency (see Efficiency Considerations). complete expression operating frequency circuit Figure given
tOFF
VOUT
where:
tOFF
VREG VOUT
VREG desired output voltage (i.e., 3.3V). VOUT measured output voltage. Thus VREG/VOUT regulation. Once frequency been inductor must chosen provide more than 25mV/RSENSE peak-to-peak inductor ripple current. This results minimum required inductor value LMIN RSENSE VREG inductor value increased from minimum value, requirements output capacitor eased expense efficiency. small inductor used, inductor current will decrease past zero change polarity. consequence this that LTC1266 series enter Burst Mode operation efficiency will slightly degraded currents. Inductor Core Selection Once minimum value known, type inductor must selected. highest efficiency will obtained using ferrite, Kool molypermalloy (MPP) cores. Lower cost powdered iron cores provide suitable performance efficiency Actual core loss independent core size fixed inductor value, very dependent inductance selected. inductance increases, core losses down. Unfortunately, increased inductance requires more turns wire therefore copper losses increase. Ferrite designs have very core loss, design goals concentrate copper loss preventing saturation. Ferrite core material saturates "hard," which means that inductance collapses abruptly when peak design
Kool registered trademark Magnetics, Inc.
current exceeded. This results abrupt increase inductor ripple current consequent output voltage ripple which cause Burst Mode operation falsely triggered. allow core saturate! Kool very good, loss core material toroids, with "soft" saturation characteristic. Molypermalloy slightly more efficient high 200kHz) switching frequency. Toroids very space efficient, especially when several layers wire. Because they generally lack bobbin, mounting more difficult. However, designs surface mount available from Coiltronics Beckman Industrial Corp. which increase height significantly. Power MOSFET Selection external power MOSFETs must selected with LTC1266 series: either P-channel MOSFET N-channel MOSFET main switch N-channel MOSFET synchronous switch. main selection criteria power MOSFETs type MOSFET, threshold voltage VGS(TH) on-resistance RDS(ON). cost maximum output current determine type MOSFET topside switch. N-channel MOSFETs have advantage lower cost lower RDS(ON) expense slightly increased circuit complexity. lower current applications where losses RDS(ON) small, P-channel MOSFET recommended lower circuit complexity. However, load currents excess where RDS(ON) becomes significant portion total power loss, N-channel strongly recommended maximize efficiency. maximum output current IMAX determines RDS(ON) requirement MOSFETs. When LTC1266 series operating continuous mode, simplifying assumption made that MOSFETs always conducting average load current. duty cycles MOSFETs given
Topside Duty Cycle
VOUT VOUT
Bottom-Side Duty Cycle
LTC1266 LTC1266-3.3/LTC1266-5
APPLICATIO ATIO
VOUT IMAX2 (VIN VOUT) IMAX2
From duty cycles, required RDS(ON) each MOSFET derived:
RDS(ON) RDS(ON)
where allowable power dissipations temperature dependencies RDS(ON). will determined efficiency and/or thermal requirements (see Efficiency Considerations). MOSFET, generally given form normalized RDS(ON) temperature curve, 0.007/°C 0.005/°C used approximation voltage MOSFETs. minimum input voltage determines whether standard threshold logic-level threshold MOSFETs must used. standard threshold MOSFETs (VGS(TH) used. expected drop below logiclevel threshold MOSFETs (VGS(TH) 2.5V) strongly recommended. LTC1266 series Power must always less than absolute maximum ratings MOSFETs. Schottky diode shown Figure only conducts during deadtime between conduction power MOSFETs. D1's sole purpose life prevent body diode bottom-side MOSFET from turning storing charge during deadtime, which could cost much efficiency (although there other harmful effects omitted). Therefore, should selected forward voltage less than 0.7V when conducting IMAX. COUT Selection continuous mode, current through topside MOSFET square wave duty cycle VOUT/VIN. prevent large voltage transients, (Effective Series Resistance) input capacitor sized maximum current must used. maximum capacitor current given
Required IRMS IMAX [VOUT(VIN VOUT)]1/2
This formula maximum 2VOUT, where IRMS IOUT/2. This simple worst-case condition commonly used design because even significant deviations offer much relief. Note that capacitor manufacturer's ripple current ratings often based only 2000 hours life. This makes advisable further derate capacitor, choose capacitor rated higher temperature than required. Always consult manufacturer there question. additional 0.1µF ceramic capacitor also required Power (Pin high frequency decoupling. selection COUT driven required ESR. COUT must less than twice value RSENSE proper operation LTC1266 series: COUT Required 2RSENSE Optimum efficiency obtained making equal RSENSE. increased 2RSENSE, efficiency degrades less than greater than 2RSENSE, voltage ripple output capacitor will prematurely trigger Burst Mode operation, resulting disruption continuous mode efficiency which several percent. Burst Mode operation disabled, requirement relaxed limited only allowable output voltage ripple. Manufacturers such Nichicon United Chemicon should considered high performance capacitors. OS-CON semiconductor dielectric capacitor available from Sanyo lowest ESR/size ratio aluminum electrolytic somewhat higher price. Once requirement COUT been met, current rating generally exceeds IRIPPLE(P-P) requirement. surface mount applications multiple capacitors have paralleled meet capacitance, current handling requirements application. excellent choice series surface mount tantalums. supply voltages, minimum capacitance COUT needed prevent abnormal frequency operating mode (see Figure When COUT made small, output ripple frequencies will large enough trip voltage comparator. This causes Burst Mode operation activated when LTC1266
LTC1266 LTC1266-3.3/LTC1266-5
APPLICATIO ATIO
1000 50µH RSENSE 0.02 25µH RSENSE 0.02
COUT (µF)
50µH RSENSE 0.05 (VIN VOUT) VOLTAGE
1266
Figure Minimum Value COUT
series would normally continuous operation. output remains regulation times. This minimum capacitance requirement relaxed Burst Mode operation disabled. N-Channel P-Channel MOSFETs LTC1266 capability drive either N-channel P-channel topside switch give user more flexibility. N-channel MOSFETs superior performance P-channel their lower RDS(ON) lower gate capacitance typically less expensive; however, they have slightly more complicated gate drive requirement more limited input voltage range (see following sections). Driving P-Channel Topside MOSFETs P-channel topside switch circuit configuration most straightforward requirement only supply voltage level. This negative gate threshold P-channel MOSFET which allows MOSFET switched swinging gate between ground. phase invert (Pin tied ground choose this operating mode. Normally, converter input (VIN) connected LTC1266 supply Pins high 20V. supplies high frequency current pulses switch MOSFETs should decoupled with 0.1µF ceramic capacitor. supplies most quiescent power rest chip.
Driving N-Channel Topside MOSFETs Driving N-channel topside MOSFET (PINV, tied VIN) little trickier than driving P-channel since gate voltage must positive with respect source turn which means that gate voltage must higher than VIN. This requires either second supply least VGS(ON) above bootstrapping circuit boost proper level. easiest method using higher supply (see Figure available, bootstrap method used expense additional diode (see Figure bootstrap works charging bootstrap capacitor during off-time. During on-time, bottom plate capacitor pulled that voltage twice (plus ringing switch node). Since maximum allowable voltage 20V, Figure bootstrap circuit limits less than 10V. higher achieved bootstrap capacitor charged voltage less than VIN, which case VIN(MAX) VCAP. N-channel mode, internal circuitry limits maximum on-time 60µs guarantee start-up bootstrap circuit. This maximum on-time reduces maximum duty cycle
Duty Cycle 60µs 60µs tOFF
which slightly increases minimum input voltage which dropout occurs. However, because superior on-conductance N-channel, dropout performance N-channel regulator still better (see Figure even with duty cycle limitation, except light loads. Low-Battery Comparator LTC1266 on-chip low-battery comparator which used sense low-battery condition when implemented shown Figure resistor divider sets comparator trip point follows:
VTRIP 1.25
LTC1266 LTC1266-3.3/LTC1266-5
APPLICATIO ATIO
TOPSIDE N-CHANNEL WITH POWER TOPSIDE P-CHANNEL VOUT 3.3V
VIN-V0UT (mV) DROPOUT
TOPSIDE N-CHANNEL WITH CHARGE PUMP
EFFICIENCY
LOAD CURRENT
1266
Figure Comparison Dropout Performance
LTC1266
LBOUT
1.25V REFERENCE
1266
Figure Low-Battery Comparator
divided down voltage input comparator compared internal 1.25V reference. This reference separate from 1.265V reference used voltage comparator current comparator regulation disabled shutdown pin, therefore low-battery detection operational even when rest chip shut down. comparator functional down input voltage 2.5V. Thus, output will provide valid state even when rest chip does have sufficient voltage operate. best performance, value pull-up resistor should high enough that output pulled down ground when sinking 200µA less. Suppressing Burst Mode Operation Normally, enabling Burst Mode operation desired superior efficiency load currents (see Figure However, certain applications desirable inhibit this feature. Some reasons doing are: eliminate audible noise from certain types inductors light loads.
Burst Mode OPERATION ENABLED Burst Mode OPERATION INHIBITED 0.01 LOAD CURRENT
1266
Figure Effect Disabling Burst Mode Operation Efficiency
load never expected drop enough benefit from efficiency advantages Burst Mode operation, output capacitor minimum capacitance requirements (which falsely trigger Burst Mode operation met) relaxed Burst Mode operation disabled. auxiliary winding used. Disabling Burst Mode operation guarantees switching independent load primary. This allows power taken from auxiliary winding independently. Tighter load regulation 1%). Burst Mode operation disabled applying CMOS logic high voltage 2.1V) When disabled, voltage comparator limit raised high enough that longer involved regulation; however still active useful voltage clamp keep output from overshooting. Note that since inductor current must reverse regulate output zero load when Burst Mode operation disabled, minimum inductance (LMIN) specified during Inductor Core Selection longer applicable. Checking Transient Response regulator loop response checked looking load transient response. Switching regulators take several cycles respond step (resistive) load current. When load step occurs, VOUT shifts amount equal ILOAD (ESR), where effective series resistance COUT. ILOAD also begins charge
LTC1266 LTC1266-3.3/LTC1266-5
APPLICATIO ATIO
discharge COUT until regulator loop adapts current change returns VOUT steady-state value. During this recovery time VOUT monitored overshoot ringing which would indicate stability problem. external components shown Figure circuit will prove adequate compensation most applications. Efficiency Considerations percent efficiency switching regulator equal output power divided input power times 100%. often useful analyze individual losses determine what limiting efficiency which change would produce most improvement. Percent efficiency expressed Efficiency 100% where etc., individual losses percentage input power. (For high efficiency circuits, only small errors incurred expressing losses percentage output power). Although dissipative elements circuit produce losses, three main sources usually account most losses LTC1266 series circuits: LTC1266 bias current, MOSFET gate charge current losses. supply current current which flows into (Pin LTC1266 supply current 170µA load, increases proportionally with load constant 2.1mA after LTC1266 series entered continuous mode. Because bias current drawn from VIN, resulting loss increases with input voltage. bias losses generally less than load currents over 30mA. However, very load currents bias current accounts nearly loss. MOSFET gate charge current results from switching gate capacitance power MOSFETs. Each time MOSFET gate switched from high again, packet charge moves from Power ground. resulting dQ/dt current flowing into Power (Pin which typically much larger than supply current. continuous mode, IGATECHG QP). typical gate charge 0.05 N-channel power MOSFET
EFFICIENCY/LOSS
15nC. This results IGATECHG 200kHz continuous operation typical mid-current loss with Note that gate charge loss increases directly with both input voltage operating frequency. This principal reason highest efficiency circuits operate moderate frequencies. Furthermore, argues against using larger MOSFETs than necessary control losses, since overkill cost efficiency well money! losses easily predicted from resistances MOSFET, inductor current shunt. continuous mode average output current flows through RSENSE, "chopped" between topside bottom-side MOSFETs. MOSFETs have approximately same RDS(ON), then resistance MOSFET simply summed with resistances RSENSE obtain losses. example, each RDS(ON) 0.05, 0.05 RSENSE 0.02, then total resistance 0.12. This results losses ranging from 3.5% output current increases from losses cause efficiency roll high output currents. Figure shows efficiency losses typical LTC1266 series regulator being apportioned. gate charge loss responsible majority efficiency lost mid-current region. Burst Mode operation employed currents, gate charge loss alone would cause efficiency drop unacceptable levels (see Figure With Burst Mode
GATE CHARGE LTC1266 0.01 0.03 IOUT
1266
Figure Efficiency Loss
LTC1266 LTC1266-3.3/LTC1266-5
APPLICATIO ATIO
operation, supply current represents lone (and unavoidable) loss component which continues become higher percentage output current reduced. expected losses dominate high load currents. Other losses including COUT dissipative losses, MOSFET switching losses, Schottky conduction losses during deadtime inductor core losses, generally account less than total additional loss. Design Example design example, assume (nominal), VOUT 3.3V, IMAX 200kHz; RSENSE, immediately calculated: RSENSE 100mV/5 0.02 tOFF (1/200kHz) (3.3/5)] 1.7µs 1.7µs/(1.3 104) 130pF LMIN 0.02 130pF 3.3V Assume that MOSFET dissipations limited 40°C thermal resistance each MOSFET 50°C/ then junction temperatures will 140°C 0.60. required RDS(ON) each MOSFET calculated:
RDS(ON) RDS(ON)
5(2) 0.076 3.3(5)2 (1.60) 5(2) 0.147 1.7(5)2 (1.60)
topside requirement N-channel Si9410DY which RDS(ON) about 0.04 bottom-side requirement exceeded Si9410DY. Note that most stringent requirement bottom-side MOSFET with VOUT (i.e., short circuit). During continuous short circuit, worst-case dissipation rises ISC(AVG)2 RDS(ON) With 0.02 sense resistor, ISC(AVG) will result, increasing 0.04 bottom-side dissipation 2.3W.
will require current rating least 2.5A temperature COUT will require 0.02 optimum efficiency. allow drop minimum value. minimum calculated from maximum duty cycle voltage drop across topside FET,
VMIN
VOUT ILOAD (RDS(ON) RSENSE) DMAX
4.0V
this lower input voltage, operating frequency decreases topside will conducting most time, causing power dissipation increase. dropout, fMIN 16kHz (MAX) tOFF
I2LOAD RDS(ON) DMAX This last step necessary assure that power dissipation junction temperature topside exceeded.
These last calculations assume that Power high enough keep topside fully turned dropout, would case with Figure 11circuit. this isn't true with Figure circuit) RDS(ON) will increase which turn increases VMIN
Adjustable Applications When output voltage other than 3.3V required, LTC1266 adjustable version used with external resistive divider from VOUT VFB, regulated voltage determined VOUT 1.265
prevent stray pickup 100pF capacitor suggested across located close LTC1266. Figure applications with VOUT below when RSENSE moved ground, current sense comparator inputs operate near ground. When current comparator operated less than common mode, off-time increases approximately 40%, requiring smaller timing capacitor
LTC1266 LTC1266-3.3/LTC1266-5
APPLICATIO ATIO
Troubleshooting Hints Since efficiency critical LTC1266 series applications, very important verify that circuit functioning correctly both continuous Burst Mode operation. waveform monitor voltage timing capacitor, continuous mode (ILOAD IBURST) voltage should sawtooth with 0.9VP-P swing. This voltage should never below shown Figure When load currents (ILOAD IBURST) Burst Mode operation should occur with waveform periodically falling ground periods time shown Figure
3.3V
Continuous Mode Operation
3.3V
Burst Mode Operation Figure Waveforms
TDRIVE PINV
BDRIVE PGND
LBOUT LTC1266 LBIN BINH SENSE SGND SHDN SENSE 1000pF
3300pF
Figure LTC1266 Layout Diagram (See Layout Checklist)
observed falling ground high output currents, indicates poor decoupling improper grounding. Refer Board Layout Checklist. Board Layout Checklist When laying printed circuit board, following checklist should used ensure proper operation LTC1266 series. These items also illustrated graphically layout diagram Figure Check following your layout: signal power grounds segregated? LTC1266 signal ground (Pin must return plate COUT. power ground returns source bottom-side MOSFET, anode Schottky diode plate CIN, which should have short lead lengths possible. Does LTC1266 SENSE (Pin connect point close RSENSE plate COUT? adjustable applications, resistive divider must connected between plate COUT signal ground.
1266
BOLD LINES INDICATE HIGH CURRENT PATHS
SHUTDOWN
OUTPUT DIVIDER REQUIRED WITH ADJUSTABLE VERSION ONLY
COUT RSENSE
VOUT
1266
LTC1266 LTC1266-3.3/LTC1266-5
APPLICATIO ATIO
SENSE- SENSE+ leads routed together with minimum trace spacing? 1000pF capacitor between Pins should close possible LTC1266. Does plate connect source topside MOSFET closely possible? This capacitor provides current topside MOSFET. 0.1µF decoupling capacitor connected between (Pin ground optional, sometimes
TYPICAL APPLICATIO
(Layout Assist Schematics)
TDRIVE PINV
BINH
LBIN BINH LTC1266-3.3 SGND SENSE SHDN SENSE
1000pF
RSENSE 0.033 VOUT 3.3V 1266
*DALE LPT4545-A001 COILTRONICS CTX10-4
Figure Dropout, 3.3V/3A High Efficiency Regulator
220pF
3300pF
helpful eliminating instabilities high input voltage high output loads. shutdown (Pin actively pulled ground during normal operation? shutdown high impedance must allowed float. select (Pins also high impedance must tied high depending application.
3.9V (VIN(MIN) 3.5V ILOAD 0.8A) Si9430DY
MBRS140T3
BDRIVE PGND LBOUT
100µF
Si9410DY
SHUTDOWN
10µH
COUT 220µF
LTC1266 LTC1266-3.3/LTC1266-5
TYPICAL APPLICATIO
4.3V (VIN (MIN) 3.5V ILOAD 100mA
BINH
200pF
3300pF
*DALE LPT4545-A002 COILTRONICS CTX20-4 **MMBT2222ALT1
Figure 12V/500mA High Efficiency Boost Regulator
4.5V
BINH
SENSE
SENSE
1000pF
RSENSE 0.02
1266
*TOKO 919AS-4R7M
Figure N-Channel 3.3V/5A Converter with Drivers Powered from External Supply
180pF
3300pF
(Layout Assist Schematics)
0.068
20µH
MBRS130LT3 VOUT 12V/500mA 127k Si9410DY 100pF
0.1µF
100µF
180k 1N4148 SHUTDOWN 100k
1266
C0UT 100µF
TDRIVE PINV BINH
BDRIVE PGND LBOUT LBIN
Q1**
LTC1266 SENSE SGND SHDN SENSE
1000pF
4.5V (VIN(MIN) 3.5V ILOAD 2.5A)
Si9410DY
MBRS140T3
TDRIVE PINV
BDRIVE PGND LBOUT
Si9410DY
100µF
BINH LBIN LTC1266-3.3 SGND SHDN
SHUTDOWN COUT 220µF
VOUT 3.3V
LTC1266 LTC1266-3.3/LTC1266-5
TYPICAL APPLICATIO
BINH
SENSE
SENSE
1000pF
RSENSE 0.01
1266
*MAGNETICS Kool 77120-A7
Figure N-Channel 3.3V/10A High Efficiency Regulator
(VIN(MIN) 3.5V ILOAD
0.1µF MBR0530T1
Si9410DY
BINH 180pF 3300pF
TDRIVE PINV BINH
BDRIVE PGND LBOUT LBIN
SHUTDOWN
Si9410DY
MBRS130T3
LTC1266 SENSE SGND SHDN SENSE
100pF
1000pF
RSENSE 0.02
97.6k
*TOKO 919AS-4R7M
Figure N-Channel 2.5V/5A High Efficiency Regulator
Information furnished Linear Technology Corporation believed accurate reliable. However, responsibility assumed use. Linear Technology Corporation makes representation that interconnection circuits described herein will infringe existing patent rights.
220pF
3300pF
(Layout Assist Schematics)
0.1µF MBR0530T1
Si4410DY
MBRS340T3
TDRIVE PINV
BDRIVE PGND LBOUT
SHUTDOWN
47µF OS-CON
Si4410DY
BINH LBIN LTC1266-3.3 SGND SHDN
COUT 330µF
VOUT 3.3V
100µF OS-CON
100k COUT 330µF
1266
VOUT 2.5V
LTC1266 LTC1266-3.3/LTC1266-5
PACKAGE DESCRIPTIO
0.010 0.020 (0.254 0.508) 0.008 0.010 (0.203 0.254)
0.016 0.050 (0.406 1.270) *DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH SHALL EXCEED 0.006" (0.152mm) SIDE **DIMENSION DOES INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL EXCEED 0.010" (0.254mm) SIDE
RELATED PARTS
PART NUMBER LTC1530 LTC1625 LTC1628 LTC1735 LTC1772 LTC1929 DESCRIPTION Synchronous Step-Down Controller SO-8 Efficiency Synchronous Step-Down Controller 2-Phase, Dual Synchronous Controller High Efficiency Synchronous Controller SOT-23 P-Channel Controller 2-Phase Synchronous Controller Single Output COMMENTS RSENSEVoltage Mode, IOUT RSENSE Current Mode, Dropout, IOUT 20A, VOUT Minimizes COUT, Outputs 36V, IOUT Wide Input Range 3.5V 36V, 0.8V VOUT OPTI-LOOPCompensation Minimizes COUT Tiny Design, 550kHz, 2.5V 9.8V, IOUT 4.5A IOUT with Single Controller, Minimizes COUT, 200A
RSENSE OPTI-LOOP trademarks Linear Technology Corporation.
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, 95035-7417
(408)432-1900 FAX: (408) 434-0507 www.linear-tech.com
Dimensions inches (millimeters) unless otherwise noted.
Package 16-Lead Plastic Small Outline (Narrow 0.150)
(LTC 05-08-1610)
0.386 0.394* (9.804 10.008)
0.228 0.244 (5.791 6.197)
0.150 0.157** (3.810 3.988)
0.053 0.069 (1.346 1.752)
0.004 0.010 (0.101 0.254)
0.014 0.019 (0.355 0.483)
0.050 (1.270)
1098
1266fa LT/TP 1000 PRINTED
LINEAR TECHNOLOGY CORPORATION 1995
Other recent searches
T4260 - T4260 T4260 Datasheet
REJ03D0646-0200 - REJ03D0646-0200 REJ03D0646-0200 Datasheet
REG710 - REG710 REG710 Datasheet
E187184 - E187184 E187184 Datasheet
B82720S - B82720S B82720S Datasheet
ADM1033 - ADM1033 ADM1033 Datasheet
0SR01R010240 - 0SR01R010240 0SR01R010240 Datasheet
Privacy Policy | Disclaimer
© 2012 Datasheet Archive
