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Lite Multiport Repeater Interface Controller Functionally conform


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TC3097-8
Lite Multiport Repeater Interface Controller
Functionally conforms Section IEEE 802.3 specification. network connection (ports) chip including: PORT with fully compatible drive capability (50m cable). PORT with fully compatible drive capability (100m cable). Cascadable large multiple LEMRIC applications. On-chip Elasticity buffer, Manchester encoder decoder. Separate partition state machine each port. Embeded output driver each port partition status, each port link/receive status port), global status, global jabber status. external glue logic required. Embedded predistortion resistors every port. Build power reset circuit, extra glue logic required. Crystal/Oscillater optional applicable. Manchester code violation detection reporting. Support Jabber Lockup Protection function. Support Auto Partition/Reconnection function isolate faulty segment's collision activity. Fully integrated Link Test logic with enable/disable option, conforming 10BASE-T standard. Fully integrated polarity detect/correct logic with enable/disable option port. power consumption; fully load CMOS device feature high integration with single supply. 100-pin package.
General Description
TC3097 Lite Multiport Repeater Interface Controller (LEMRIC) used implement IEEE 802.3 multiport repeater unit. fully satisfies IEEE 802.3 repeater specification including functions defined repeater, segment partition jabber lockup protection state machines. LEMRIC on-chip phase-locked-loop (PLL) Manchester data decoding, Manchester encoder, Elasticity Buffer preamble regeneration. addition, provides direct display driver pins port LINK/RCV status, port partition jabber status, global jabber lockup status indications. Each LEMRIC connect cable segments network interface ports. port fully Attachment Unit Interface (AUI) compatible able connect external Medium Attachment Unit (MAU) using maximum length cable. other ports have integrated 10BASE-T transceivers. addition, large repeater units constructed cascading LEMRICs together over Inter-LEMRIC bus.
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Table Contents
Features General Description Table Contents Description.4 Config (pin connected GND) Principles Operation Reset. Clock data Recovery. Functional State diagrams 2.3.1 Port Auto-Partition State Diagram 2.3.2 Port Auto-Partition State Diagram. 2.3.3 Global State Diagram. 2.3.4 Counters Timers. Automatic Preamble Regeneration. 2.3.5 2.3.6 Inter-LEMRIC Operation 2.3.7 Port Block functions Absolute Maximum Ratings.29 D.C. Characteristics.29 Switching Characteristics Package Detail
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TC3097-8 Connection Diagram Config (pin connected GND)
TXO8RA TXO8RB RXI8A RXI8B TXO9RA TXO9RB RXI9A RXI9B PALED1 PALED2 PALED3 PALED4 PALED5 PALED6 PALED7 PALED8 PALED9
TC3097-8 100pin
TXO3RA TXO3RB RXI3B RXI3A TXO2RA TXO2RB RXI2B RXI2A TX1B TX1A RX1B RX1A CD18 AGND CD1A CP1_0 VCO_I AVDD
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Description
Symbol Description Twisted-Pair Receive Input Positive
Config (pin connected GND)
Network Interface Pins RXI2A RXI9A RXI2B RXI9B TXO2RA TXO9RA TXO2RB TXO9RB RX1A RX1B TX1A TX1B CD1A CD1B
Twisted-Pair Receive Input Negative
Twisted-Pair Transmit Output Positive
Twisted-Pair Transmit Output Negative
Receive Input Positive Receive Input Negative Receive Output Positive Receive Output Negative Collision Detect Input Positive Collision Detect Input Negative
Symbol
Description Ground pins port port output pins. Power pins port port output pins. Ground internal digital circuit this device. Power internal digital circuit this device. Ground pins digital output pins. Power pins digital output pins. Ground decoder internal circuit. Power decoder internal circuit.
Power Ground Pins AGND AVDD
Symbol
Description ACKnowledge Input: Input network port's arbitration chain. ACKnowledge Output: Output from network port's arbitration chain.
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Inter-LEMRIC Pins ACKI ACKO
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Symbol Description Inter-LEMRIC Data: When asserted output this signal provides serial data stream format. This signal asserted LEMRIC when receiving data from network segments. default condition this signal input. this state, driven other devices Inter-LEMRIC bus. Inter-LEMRIC Enable: When asserted output this signal provides activity-framing enable serial data stream. signal asserted LEMRIC when receiving data from network segments. default condition this signal input. this state driven other devices inter-LEMRIC bus. Inter-LEMRIC Clock: When asserted output this signal provides clock signal serial data stream. Data (XIRD) changed falling edge clock. default condition this signal input. When input, XIRD sampled rising edge clock. this state driven other devices Inter-LEMRIC bus. Collision Port This denotes that collision occurring port receiving data packet (Port default condition this signal input. this state driven other devices Inter-LEMRIC bus. Activity Port This bi-directional signal. LEMRIC asserts this signal when data collision information received from network segments. LEMRIC senses this signal when this another LEMRIC multi-LEMRIC system receiving data collision information. Activity Port Excluding Port This bi-directional signal. LEMRIC asserts this signal when transmit collision experienced multiple ports have active collisions their network segments. LEMRIC senses this signal when this LEMRIC other LEMRICs multi-LEMRIC system experiencing transmission collision multiple ports have active collisions their network segments. Inter-LEMRIC Pins
IREZ
COLNZ
ACTNZ
AYXNZ
Symbol
Description Global Collision (Active-Low): This CMOS output indicates status LEMRIC's collision activity. Global Jabber (Active-Low): This CMOS output indicates when LEMRIC's watchdog timer begins stays active until unjab wait period.
Driver Pins COLED
JABLED
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Symbol Description Link/Receive (active-Low): This CMOS output goes active when link integrity test pass LEMRIC's port network segment blinks when this device receiving from link passing port segment. Receive (Active-Low): This CMOS output powered active blinking when this device receiving from port network segment. Port Partition Jabber (Active-Low): This CMOS output goes active when LEMRIC's network connection port partitioned from network segment then goes inactive when network connection port reconnection from network segment. Driver Pins 6-13 LRLED2 LRLED9
LRLED1
91-99
PALED1 PALED9
Symbol
Description These pins used facilitate device testing. When test mode, these pins should left open. [Note:] Pins TEST3 TEST4 used modify build 10BASE-T operation. TEST1 used configure display mode (ICPLUS compatible mode). Refer port Block Function section more details.
TEST Support Pins TEST1 TEST3 TEST4
Symbol
Description Optional device Reset. this causes device reset. RESET must high normal operation, when used, please leave open. System Clock. MHz, nominal, 40/60% worst case, duty cycle. worst-case frequency tolerance duty cycle limit range over which LEMRIC will operate correctly. However, since this clock used Manchester data transmission, jitter performance will degrade clock sources with relatively large tolerances used.
RESET CLOCK Pins RESETZ
CLK1 CLK2
Symbol
Description Phase Lock Loop delay line external filter. This should connected correctly with capacitor AVDD causing analog device failed. Phase Lock Loop external filter. This should connected correctly with filter circuit AVDD causing analog device failed.
Decoder Filer Pins CP1_O
VCO_I
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Principles Operation
Reset
LEMRIC resets when XRESETZ (pin pulsed low. While reset, LEMRIC ignores energy collision inputs, unjabs ports, initializes timers, counters, state machines. reset (XRESETZ goes high), LEDs turned XLRLED1 turned minimum XRESETZ pulse second power test visually distinguishable. LEMRIC fully operational when exits reset.
Clock data Recovery
clock data recovery circuit (Manchester decoder) linear circuit, which recovers data clock from Manchester encoded serial data stream. Data from active port routed decoder recovered data written into FIFO.
Manchester Data
Data
Clock
Figure Manchester Data Data Relationship
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Functional State diagrams
following state diagrams describe auto-partition global state machines implemented LEMRIC. notation variables used each diagram described below. 2.3.1 Port Auto-Partition State Diagram
partitioning state machine implemented each port. Individual timers collision counters implemented each state machine. 2.3.1.1 State Diagram Notation Variables. {[term]} CC(X) DIPresent(X) Assign right side constant expression result left side variable. Logical "AND" operator. Logical "OR" operator when used state-exiting expression. Arithmetic addition when used otherwise. Group term logical evaluation. Number identifier particular port. Values: Integers from Consecutive collision count port Values: Integers from Carrier from port Values: Idle-Port carrier active. Active-Port carrier active. port carrier global state machine. Values: Idle-Port carrier been gated partition state machine. DIPresent(X)-Port carrier passed global state machine. Status transmission port Values: Idle-Not transmitting port MAU. Active-Transmitting port MAU. Inter-LEMRIC that Port Port collision. Values: Idle-/COLN active. Active-/COLN active. Inter-LEMRIC that Port Port collision. Values: Idle-/ANYXN active. Active-/ANYXN active. Enable initializes starts PORT timer. Tw5Done indicates that timer expired. Enable initializes starts port timer. /Tw6Done indicates that timer running. Tw6Done indicates that timer expired.
Datain(X)
TEN(X)
/COLN
/ANYXN
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RESET
COUNT CLEAR
CC(X) Datain(X) DIPresent(X)
TEN(X) Idle DIPresent(X)=Idle
COLLISION COUNT IDLE Datain(X) DIPresent(X)
TEN(X)=Active DIPresent(X)=Active WATCH COLLISION
Datain(X) DIPresent(X) Enable
PARTITION WAIT
Datain(X) Idle
DIPresent(X)=Idle TEN(X)=Idle /COLN,/ANYXN=Idle
{[TEN(X)=Active DIPresent(X)=Idle] [TEN(X)=Idle DIPresent(X)=Active]} Tw5Done /COLN,/ANYXN=Idle
TEN(X)=Idle DIPresent(X)=Idle
[/COLN=Active /ANYXN=Active TEN(X)=Active] DIPresent(X)=Active
PARTITION HOLD
Datain(X) Idle
COLLISION COUNT INCREMENT
CC(X) CC(X) Datain(X) DIPresent(X) EnableTw6
CC(X) [TEN(X)=Active DIPresent(X)=Active Tw6Done]
TEN(X)=Active DIPresent(X)=Active
TEN(X)=Idle DIPresent(X)=Idle CC(X) /Tw6Done
PARTITION COLLISION WATCH
Datain(X) Idle EnableTw5
[/COLN=Active ANYXN=Active TEN(X)=Active] DIPresent(X)=Active TEN(X)=Idle DIPresent(X)=Idle /COLN,/ANYXN=Idle
{[TEN(X)=Active DIPresent(x)=Idle] [TEN(X)=Idle DIPresent(X)=Active]} Tw5Done /COLN, /ANYXN=Idle
WAIT RESTORE PORT
Datain(X) Idle CC(X)
TEN(X)=Idle DIPresent(X)=Idle Figure Partition State Diagram Port
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2.3.2 Port Auto-Partition State Diagram partition state machine implemented each port. Individual timers collision counters implemented each state machine. 2.3.2.1 State Diagram Notation Variables. {[term]} CC(Y) DIPresent(Y) Assign right side constant expression result left side variable. Logical "AND" operator. Logical "OR" operator when used state-exiting expression. Arithmetic addition when used otherwise. Group term logical evaluation. Number identifier particular port. Values: Integers Consecutive collision count port Values: Integers from Carrier from port Values: Idle-Port carrier active. Active-Port carrier active. port carrier global state machine. Values: Idle-Port carrier been gated partition state machine. DIPresent(Y)-Port carrier passed global state machine. Collision indication from Port Values: /SQE-Port collision active. SQE-Port collision active. port collision global state machine. Values: /SQE-Port collision been gated partition state machine. CIPresent(Y)-Port collision passed global state machine. Inter-LEMRIC that Port Port collision. Values: Idle-/COLN active. Active-/COLN active. Inter-LEMRIC that Port Port collision. Values: Idle-/ANYXN active. Active-/ANYXN active. Enable initializes starts PORT timer. Tw5Done indicates that timer expired. Enable initializes starts port timer. /Tw6Done indicates that timer running. Tw6Done indicates that timer expired.
Datain(Y)
CIPresent(Y)
Collin(Y)
/COLN
/ANYXN
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RESET
COUNT CLEAR
CC(Y) Datain(Y) DIPresent(Y) Collin(Y)=CIPresent(Y)
COLLISION COUNT IDLE
Datain(Y) DIPresent(Y) Collin(Y)=CIPresent(Y)
DIPresent(Y)=Active CIPresent(Y)=SQE ATCH COLLISION
DIPresent(Y)=Idle CIPresent(Y)=/SQE
Datain(Y) DIPresent(Y) Collin(Y)=CIPresent(Y) EnableTw5
PARTITION
Datain(Y) Idle Collin(Y)=/SQE
DIPresent(Y)=Idle CIPresent(Y)=/SQE /COLN,/ANYXN=Idle DIPresent(Y)=Active CIPresent(Y)=/SQE Tw5Done /COLN,/ANYXN=Idle
DIPresent(Y)=Idle CIPresent(Y)=/SQE
{[/COLN=Active /ANYXN=Active] DIPresent(Y)=Active CIPresent(Y)=SQE
PARTITION HOLD
Datain(Y) Idle Collin(Y)=/SQE
DIPresent(Y)=Active CIPresent(Y)=SQE
COLLISION COUNT INCREMENT CC(Y) CC(Y) Datain(Y) DIPresent(Y) Collin(Y)=CIPresent(Y) EnableTw6
PARTITION COLLISION ATCH
Datain(Y) Idle Collin(Y)=/SQE EnableTw5
CC(Y) [CIPresent(Y)=SQE Tw6Done]
DIPresent(Y)=Idle CIPresent(Y)=/SQE CC(Y) /Tw6Done
/COLN=Active ANYXN=Active CIPresent(X)=SQE
CIPresent(Y)=Idle DIPresent(Y)=Idle /COLN,/ANYXN=Idle
CIPresent(Y)=/SQE DIPresent(Y)=Active Tw5Done /COLN, /ANYXN=Idle
RESTORE PORT Datain(Y) Idle Collin(Y)=/SQE CC(Y)
CIPresent(Y)=/SQE DIPresent(Y)=Idle Figure Partition State Diagram Port
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2.3.3 Global State Diagram single global state machine implemented LEMRIC operates independently auto-partition state machines. machine state read externally three pins when XRESETZ high. table below defines values assigned these pins each state. XTEST2/GS2 XTEST1/GS1 XTEST0/GS0 State State Name Idle Send Data Receive Collision Transmit Collision Port Left Blind
2.3.3.1 State Diagram Notation Variables. {[term]} AllDatatSent OUT(P) Assign right side constant expression result left side variable. Logical "AND" operate. Logical "OR" operator. Denotes that variable assignment expression follows. Denotes assignment expression result following arrow variable preceding arrow. Group term logical evaluation. Enable initializes start global timer. Tw1Done indicates that timer expired. Tw2Done indicates that timer expired. Flag indicating that received bits have been sent. Type output LEMRIC sending port Values Idle-The LEMRIC transmitting. Data-The LEMRIC sending Preamble, data port Jam-The LEMRIC sending port Status port carrier. ports considered. Values Idle-Port carrier active. Active-Port carrier active. Status collision port Values /SQE-Port collision active. SQE-Port collision active. Indicates number bits transmitted port Values Positive integers. Function that returns identifier port-passing test. example, Port (TPDatain=Active) returns integer identifying active port. more than port passes test, Only acceptable values returned. Values Integers from defined Port function (see above). identifies port that caused exit from ldle state Send Data Receive Collision states.
Datain(P)
Collin(P)
TT(P) Port(test)
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defined Port function (see above). identifies single port that caused exit from Transmit Collision Port Left state. Values Integers from General test, which true only port active carrier collision. ports considered. General test, which true greater than port active carrier collision. ports considered. General test, which true more ports active carrier collision. ports considered. General test, which true port other than port meets test condition. example, (ANYXN) true port other than port soured with fewer than bits. ports considered. General test, which true port other than port active carrier collision. ports considered. General test, which true ports other than port meet test condition. example (ALLXN) true ports other than port were soured with least bits. ports considered. General test, which true ports other than port meet test condition. ports considered.
ONLY1 ANYXN
ANYXM ALLXN
ALLXM
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Power
IDLE Out(ALL) Idle
START BEGIN
Datain(ANY) Act. Collin(ALL) /SQE Port Datain Act.
Collin(ANY) Port Collin
SEND PREAMBLE PATTERN Out(ALLXN) Preamble Pattern
Collin(N) Datain(N) Idle Collin(ALL) /SQE
Collin(ANYXN)
TT(ALLXN) DataRdy Collin(ALL) /SQE Datain(N) Act.
SEND ONES Out(ALLXN) TwoOnes
Collin(N) Datain(N) Idle Collin(ALL) /SQE
Collin(ANYXN)
TwoOnes Sent Collin(ALL) /SQE Datain(N) Act.
SEND DATA Out(ALLXN) Data
Collin(ANYXN)
Collin(N) Datain(N) Idle Collin(ALL) /SQE AllDataSent TT(ANYXN)
RECEIVE COLLISION
Datain(N) Idle Collin(ALL) /SQE TT(ALLXN) AllDataSent
Out(ALLXN)
TRANSMIT COLLISION Out(ALL)
Collin(ANYXN)
Collin(ALL) /SQE TT(ALL) Tw2Done
Collin(ONLY1) TT(ALL) Port Collin
PORT LEFT Out(ALLXM)
Datain(M) Idle Collin(ALL) /SQE Tw2Done
Datain(N) Idle Collin(ALL) /SQE TT(ALLXN) Tw2Done
Collin(ANYXM)
WAIT
StartTw1 Out(ALL) Idle
Collin(ANY) Tw1Done
Figure Global State Diagram Multiple Ports Port
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2.3.4 Counters Timers counters timers specified IEEE 802.3. Section implemented LEMRIC. function values chosen each described below. 2.3.4.1 wait timer "End Transmit" recovery time bit-times duration. starts when LEMRIC ends transmission packet prevents LEMRIC from receiving this transmission (loop-back energy from MAU) receiving entity. 2.3.4.2 wait timer carrier recovery time bit-times duration. starts when collision port ended. prevents LEMRIC from premature detecting true end-of-collision signal uncertainty segment collision. Refer following figure. collision (SQE) detected segment, timer becomes armed. begins timing when collision idle (/SQE). After done, timer remains idle until next collision.
RESET
IDLE Tw2Done Collin(ANY)=SQE Tw2NotDone Collin(ALL)=/SQE Enable TIMING Tw2=Done
Figure State Diagram.
2.3.4.3 wait timer length continuous output duration 65536 bit-times starts when transmission packet begins. expires before packet transmission, LEMRIC enters jabber lockup protection condition interrupts transmission period Tw4. Refer figure further details. 2.3.4.4 wait timer time disable output jabber lockup protection duration bit-times starts when expires. While active, transmission ports disabled. global state machine reset idle state, FIFO controller also reset, clock recovery circuit continues decode incoming data stream. port still active when expires, LEMRIC will resume transmission beginning with preamble. lockup (XJABLED) turned indicates suspension transmission. Refer following figure.
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RESET
tive
tive
Tw4=Done
2.3.4.5 auto-partition wait timer length packet without collision duration bit-times. starts when carrier collision ports) from port becomes active. collision detected before expires, collision count that port incremented port timer will started. also used auto-partition algorithm exit Partition collision Watch state. separate timer implemented each ports. Refer auto-partition state diagrams specific timer operation. 2.3.4.6 auto-partition wait timer excessive length collision duration 1024 bit-times. starts collision (multiple active port SQE) detected before expires. collision condition persists when expires. energy data from that port partitioned (jabbed). separate timer implemented each ports. Refer auto-partition state diagrams specific timer operation. 2.3.4.7 Collision counter collision counter maintains number consecutive collisions particular port. collision limit reached, energy data from that port partitioned (jabbed). separate collision counter with limit implemented each ports. 2.3.4.8 Transmit Timer transmit timer counts number bits transmitted port. total number bits transmitted less than (due reception packet fragment), LEMRIC will enter Receive Collision global state transmit until transmit timer reaches count There extending stream greater equal bits time. transmit timer cleared when LEMRIC enters Transmit Collision global state. This ensures that least bits signals transmitted ports before LEMRIC exits Transmit Collision state. This also means that LEMRIC will have transmitted more than bits signals port transmit collision state entered from Receive collision state. Refer following figure global state diagrams transmit timer operation.
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RESET
TTIDLE
TT(X)
OUT(X)=Active Transmitted
COUNTING TT(X) TT(X)+1
HOLD
TT(X)
Transmitted
OUT(X) Idle+ Global Stats Tcollision
Figure Transmit Timer State Diagram Port
2.3.5
Automatic Preamble Regeneration
Automatic preamble regeneration (APRG) prevents preamble from shrinking packet passed from repeater repeater station station. This shrinking, loss bits, cost determing presence carrier synchronizing Manchester data data clock recovery. LEMRIC compensates loss transmitting greater equal bits preamble before sending Start Frame Delimiter (SFD) pattern. 2.3.5.1 APRG Circuit Operation When carrier detected, LEMRIC begins sending preamble searches pattern recovered data. delay from carrier transition first transmitted preamble four five bit-times carrier eight nine bit-times carrier. LEMRIC begins search eight-bit pattern bits after carrier transition. When pattern detected, data followed loaded into 64-bit FIFO. After preamble bits sent, pattern will sent next, then finally FIFO data will transmitted. Since least bits preamble must sent, FIFO must sufficient depth store data after pattern. FIFO depth chosen allow processing packet with very bits preamble before SFD. FIFO watermark achieved reloading FIFO with part pattern. preamble counter maintains number preamble bits transmitted, implemented such that total count equals plus number bits reloaded into FIFO. watermark four bits, preamble counter counts preamble bits plus first four bits SFD). received packet must contain least preambles bits LEMRIC detect SFD. There upper limit number preamble bits received. latency bits through LEMRIC inversely related number preamble bits received. That data packet with small number (less than preamble bits must stored (and therefore held longer period time) until full preamble regenerated.
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packet with large number (greater equal preamble bits, latency will approach processing time LEMRIC (including watermark) from input through FIFO output. number preamble bits received greater than LEMRIC will four preamble bits packet carrier eight preamble bits carrier. leading edge first preamble transmitted LEMRIC, seen line. Denotes beginning nanosecond positive (TTL logic one). 2.3.5.2 APRG State Diagram following state diagram describes LEMRIC APRG operation. When carrier detected, APRG circuit waits from four noise bit-times then begins sending preamble. preamble counter (PC) increments each preamble sent. When pattern detected (all eight bits), data bits loaded into FIFO pattern sent. error paths indicate some sort packet abort, such collision, Manchester code violation, FIFO error, premature packet. state diagram notation similar that global state diagram.
RESET
IDLE Idle Carrier PREAMBLE DELAY Idle Error Delay Complete LOOK Preamble Error
Detected [FIFO Data after SFD]
COUNT
PREAMBLE COUNT Preamble Error Remaining Bits Error DATA FIFO Data Error+FIFO Empty PC<60 COUNT
Figure State Diagram Automatic Preamble Regeneration
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2.3.6 Inter-LEMRIC Operation Inter-LEMRIC consists eight signals. These signals implement protocol, which used connect multiple LEMRICs together. this configuration, logical function single repeater maintained. resulting multi-LEMRIC system compliant IEEE 802.3 Repeater Specification connect serval hundred network segments. example multi-LEMRIC system shown follow below:
NETW SEGM
NTENTS
SEGM ENTS
NETW SEGM
SEGM ENTS
Figure LTI-LE ystem opopogy
Inter-LEMRIC connects multiple LEMRICs realize following operations: Port Identification (which port repeater receives data from) Port Identification (which port last experiencing collision) Data Transfer RECEIVE COLLISION Identification TRANSMIT COLLISION Identification DISABLE OUTPUT (jabber protection) following tables briefly describe operation each signal, conditions required LEMRIC assert signal which LEMRICs multi-LEMRIC system) would monitor signal: ACKI Input signal Inter-LEMRIC arbitration chain. This chain employed identify PORT PORT Note: LEMRIC contains PORT PORT identified ACKO signal being when ACKI input high. Conditions required Applicable LEMRIC drive this signal LEMRIC Receiving Signal This dependent upon method used cascade LEMRICs, described Section 1.3.6.2. ACKO Function Output signal from Inter-LEMRIC arbitration chain. Function
Conditions required This dependent upon method used cascade LEMRICs described LEMRIC drive this signal Section 1.3.6.2. LEMRIC Receiving Signal applicable
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/ACTN Function This signal denotes there activity PORT
Conditions required LEMRIC must contain PORT PORT LEMRIC drive this signal Note: Although this signal normally only source asserting signal active used wired-OR configuration. LEMRIC Receiving Signal This signal monitored LEMRICs repeater system. /ANYXN Function This signal denotes that repeater port that PORT PORT experiencing collision.
Conditions required LEMRIC that satisfies above condition. LEMRIC drive this signal Note This line used wired-OB configuration. LEMRIC Receiving Signal This signal monitored LEMRICs repeater system. /COLN Function Denotes PORT PORT experiencing collision.
Conditions required LEMRIC must contain PORT PORT LEMRIC drive this signal LEMRIC Receiving Signal signal monitored other LEMRICs repeater system. /IRE Function This signal acts activity-framing signal signals.
Conditions required LEMRIC must contain PORT LEMRIC drive this signal LEMRIC Receiving Signal signal monitored other LEMRICs repeater system. /IRD Function Decoded serial data, format, received from network segment attached PORT Conditions required LEMRIC must contain PORT LEMRIC drive this signal LEMRIC Receiving Signal signal monitored other LEMRICs repeater system. /IRC Function Clock signal associated with IRE. Conditions required LEMRIC must contain PORT LEMRIC drive this signal LEMRIC Receiving Signal signal monitored other LEMRICs repeater system. 2.3.6.1 Methods LEMRIC Cascading order build multi-LEMRIC repeaters, PORT PORT identification must performed across LEMRICs system. chain, input Port accessible user LEMRIC's /ACKI input pin. output from bottom chain becomes /ACKO output pin. single LEMRIC system PORT defined port arbitration chain with receive collision activity. PORT identification performed when repeater IDLE state. order arbitration chain function, that needs done /ACKI signal logic high state. multi-LEMRIC systems there methods propagate arbitration chain between LEMRICs: first most straightforward extend arbitration chain daisy-chaining /ACKI-/ACKO signals between LEMRICs. this approach LEMRIC placed chain
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(its /ACKI input tied high), then /ACKO signal from this LEMRIC send /ACKI input next LEMRIC This arrangement simple implement places some topological restrictions upon repeater system. particular, when repeater constructed using backplane with removable printed circuit boards containing LEMRICs, boards removed then /ACKI-/ACKO chain will broken repeater will operate correctly. second method PORT PORT identification avoids this problem. This second technique relies external parallel arbiter, which monitors LEMRIC's /ACKO signals responds LEMRIC with highest priority. this scheme each LEMRIC assigned with priority level. method doing this assign priority number, which reflects position LEMRIC board repeater backplane (i.e., slot number). When LEMRIC experiences receive activity repeater system IDLE state, LEMRIC board will assert /ACKO. External arbitration logic drives identification number onto arbitration LEMRIC containing PORT will identified. identical procedure used TRANSMIT COLLISION state identify PORT This parallel means arbitration subject problems caused missing boards empty slots backplane). logic associated with asserting this arbitration vector various various packet repetition scenarios could implemented type devices. perform PORT PORT arbitration, both above methods employ same signals: /ACKI, /ACKO, /ACTN. Inter-LEMRIC allows multi-LEMRIC operations performed exactly same manner there only single LEMRIC system. simplest describe operation Inter-LEMRIC used number common packet repetition scenarios. 2.3.6.2 EXAMPLES PACKET REPETITION SCENARIOS Data Repetition simplest packet operation performed over Inter-LEMRIC data repetition. this operation data packet received port transmitted other segments. first task performed PORT identification. situations where more ports simultaneously receive packets Inter-LEMRIC operates choosing active ports forcing others transmit data. This done faithfully follow IEEE specification's allowed exit paths from IDLE state SEND PREAMBLE PATTERN RECEIVE COLLISION states). packet begins with preamble pattern derived from LEMRIC's chip jam/preamble generator. data received PORT directed through receiving multiplexer decoder. Once phase lock been achieved, decoded data, format, with associated clock enable signals asserted onto IRD, /IRE Inter-LEMRIC lines, This serial data stream received from LEMRICs repeater directed their Elasticity Buffers. Logic circuit monitors data stream look Start Frame Delimiter (SFD). When this been detected data loaded into elasticity buffer later transmission. This will occur when sufficient preamble been transmitted certain internal state machine operations have been fulfilled. Figure shows LEMRICs, daisy-chained together with LEMRIC positioned chain. packet received port LEMRIC then repeated other ports system. Figure shows functional timing diagram this packet repetition represented signals shown figure this example only ports system shown, obviously other port also repeat packet. also indicates operation LEMRIC's state machines seen observing Inter-LEMRIC bus. reference, repeater's state transitions shown terms states defined IEEE specification. location which port
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PORT also shown. following section describes repeater Inter-LEMRIC transitions shown figure
(NOTE1*)
(HIGH)
/ACKO /ACKIB
(HIGH)
(HIGH)
(HIGH)
/ACKO
/ACTN
/ANYXN (HIGH)
/COLN (HIGH)
/IRE
PORT
INTER-LEMRIC STATES
IDLE
ARB'
REPEAT
IDLE
REPEATER STATES
IDLE
SEND PREAMBLE
SEND
SEND
IDLE
PORT
PORT
NOTE 1:The activity shown
represents transmitted signal
after being looped back attached
FIGURE Data
repeater stimulated into activity data signal received port LEMRICs system alerted forthcoming repeater operation falling edges /ACKI-/ACKO daisy chain
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TC3097-8
/ACTN signal, following defined start delay repeater moves SEND PREAMBLE state. LEMRIC system utilizes start delay perform port arbitration. When packet transmission begins LEMRIC system enters REPEAT state. expected, normal packet repetition, sequence repeater states, SEND PREAMBLE, SEND SEND DATA followed visible upon Inter-LEMRIC bus. They merged together into single REPEAT state. This also true WAIT IDLE states; they appear combined Inter-LEMRIC IDLE state. Once repeat operation begun repeater leaves IDLE state) required transmit least bits data jam/preamble into network segments. duration received signal from PORT smaller than bits, repeater transitions RECEIVE COLLISION state (described later). This behavior known fragment extension. After packet data been repeated, including emptying LEMRICs' elasticity buffers, LEMRIC performs transmit recovery operation. This performed during WAIT state shown repeater state diagram. 2.3.6.3 EXAMPLES PACKET REPETITION SCENARIOS Receive Collisions receive collision collision which occurs network segment attached PORT (i.e., collision "received" similar manner data packet received then repeated other network segments). receiving collision propagation follows similar sequence operations found with data repetition: arbitration process performed find PORT preamble/jam pattern transmitted repeater's other ports. When PORT detects collision segment /COLN Inter-LEMRIC signal asserted. This forces LEMRICs system transmit preamble/jam pattern their segments. This important since they already transmitting data from their elasticity buffers. repeater moves RECEIVE COLLISION state when LEMRICs begin transmit pattern. repeater remains this state until both following conditions have been fulfilled: least bits have been transmitted onto network, activity ended. Under close examination repeater specification reveals that actual activity permutations conditions: Collision receive data signals simultaneously, Receive data appear before collision signals, Receive data continue some time after collision signal. Network segments using coaxial media experience spurious gaps segment activity when collision signal goes inactive. This arises from inter-action between received collision signal squelch circuits. Implemented coaxial transceivers, properties coaxial cable itself. repeater specification avoids propagation these activity gaps extending collision activity wait time. pattern transmission must sustained throughout this period. After this, repeater will move WAIT state unless there data signal being received PORT functional timing diagram, figure shows operation repeater system during receive collision. system configuration same earlier described shown Figure LEMRICs perform same PORT arbitration data repetition operations previously described. system notified receive collision port /COLN signal going active. This signal, which informs main state machines output pattern rather than data held elasticity buffers. Once collision occurred IRC, /IRE signals become undefined. When collision ended operation performed, repeater moves WAIT state.
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(HIGH)
/ACKO (HIGH) /ACKI
(HIGH)
(HIGH)
/ACKO
/ACTN
/ANYXN (HIGH) /COLN (HIGH)
/IRE
INTER-LEMRIC STATES
IDLE
PORT ARB'
REPEAT
RXCOL
RECEIVE COLLISION
IDLE
REPEATER STATES
IDLE
NOTE
WAIT
IDLE
PORT
PORT
NOTE1 SEND PREAMBLE, SEND SEND DATA
FIGURE Receive Collision
2.3.6.4 EXAMPLES PACKET REPETITION SCENARIOS Transmit Collisions transmit collision collision that detected upon segment which repeater system transmitting. state machine monitoring colliding segment asserts /ANYXN signal. assertion /ANYXN causes PORT arbitration begin. repeater moves TRANSMIT COLLISION state when port, which been PORT starts transmit Manchester encoded network segment. While TRANSMIT COLLISION state ports repeater must transmit 1010. pattern PORT arbitration performed. Each LEMRIC obliged, IEEE specification, ensure ports transmit least bits once TRANSMIT COLLISION state been entered. This transmit activity enforced /ANYXN signal. While /ANYXN active LEMRIC ports will transmit jam. ensure this situation lasts least bits, MSMs (Main state Machine) inside LEMRICs assert /ANYXN signal throughout this period. After this period elapsed, /ANYXN will only asserted there multiple ports with active collisions their network segments. There possible ways repeater leave TRANSMIT COLLISION state. most straightforward when network activity collisions their extensions) before 96-bits enforced period expires. Under these conditions repeater system move directly WAIT state when bits have been transmitted ports. enforced period ends there still port experiencing collision PORT LEFT state entered. This seen Inter-LEMRIC when /ANYXN reasserted PORT stops transmitting network segment. this circumstance Inter-LEMRIC transitions RECEIVE COLLISION state. repeater will remain this state while PORT collision, collision extension receive signals present. When these conditions true, packet repetition finishes repeater enters WAIT state. Figure shows multi-LEMRIC system operating under transmit collision conditions. There many different scenarios which occur during transmit collision; this figure illustrates these.
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diagram begins with packet reception port Port experiences collision, since PORT asserts /ANYXN. This alerts MSMs system switch from data pattern transmission. Port also monitoring /ANYXN line. assertion forces relinquish PORT status, start transmission, stop asserting /ACTN release hold arbitration signals (/ACKO /ACKI first transmits will Manchester encoded pattern. Since port only port with collision, attains PORT status stop asserting /ANYXN. does however assert /ACTN, exert presence upon arbitration chain (forces /ACKO low). MSMs ensure that /ANYXN stays active thus forces ports, including PORT transmit their segments. After some time, port experience packet being received from port A1's segment plus signal repeater transmitting onto this segment. packets transmit segment, which results collision. PORT moves from Port fulfills same criteria active collision segment), addition higher arbitration chain.
/ACKO /ACKI
/ACKO
/ACTN /ANYXN /COLN /IRE INTER-LEMRIC STATES
REPEATER STATES PORT PORT
REPEAT
SEND DATA
PORT PORT
TRANSMIT COLLISION
PORT PORT
RXCOL
PORT LEFT
PORT PORT
IDLE
WAIT
FIGURE Transmit Collision
Eventually collision port ends /ANYXN extension MSMs expires. There only collision network (this deduced since /ANYXN inactive) repeater will move PORT LEFT state. LEMRIC system treats this state similar manner receive collision with PORT fulfilling role receiving port. difference from true receive collision that switch from packet data pattern already been made (controlled /ANYXN). Thus state /COLN effect upon repeater operation. common with operation RECEIVE COLLISION state, repeater remains this condition until collision receive activity PORT subside. packet repetition operation completes when recovery time WAIT state been performed. 2.3.6.5 EXAMPLES PACKET REPETITION SCENARIOS Jabber Protection
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repeater required disable transmit activity length current transmission reaches jabber protect limit. This defined IEEE specification's time. repeater disables output time period defined specification, after this period normal operation resume. Figure shows effect jabber length packet upon LEMRIC based repeater system. JABBER PROTECT state entered from SEND DATA state. While period observed Inter-LEMRIC displays IDLE state. This misleading since packet activity continuous activity shown diagram) does result packet repetition. This only occur when requirement been satisfied.
(HIGH) (HIGH)
/ACKO /ACKI
(HIGH)
/ACKO /ACTN /ANYXN (HIGH) /COLN /IRE INTER-LEMRIC STATES REPEATER STATES PORT
SEND DATA PORT
(HIGH)
REPEAT
IDLE PORT
JABBER PROTECT (NOTE
REPEAT
SEND PREAMBLE PORT
Note IEEE Specification does have jabber protect state defined main state diagram,this behavior defined additional Jabber Lockup Protection state diagram.
FIGURE Jabber Protect
2.3.7
Port Block functions
LEMRIC port logic blocks (one each network connection). addition packet repetition operations already described, port block performs other functions: physical connection network segment (transceiver function). provides means protect network from malfunctioning segments (segment partition). 2.3.7.1 TRANSCEIVER FUNCTIONS LEMRIC connect network segments ways: Over cable transceiver boxes (Port twisted pair cable simple interface. first method only supported LEMRIC Port (the port). other available Ports LEMRIC contains virtually digital analog circuits required connection 10BASE-T network segments. only optional additional active component external drive package. connection LEMRIC port 10BASE-T segment shown figure diagram shows components required connect LEMRIC's ports 10BASE-T segment (and lists module P/Ns vendors). major components integrated filter-transformer-choke module discrete combination these functions). operation 10BASE-T transceiver's logical functions modified hardware reset control. default mode operation transceiver transmit expect reception link
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pulses. This modified XTEST4 pulled down (pull down resistor needed) before hardware reset operation. port's transceiver will operate normally will transmit link pulses monitor their reception. Thus entry link fail state associated modification transceiver operation will occur until another hardware reset logic setting XTEST4 pin. on-chip 10BASE-T transceivers automatically detect correct polarity received data stream. This polarity detection scheme relies upon polarity received link pulses packet waveform. Polarity detection correction disable through XTEST3 pulled down resistor before hardware reset operation associated modification transceiver operation will occur until another hardware reset logic setting XTEST3 pin. When using external transceivers user must perform collision detection other functions associated with IEEE 802.3 Media Access Unit. Figure shows connection between repeater port coaxial transceiver using type interface.
INTEGRATED MODULE
TXORA
TXORB
0.047
COMMON MODE CHOKES
XRXI+
XRXI-
0.047
Vendor Pulse Engineering Fuse Valor
Filter-Transformer-Choke Modules PE65424,PE65434,PE65431 0556-2006-00,0556-2006-01 FL1010 Channel),FL1012*,FL1020
There single common mode choke transmit channel only.
FIGURE Port Connection 10BASE-T Segment Some Typical Filter-Transformer-Choke Modules
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DP8392
XTX1A
XTX1B
X'FORM
PULSE
Ohm,1%
XCD1A XCD1B XRX1A XRX1B
CONNECTOR
1.5K
0.01
0.01
CONVERTER
SPARK
ISOLATED
FIGURE Port Connection 10BASE2 Segment Interface
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Absolute Maximum Ratings
4.75V -0.5V -0.5V -40C 250mW 5.25V VCC+0.5V VCC+0.5V 125C 1150mW
Supply Voltage (VCC) Input voltage (VIN) Output Voltage (VOUT) Ambient Temperature Under Bias Storage Temperature Range (TSTG) Operating Temperature Range Power Dissipation (PD)
D.C.
Characteristics
Description Minimum High Level Output Voltage Minimum Level Output Voltage Minimum High Level Input Voltage Maximum Level Input Voltage Input Current Input High current Supply current Differential Squelch Threshold (XRX1+-, XCD1+-) Minimum Receive Squelch Threshold (Twisted-Pair Port 2-9) Conditions IOH=-4mA IOL=8mA VCC=5V VCC=5V VIN=1.0V VIN=VCC Min. +-190 +-200 Max. -0.5 +-280 +-460 Units
Symbol VRON
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Switching Characteristics
PORT ARBITRATION TIMING
ACKI
ACKO
Symbol ackilackol ackihackoh
Number
Parameter ACKI ACKO ACKI High ACKO High
Units
Note Timing valid with receive collision activities. RECEIVE TIMING-AUI PORTS Receive activity propagation start delays ports 10BASE-T mode.
ACTN
ACKO
Symbol rxaackol rxiackoh rxaactnl rxiactnh
Number
Parameter Active ACKO Inactive ACKO High (Note Active ACTN Inactive ACTN High (Note
1900 1960
2000 2060
Units
Note ACKI assumed high Note This time includes EOP. FIFO Data clear time. RECEIVE TIMING-10BASE-T PORTS Receive activity propagation start delays ports 10BASE-T mode
ACTN
ACKO
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Symbol rxaackol rxiackoh rxaactnl rxiactnh Number Parameter Active ACKO Inactive ACKO High (Note Active ACTN Inactive ACTN High (Note 1300 1360 1400 1460 Units
Note ACKI assumed high. Note This time includes EOP. FIFO Data clear time. TRANSMIT TIMING-AUI PORTS Transmit activity propagation start delays ports 10BASE-T mode
CLOCK
T16a
ACTN
T15a
Symbol actnltxa clkitxa
Number T15a T16a
Parameter /ACTN Active CLOCK Active (Note
Units
Note ACKI assumed high. Note Clock drawn scale. TRANSMIT TIMING-10BASE-T PORTS Receive activity propagation start delays ports 10BASE-T mode
CLOCK
T16t
ACTN
T15t
Symbol actnltxa clkitxa
Number T15a T16a
Parameter /ACTN Active CLOCK Active (Note
Units
Note ACKI assumed high. Note Clock drawn scale. COLLISION TIMING-AUI PORTS Collision activity propagation start delays ports 10BASE-T mode
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TRANSMIT COLLISION TIMING
ACKO
T30a ANYXN T31a
Symbol cdiackoh cdaanyxnl cdianyxnh
Number T30a T31a
Parameter Inactive ACKO High Active ANYXN Inactive ANYXN High (Notes 1,2)
Units
Note collision extension already been performed other port driving /ANYXN. Note Includes TW2. RECEIVE COLLISION TIMING
T32a
COLN
T33a
DATA
Symbol cdacoina cdicolni colnljs colnhje
Number T32a T33a
Parameter Active /COLN Inactive /COLN High /COLN Start /COLN High (Note
Units
Note Reception ended before /COLN goes high. COLLISION TIMING-10BASE-T PORTS Collision activity propagation start delays parts 10BASE-T mode
T30t T31t
ANYXN
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Symbol colaanyl colianyh
Number T30t T31t
Parameter Collision Active /ANYXN Collision inactive /ANYXN High (Note
Units
Note collision extension already been performed other port asserting /ANYXN. COLLISION TIMING-ALL PORTS
ACTN ACKI ANYXN
DATA
Symbol
Number anylmin anyhtxai anylsj ackihanyh
Parameter /ANYXN Time /ANYXN High Inactive /ANYXN Start ACKI High /ANYXN High
Units bits
COLLISION TIMING-ALL PORTS
ACTN
ANYXN
port left
Symbol
Number actnntxi anyhtxoi
Parameter /ACTN High Inactive /ANYXN High "One Port Left" Inactive
Units
Note bits have already been propagated.
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INTER-LEMRIC OUTPUT TIMING
T105
ACTN
T109
T106 T103
T110
T102 T101
T107 T108
Symbol ircoh ircol ircoc actnolireol reolirca irdov irdos ircohireh ircclks
Number T101 T102 T103 T105 T106 T107 T108 T109 T110
Parameter Output High Time Output Time Output Cycle Time /ACTN Output /IRE Output Output Active Output valid from Output Stable Valid Time Output High /IRE High Number IRCs after /IRE High
Units clocks
INTER-LEMRIC INPUT TIMING
T116
T114 T115
T111
T112
Symbol ircih ircil irdisirc irdihirc ircihireh
Number T111 T112 T114 T115 T116
Parameter input High Time input Time input setup input Hold from Input High /IRC High
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Units
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July 2003 TC3097-8-DS-R24
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Package Detail
MILLIMETER
SYMBOL
MIN.
0.05 2.57 0.20 0.10 13.90 19.90
0.25 2.72 0.30 0.15 14.00 20.00 0.65
0.50 2.87 0.40 0.20 14.10 20.10
17.75 23.75 0.73
17.90 23.90 0.88 1.95
18.15 24.15 1.03
0.08
0.13(0.005)
Note:For Exact Dimension, Please metric. Inches just approximation.
Plus Corp.
Headquarters 10F, No.47, Lane Kwang-Fu Road, Sec. Hsin-Chu City, Taiwan 300, R.O.C. 886-3-575-0275 886-3-575-0475 Website: www.icplus.com.tw
Confidential. Copyright 2003, Plus Corp.
Sales Office 106, Hsin-Tai-Wu Road, Sec.1, Hsi-Chih, Taipei Hsien, Taiwan 221, R.O.C. 886-2-2696-1669 886-2-2696-2220
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