N-channel 100V 0.025 TO-220 DPAK gate charge STripFETII Power MOSFET

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N-channel 100V 0.025 TO-220 DPAK gate charge STripFETII Power MOSFET

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STD40NF10 STP40NF10
N-channel 100V 0.025 TO-220 DPAK gate charge STripFETII Power MOSFET
Type STD40NF10 STP40NF10
VDSS 100V 100V
RDS(on) <0.028 <0.028
Exceptional dv/dt capability gate charge 100% avalanche tested
DPAK
TO-220
Application
Switching applications Figure Internal schematic diagram
Description
This Power MOSFET latest development STMicroelectronics unique "single feature size" strip-based process. resulting transistor shows extremely high packing density onresistance, rugged avalanche characteristics less critical alignment steps allowing remarkable manufacturing reproducibility.
Table
Device summary
Marking P40NF10 D40NF10 Package TO-220 DPAK Packaging Tube Tape reel
Order codes STP40NF10 STD40NF10
September 2007
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www.st.com
Contents
STP40NF10 STD40NF10
Contents
Electrical ratings Electrical characteristics
Electrical characteristics (curves)
Test circuit
Package mechanical data Packaging mechanical data Revision history
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STP40NF10 STD40NF10
Electrical ratings
Electrical ratings
Table
Symbol ID(1)
Absolute maximum ratings
Value Parameter TO-220 Drain-source voltage (vgs Gate- source voltage Drain current (continuous) 25°C Drain current (continuous) 100°C Drain current (pulsed) Total dissipation 25°C Derating factor Max. operating junction temperature 0.83 DPAK W/°C V/ns Unit
PTOT dv/dt(3)
Peak diode recovery voltage slope Single pulse avalanche energy Storage temperature
Tstg
Limited wire bonding Pulse width limited safe operating area 50A, di/dt 600A/µs, V(BR)DSS, TJMAX. Starting 25°C, 50A, VDD=25V
Table
Symbol
Thermal data
Value Parameter TO-220 DPAK 62.5 °C/W °C/W Unit
Rthj-case Thermal resistance junction-case Rthj-a Thermal resistance junction-ambient Maximum lead temperature soldering purpose
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Electrical characteristics
STP40NF10 STD40NF10
Electrical characteristics
(TCASE=25°C unless otherwise specified) Table
Symbol V(BR)DSS IDSS IGSS VGS(th) RDS(on)
On/off states
Parameter Drain-source Breakdown voltage Zero gate voltage Drain current (VGS Gate-body leakage current (VDS Gate threshold voltage Static drain-source resistance Test conditions rating VDS=Max rating,TC=125°C ±20V VGS, 250µA 10V, 0.025 Min. ±100 0.028 Typ. Max. Unit
Table
Symbol Ciss Coss Crss
Dynamic
Parameter Forward transconductance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate-source charge Gate-drain charge 25V, MHz, Test conditions 15V, ID=28A Min. Typ. 2180 83.7 50V, 40A, (see Figure 46.5 13.3 17.5 22.5 Max. Unit
Pulsed: Pulse duration duty cycle 1.5.
Table
Symbol td(on) td(off)
Switching times
Parameter Turn-on delay time Rise time Turn-off-delay time Fall time Test conditions 50V, (see Figure 27V, 40A, 4.7, (see Figure Min. Typ. Max. Unit
4/15
STP40NF10 STD40NF10 Table
Symbol ISDM
Electrical characteristics
Source drain diode
Parameter Source-drain current Source-drain current (pulsed) Forward voltage Reverse recovery time Reverse recovery charge Reverse recovery current 50A, 50A, di/dt 100A/µs, 150°C (see Figure Test conditions Min. Typ. Unit
IRRM
Pulse width limited safe operating area. Pulsed: Pulse duration duty cycle 1.5%
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Electrical characteristics
STP40NF10 STD40NF10
Figure
Electrical characteristics (curves)
Safe operating area TO-220 Figure Thermal impedance TO-220
Figure
Safe operating area DPAK
Figure
Thermal impedance DPAK
Figure
Output characteristics
Figure
Transfer characteristics
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STP40NF10 STD40NF10 Figure Transconductance Figure
Electrical characteristics Static drain-source resistance
Figure Gate charge gate-source voltage Figure Capacitance variations
Figure Normalized gate threshold voltage temperature
Figure Normalized resistance temperature
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Electrical characteristics Figure Source-drain diode forward characteristics
STP40NF10 STD40NF10 Figure Normalized breakdown voltage
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STP40NF10 STD40NF10
Test circuit
Test circuit
Figure Gate charge test circuit
Figure Switching times test circuit resistive load
Figure Test circuit inductive load Figure Unclamped Inductive load test switching diode recovery times circuit
Figure Unclamped inductive waveform
Figure Switching time waveform
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Package mechanical data
STP40NF10 STD40NF10
Package mechanical data
order meet environmental requirements, offers these devices ECOPACK® packages. These packages have Lead-free second level interconnect category second level interconnect marked package inner label, compliance with JEDEC Standard JESD97. maximum ratings related soldering conditions also marked inner label. ECOPACK trademark. ECOPACK specifications available www.st.com
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STP40NF10 STD40NF10
Package mechanical data
TO-220 mechanical data
4.40 0.61 1.14 0.49 15.25 1.27 2.40 4.95 1.23 6.20 2.40 3.50 16.40 28.90 3.75 2.65 3.85 2.95 0.147 0.104 10.40 2.70 5.15 1.32 6.60 2.72 3.93 0.393 0.094 0.194 0.048 0.244 0.094 0.511 0.137 4.60 0.88 1.70 0.70 15.75 0.173 0.024 0.044 0.019
inch 0.181 0.034 0.066 0.027 0.62 0.050 0.409 0.106 0.202 0.051 0.256 0.107 0.551 0.154 0.645 1.137 0.151 0.116
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Package mechanical data
STP40NF10 STD40NF10
DPAK MECHANICAL DATA
DIM. MIN. (L1) 0.03 0.64 0.45 0.48 2.28 9.35 0.023 0.008 10.1 0.173 0.368 0.039 0.110 0.031 0.039 0.252 0.185 0.090 0.181 0.397 MAX. 0.23 MIN. 0.086 0.035 0.001 0.025 0.204 0.017 0.019 0.236 0.200 0.260 TYP. MAX. 0.094 0.043 0.009 0.035 0.212 0.023 0.023 0.244 inch
0068772-F
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STP40NF10 STD40NF10
Packaging mechanical data
Packaging mechanical data
DPAK FOOTPRINT
dimensions millimeters
TAPE REEL SHIPMENT
REEL MECHANICAL DATA
DIM. 12.8 20.2 16.4 22.4 18.4 13.2 MIN. MAX. 0.059 0.504 0.520 0.795 0.645 0.724 1.968 0.881 BULK 2500 inch MIN. MAX. 12.992
TAPE MECHANICAL DATA
DIM.
BASE 2500
MIN. 10.4 1.65 2.55
15.7 16.3
inch MIN. MAX. 0.267 0.275 0.409 0.417 0.476 0.059 0.063 0.059 0.065 0.073 0.291 0.299 0.100 0.108 0.153 0.161 0.311 0.319 0.075 0.082 1.574
0.618 0.641
MAX. 10.6 12.1 1.85 2.75
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Revision history
STP40NF10 STD40NF10
Revision history
Table
Date 16-Dec-2004 17-Aug-2006 31-Jan-2007 19-Sep-2007
Document revision history
Revision First version. document been reformatted. Typo mistake Table Added DPAK Changes
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STP40NF10 STD40NF10
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N-channel 100V 0.025 TO-220 DPAK gate charge STripFETII Power MOSFET

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